| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 1 | Platform Ports |
| 2 | ============== | ||||
| 3 | |||||
| 4 | .. toctree:: | ||||
| 5 | :maxdepth: 1 | ||||
| 6 | :caption: Contents | ||||
| 7 | :numbered: | ||||
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 8 | :hidden: |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 9 | |
| 10 | allwinner | ||||
| Paul Beesley | 43f35ef | 2019-05-29 13:59:40 +0100 | [diff] [blame] | 11 | arm/index |
| Sandrine Bailleux | e58901d | 2020-02-26 15:52:23 +0100 | [diff] [blame^] | 12 | meson-axg |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 13 | meson-gxbb |
| 14 | meson-gxl | ||||
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 15 | meson-g12a |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 16 | hikey |
| 17 | hikey960 | ||||
| 18 | intel-agilex | ||||
| 19 | intel-stratix10 | ||||
| 20 | marvell/index | ||||
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 21 | mt8183 |
| 22 | nvidia-tegra | ||||
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 23 | warp7 |
| 24 | imx8 | ||||
| 25 | imx8m | ||||
| 26 | ls1043a | ||||
| 27 | poplar | ||||
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 28 | qemu |
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 29 | qemu-sbsa |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 30 | rpi3 |
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 31 | rpi4 |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 32 | rcar-gen3 |
| 33 | rockchip | ||||
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 34 | socionext-uniphier |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 35 | synquacer |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 36 | stm32mp1 |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 37 | ti-k3 |
| Paul Beesley | 24dba2b | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 38 | xilinx-versal |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 39 | xilinx-zynqmp |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 40 | |
| 41 | This section provides a list of supported upstream *platform ports* and the | ||||
| Paul Beesley | 43f35ef | 2019-05-29 13:59:40 +0100 | [diff] [blame] | 42 | documentation associated with them. |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 43 | |
| 44 | .. note:: | ||||
| 45 | In addition to the platforms ports listed within the table of contents, there | ||||
| 46 | are several additional platforms that are supported upstream but which do not | ||||
| 47 | currently have associated documentation: | ||||
| 48 | |||||
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 49 | - Arm Neoverse N1 System Development Platform (N1SDP) |
| 50 | - Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP | ||||
| 51 | - Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP | ||||
| 52 | - Arm SGI-575 and SGM-775 | ||||
| 53 | - MediaTek MT6795 and MT8173 SoCs | ||||
| 54 | |||||
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 55 | -------------- |
| 56 | |||||
| Sandrine Bailleux | e58901d | 2020-02-26 15:52:23 +0100 | [diff] [blame^] | 57 | *Copyright (c) 2019-2020, Arm Limited. All rights reserved.* |