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review.trustedfirmware.org / TF-A / trusted-firmware-a / 4d585fe52feb231d5e73ec50a505122d5e9bf450 / bl31 / aarch64
  1. f19dc62 refactor(gpt): productize and refactor GPT library by johpow01 · 2 years, 6 months ago
  2. 1839012 feat(rme): add GPT Library by Zelalem Aweke · 2 years, 5 months ago
  3. 4693ff7 feat(rme): add Realm security state definition by Zelalem Aweke · 2 years, 5 months ago
  4. c2d32a5 Fix exception handlers in BL31: Use DSB to synchronize pending EA by Madhukar Pappireddy · 3 years, 4 months ago
  5. 3b8456b runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · 3 years, 4 months ago
  6. b4292bc Fix crash dump for lower EL by Alexei Fedorov · 3 years, 9 months ago
  7. 68c7608 Make PAC demangling more generic by Alexei Fedorov · 3 years, 10 months ago
  8. c367b75 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · 3 years, 10 months ago
  9. f461fe3 Prevent speculative execution past ERET by Anthony Steinhauser · 3 years, 11 months ago
  10. b8e1796 Merge changes from topic "bs/pmf32" into integration by György Szing · 4 years ago
  11. bb9549b aarch64: Fix stack pointer maintenance on EA handling path by Jan Dabros · 4 years ago
  12. 0531ada pmf: Make the runtime instrumentation work on AArch32 by Bence Szépkúti · 4 years, 1 month ago
  13. da90359 PIE: make call to GDT relocation fixup generalized by Manish Pandey · 4 years ago
  14. 8094262 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · 4 years, 3 months ago
  15. ed108b5 Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 4 years, 3 months ago
  16. 1f46197 Add UBSAN support and handlers by Justin Chadwell · 4 years, 3 months ago
  17. 53d7e00 Move assembly newline function into common debug code by Justin Chadwell · 4 years, 3 months ago
  18. 3056091 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · 4 years, 3 months ago
  19. e290a8fc AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 4 years, 4 months ago
  20. 6c6a470 AArch64: Align crash reporting output by Alexei Fedorov · 4 years, 4 months ago
  21. c424b91 Fix BL31 crash reporting on AArch64 only machines by Imre Kis · 4 years, 4 months ago
  22. 9fc5963 Add support for Branch Target Identification by Alexei Fedorov · 4 years, 6 months ago
  23. cc485e2 Rework smc_unknown return code path in smc_handler by Madhukar Pappireddy · 4 years, 7 months ago
  24. 050136d Fix restoration of PAuth context by Alexei Fedorov · 4 years, 8 months ago
  25. 330ead8 PIE: Fix reloc at the beginning of bl31 entrypoint by Louis Mayencourt · 4 years, 8 months ago
  26. 317d68e Restore PAuth context in case of unknown SMC call by Alexei Fedorov · 4 years, 9 months ago
  27. 7dcbb4f BL31: Enable pointer authentication support in warm boot path by Alexei Fedorov · 4 years, 9 months ago
  28. 88cfd9a BL31: Enable pointer authentication support by Antonio Nino Diaz · 4 years, 10 months ago
  29. b86048c Add support for pointer authentication by Antonio Nino Diaz · 4 years, 9 months ago
  30. 5283962 Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 4 years, 10 months ago
  31. 0709055 Remove support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · 4 years, 10 months ago
  32. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 5 years ago
  33. e8ce60a SPM: Introduce SMC handlers for SPCI and SPRT by Antonio Nino Diaz · 5 years ago
  34. 01fc1c2 BL31: Use helper function to save registers in SMC handler by Soby Mathew · 5 years ago
  35. 931f7c6 PIE: Position Independant Executable support for BL31 by Soby Mathew · 5 years ago
  36. 81542c0 Remove some MISRA defects in common code by Antonio Nino Diaz · 5 years ago
  37. eaeaa4d RAS: Introduce handler for EL3 EAs by Jeenu Viswambharan · 5 years ago
  38. d5a23af RAS: Introduce handler for Double Faults by Jeenu Viswambharan · 6 years ago
  39. b56dc2a RAS: Introduce handler for Uncontainable errors by Jeenu Viswambharan · 6 years ago
  40. ee6ff1b RAS: Validate stack pointer after error handling by Jeenu Viswambharan · 6 years ago
  41. df8f318 RAS: Move EA handling to a separate file by Jeenu Viswambharan · 5 years ago
  42. a9203ed Add end_vector_entry assembler macro by Roberto Vargas · 6 years ago
  43. 64ee263 DynamIQ: Enable MMU without using stack by Jeenu Viswambharan · 6 years ago
  44. 14c6016 AArch64: Introduce RAS handling by Jeenu Viswambharan · 6 years ago
  45. 76454ab AArch64: Introduce External Abort handling by Jeenu Viswambharan · 6 years ago
  46. ef653d9 AArch64: Refactor GP register restore to separate function by Jeenu Viswambharan · 6 years ago
  47. 2f37046 Add support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · 6 years ago
  48. c69145f Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch by davidcunado-arm · 6 years ago
  49. 883d1b5 Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · 6 years ago
  50. a6f340f Introduce the new BL handover interface by Soby Mathew · 6 years ago
  51. 4abd7fa Redefine SMC_UNK as -1 instead of 0xFFFFFFFF by Antonio Nino Diaz · 6 years ago
  52. 201ca5b runtime_exceptions: Save x4-x29 unconditionally by Dimitris Papastamos · 6 years ago
  53. 040f1e6 Merge pull request #1193 from jwerner-chromium/JW_coreboot by davidcunado-arm · 6 years ago
  54. f62ad32 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 6 years ago
  55. 155a100 utils_def: Add REGSZ and make BIT() assembly-compatible by Julius Werner · 6 years ago
  56. 91089f3 Move FPEXC32_EL2 to FP Context by David Cunado · 6 years ago
  57. 4d91838 Fix x30 reporting for unhandled exceptions by Julius Werner · 6 years ago
  58. 18f2efd Fully initialise essential control registers by David Cunado · 7 years ago
  59. 82cb2c1 Use SPDX license identifiers by dp-arm · 7 years ago
  60. bcc3c49 PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · 7 years ago
  61. 801cf93 Add and use plat_crash_console_flush() API by Antonio Nino Diaz · 7 years ago
  62. 510a9de Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · 7 years ago
  63. d50ece0 Simplify translation tables headers dependencies by Antonio Nino Diaz · 7 years ago
  64. 25a93f7 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · 7 years ago
  65. a806dad Define and use no_ret macro where no return is expected by Jeenu Viswambharan · 7 years ago
  66. a6ef439 Cosmetic change to exception table by Douglas Raillard · 7 years ago
  67. 872be88 Add PMF instrumentation points in TF by dp-arm · 7 years ago
  68. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 8 years ago
  69. 532ed61 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 8 years ago
  70. e0ae9fa Introduce some helper macros for exception vectors by Sandrine Bailleux · 8 years ago
  71. d448639 Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · 8 years ago
  72. 9ff67fa Dump platform-defined regs in crash reporting by Gerald Lejeune · 8 years ago
  73. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 8 years ago
  74. adb4fcf Enable asynchronous abort exceptions during boot by Gerald Lejeune · 8 years ago
  75. 1c3ea10 Remove all non-configurable dead loops by Antonio Nino Diaz · 8 years ago
  76. 1645d3e Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 8 years ago
  77. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 8 years ago
  78. bbf8f6f Move context management code to common location by Yatharth Kochar · 8 years ago
  79. 817ac8d Fix issue in Floating point register restore by Soby Mathew · 8 years ago
  80. 712038d Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu by danh-arm · 8 years ago
  81. a9bec67 Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · 8 years ago
  82. 5471841 Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · 8 years ago
  83. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 8 years ago
  84. 85a181c PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 8 years ago
  85. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 8 years ago
  86. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 8 years ago
  87. 52010cc Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  88. 5717aae Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  89. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  90. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 9 years ago
  91. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 9 years ago
  92. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 9 years ago
  93. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 9 years ago
  94. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 9 years ago
  95. add4035 Add CPU specific power management operations by Soby Mathew · 9 years ago
  96. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 9 years ago
  97. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 9 years ago
  98. c1efc4c Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 9 years ago
  99. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 9 years ago
  100. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 9 years ago