1. f1be00d Use correct type when reading SCR register by Louis Mayencourt · 4 years, 1 month ago
  2. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 5 years ago
  3. c9512bc Fix MISRA defects in BL31 common code by Antonio Nino Diaz · 5 years ago
  4. 82cb2c1 Use SPDX license identifiers by dp-arm · 7 years ago
  5. 4e0e0f4 Enable support for EL3 interrupt in IMF by Soby Mathew · 8 years ago
  6. 5c943f7 IMF: postpone SCR_EL3 update if context is not initialized by Juan Castillo · 8 years ago
  7. f4f1ae7 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 9 years ago
  8. d3280be Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  9. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago