1. 1ae7552 feat(fvp): emulate trapped RNDR by Andre Przywara · 1 year, 3 months ago
  2. ccd81f1 feat(el3-runtime): introduce system register trap handler by Andre Przywara · 1 year, 3 months ago
  3. 6e08cff fix(bl31): fix validate_el3_interrupt_rm preprocessor usage by Marco Felsch · 1 year, 6 months ago
  4. 7c2fe62 fix(bl31): allow use of EHF with S-EL2 SPMC by Raghu Krishnamurthy · 1 year, 7 months ago
  5. 5b18de0 feat(rme): add ENABLE_RME build option and support for RMM image by Zelalem Aweke · 2 years, 8 months ago
  6. f1be00d Use correct type when reading SCR register by Louis Mayencourt · 4 years, 1 month ago
  7. d5dfdeb Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 4 years, 8 months ago
  8. 88cfd9a BL31: Enable pointer authentication support by Antonio Nino Diaz · 5 years ago
  9. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 5 years ago
  10. c3cf06f Standardise header guards across codebase by Antonio Nino Diaz · 5 years ago
  11. c9512bc Fix MISRA defects in BL31 common code by Antonio Nino Diaz · 6 years ago
  12. 93c78ed libc: Fix all includes in codebase by Antonio Nino Diaz · 6 years ago
  13. 03b645e EHF: MISRA fixes by Jeenu Viswambharan · 6 years ago
  14. ba6e5ca SDEI: MISRA fixes by Jeenu Viswambharan · 6 years ago
  15. ca6d918 RAS: Allow individual interrupt registration by Jeenu Viswambharan · 6 years ago
  16. 14c6016 AArch64: Introduce RAS handling by Jeenu Viswambharan · 6 years ago
  17. 76454ab AArch64: Introduce External Abort handling by Jeenu Viswambharan · 6 years ago
  18. 73a9605 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · 6 years ago
  19. 7fabe1a Fix MISRA rule 8.4 in common code by Roberto Vargas · 6 years ago
  20. 9fb8af3 Fix MISRA rule 8.3 in common code by Roberto Vargas · 6 years ago
  21. af34cd7 EHF: Introduce preempted return code parameter to ehf_allow_ns_preemption() by Jeenu Viswambharan · 6 years ago
  22. 26ea390 Deprecate one EL3 interrupt routing model with EL3 exception handling by Jeenu Viswambharan · 6 years ago
  23. 3d732e2 BL31: Program Priority Mask for SMC handling by Jeenu Viswambharan · 6 years ago
  24. 21b818c BL31: Introduce Exception Handling Framework by Jeenu Viswambharan · 6 years ago
  25. c639e8e GIC: Allow specifying interrupt properties by Jeenu Viswambharan · 6 years ago
  26. fc529fe GIC: Add API to set interrupt routing by Jeenu Viswambharan · 6 years ago
  27. 030567e include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  28. 82cb2c1 Use SPDX license identifiers by dp-arm · 7 years ago
  29. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 8 years ago
  30. 532ed61 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 8 years ago
  31. da554d7 Fix coding guideline warnings by Soby Mathew · 8 years ago
  32. 4c0d039 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  33. 170fb93 Add optional PSCI STAT residency & count functions by Yatharth Kochar · 8 years ago
  34. ac1cc8e PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops by Soby Mathew · 8 years ago
  35. 65cd299 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 8 years ago
  36. 7b3aabc Use designated initialization in DECLARE_RT_SVC macro by Soby Mathew · 8 years ago
  37. 1645d3e Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 8 years ago
  38. bbf8f6f Move context management code to common location by Yatharth Kochar · 8 years ago
  39. 4e0e0f4 Enable support for EL3 interrupt in IMF by Soby Mathew · 8 years ago
  40. 7dc28e9 Merge pull request #390 from vikramkanigiri/at/unify_bakery_locks_v2 by Achin Gupta · 8 years ago
  41. ee7b35c Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 8 years ago
  42. f1054c9 Pass the target suspend level to SPD suspend hooks by Achin Gupta · 8 years ago
  43. 9d070b9 PSCI: Rework generic code to conform to coding guidelines by Soby Mathew · 9 years ago
  44. 617540d PSCI: Fix the return code for invalid entrypoint by Soby Mathew · 9 years ago
  45. 85a181c PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  46. 5c8babc PSCI: Add deprecated API for SPD when compatibility is disabled by Soby Mathew · 9 years ago
  47. 6748784 PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  48. 32bc85f PSCI: Implement platform compatibility layer by Soby Mathew · 9 years ago
  49. eb975f5 PSCI: Unify warm reset entry points by Sandrine Bailleux · 9 years ago
  50. 8ee2498 PSCI: Add framework to handle composite power states by Soby Mathew · 9 years ago
  51. 82dcc03 PSCI: Introduce new platform interface to describe topology by Soby Mathew · 9 years ago
  52. 12d0d00 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 9 years ago
  53. 4067dc3 PSCI: Remove references to affinity based power management by Soby Mathew · 9 years ago
  54. 6590ce2 PSCI: Invoke PM hooks only for the highest level by Soby Mathew · 9 years ago
  55. b48349e PSCI: Create new directory to implement new frameworks by Soby Mathew · 9 years ago
  56. c0aff0e PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · 9 years ago
  57. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 9 years ago
  58. f4f1ae7 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 9 years ago
  59. e8ca7d1 Increment the PSCI VERSION to 1.0 by Soby Mathew · 9 years ago
  60. 90e8258 Implement PSCI_FEATURES API by Soby Mathew · 9 years ago
  61. 8991eed Rework the PSCI migrate APIs by Soby Mathew · 9 years ago
  62. 539dced Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · 9 years ago
  63. 31244d7 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · 9 years ago
  64. e146f4c Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · 9 years ago
  65. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 9 years ago
  66. 0999734 Invalidate the dcache after initializing cpu-ops by Soby Mathew · 9 years ago
  67. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  68. a4a8eae Miscellaneous PSCI code cleanups by Achin Gupta · 10 years ago
  69. 0a46e2c Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 10 years ago
  70. 776b68a Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  71. 04fafce Add macro to flush per-CPU data by Achin Gupta · 10 years ago
  72. d5f1309 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  73. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  74. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  75. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  76. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  77. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  78. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  79. 6c0b45d Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  80. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  81. 5298f2c Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  82. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  83. aaba4f2 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  84. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  85. 08ab89d Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  86. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  87. dec5e0d Move BL porting functions into platform.h by Dan Handley · 10 years ago
  88. 7a9a5f2 Remove unused data declarations by Dan Handley · 10 years ago
  89. c6bc071 Remove extern keyword from function declarations by Dan Handley · 10 years ago
  90. 65335d4 Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  91. 8545a87 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  92. db0de0e Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  93. 3ea8540 Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  94. 239b04f Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 10 years ago
  95. b44a443 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 10 years ago
  96. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  97. e1333f7 Introduce interrupt registration framework in BL3-1 by Achin Gupta · 10 years ago
  98. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 10 years ago
  99. 6871c5d Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  100. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago