commit 22155ff5be724e3c642690bdfc68d42d82d22a98
author Lauren Wehrmeister <lauren.wehrmeister@arm.com> Fri Sep 29 23:55:57 2023 +0200
committer Lauren Wehrmeister <lauren.wehrmeister@arm.com> Fri Sep 29 23:56:14 2023 +0200
tree ebed459cce11dee85196a4344356310584cadace
parent cedd10db3037433db5026a0f698d807dafbab84c

Revert "fix: increase TSRAM of 'fvp-tbb-mbedtls-bl2-el3'"

This reverts commit c722e72dc12d1bf4d61ddb7e0a152b0cd9f68771.

Reason for revert: Caused failure

Change-Id: Id3286ad7e4ccaf9a2abf7ecf72c176fd31d6beb6

script/tf-coverity/tf-cov-make

diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 3d51ad6..26f92c6 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -52,7 +52,7 @@
 # Try all possible SPDs.
 clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
 clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
-    TSP_NS_INTR_ASYNC_PREEMPT=1 FVP_TRUSTED_SRAM_SIZE=384
+    TSP_NS_INTR_ASYNC_PREEMPT=1
 clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
 clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
 clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=pncd SPD_PNCD_NS_IRQ=126 SPD_PNCD_S_IRQ=15