commit 53060f8717626ee285caa8bdb81443c890ec6924
author Akshay Belsare <akshay.belsare@amd.com> Tue Jun 06 17:30:57 2023 +0530
committer Joanna Farley <joanna.farley@arm.com> Mon Jun 19 09:49:57 2023 +0200
tree e28aabe5291be4e360bdcac95c28f784ac021ec9
parent cdc85e2bbb5bb155d3c6be14b54723a0095bce3e

build(zynqmp): add config for CRC check

Add build config for zynqmp with IPI CRC check enabled.

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Change-Id: I6588b6072b9fd74962374a354dbcf8be2ff76ab5

group/tf-l1-build-plat/zynqmp-crcchk:nil

diff --git a/group/tf-l1-build-plat/zynqmp-crcchk:nil b/group/tf-l1-build-plat/zynqmp-crcchk:nil
new file mode 100644
index 0000000..53e6143
--- /dev/null
+++ b/group/tf-l1-build-plat/zynqmp-crcchk:nil
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+

tf_config/zynqmp-crcchk

diff --git a/tf_config/zynqmp-crcchk b/tf_config/zynqmp-crcchk
new file mode 100644
index 0000000..387f346
--- /dev/null
+++ b/tf_config/zynqmp-crcchk
@@ -0,0 +1,4 @@
+CROSS_COMPILE=aarch64-none-elf-
+PLAT=zynqmp
+RESET_TO_BL31=1
+IPI_CRC_CHECK=1