Sync test groups with internal CI
Signed-off-by: Zelalem <zelalem.aweke@arm.com>
Change-Id: I8bf270aaee4607c97b2706dd87328e8566be0261
diff --git a/group/tf-l3-code-coverage/fvp-aarch64-sdei-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-aarch64-sdei-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-aarch64-sdei-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-cpu-extensions:fvp-tftf-fip.tftf-aemv8a.sve.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-cpu-extensions:fvp-tftf-fip.tftf-aemv8a.sve.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-cpu-extensions:fvp-tftf-fip.tftf-aemv8a.sve.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.amu.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.amu.bmcov-debug
new file mode 100644
index 0000000..e5b5fb5
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.amu.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2020, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
\ No newline at end of file
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.singlecore.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.singlecore.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.singlecore.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-default-cc,fvp-xlat-v2:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-default-cc,fvp-xlat-v2:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-default-cc,fvp-xlat-v2:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-enable-runtime-instr-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-enable-runtime-instr-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-enable-runtime-instr-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-ext-pstate-ea-el3-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-ext-pstate-ea-el3-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-ext-pstate-ea-el3-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-no-cohmem-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-no-cohmem-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-no-cohmem-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-opteed-cc,fvp-default:fvp-tftf-optee-fip.tftf+bl32-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-opteed-cc,fvp-default:fvp-tftf-optee-fip.tftf+bl32-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-opteed-cc,fvp-default:fvp-tftf-optee-fip.tftf+bl32-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-pl33-cc,fvp-default:fvp-tftf-aemv8a.pl33.bmcov-debug b/group/tf-l3-code-coverage/fvp-pl33-cc,fvp-default:fvp-tftf-aemv8a.pl33.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-pl33-cc,fvp-default:fvp-tftf-aemv8a.pl33.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.assymetric.bmcov-debug b/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.assymetric.bmcov-debug
new file mode 100644
index 0000000..d52947d
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.assymetric.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2020, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.singlecore.bmcov-debug b/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.singlecore.bmcov-debug
new file mode 100644
index 0000000..d52947d
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-spm-mm-cc,fvp-spm-mm:fvp-tftf.cactus_mm-fip.tftf+bl32-aemv8a.singlecore.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2020, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-tspd-debug b/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-tspd-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.assymetric.bmcov-tspd-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-tspd-debug b/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-tspd-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-tspd-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-tspd-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-cc,fvp-fwu:fvp-tftf.fwu-aemv8a.bmcov-debug b/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-cc,fvp-fwu:fvp-tftf.fwu-aemv8a.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-cc,fvp-fwu:fvp-tftf.fwu-aemv8a.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
diff --git a/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-pauth-cc,fvp-fwu-pauth:fvp-tftf.fwu-aemv8a.8_5.bmcov-debug b/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-pauth-cc,fvp-fwu-pauth:fvp-tftf.fwu-aemv8a.8_5.bmcov-debug
new file mode 100644
index 0000000..c75b524
--- /dev/null
+++ b/group/tf-l3-code-coverage/fvp-tspd-tbb-mbedtls-pauth-cc,fvp-fwu-pauth:fvp-tftf.fwu-aemv8a.8_5.bmcov-debug
@@ -0,0 +1,6 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+