diff --git a/group/tf-l3-code-coverage-extensive/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug b/group/tf-l3-code-coverage-extensive/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
new file mode 100644
index 0000000..b452bbf
--- /dev/null
+++ b/group/tf-l3-code-coverage-extensive/fvp-tbb-mbedtls-rsa-ecdsa-with-rsa-rotpk-ecdsa-cert-cc,fvp-default:fvp-tftf-fip.tftf-aemv8a.bmcov-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2023 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#