fix: increase TSRAM of 'fvp-tbb-mbedtls-bl2-el3'
This build job is currently failing the errata framework
based cpu conversion patches due to lack of available
SRAM.
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
Change-Id: Ied03ad8dc5ecdf1f84f91ae737122176042800f0
(cherry picked from commit 40e5be98b3e227d74d0a26b2827f96c0b97de8c0)
diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 26f92c6..3d51ad6 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -52,7 +52,7 @@
# Try all possible SPDs.
clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd
clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} ARM_TSP_RAM_LOCATION=dram SPD=tspd TSP_INIT_ASYNC=1 \
- TSP_NS_INTR_ASYNC_PREEMPT=1
+ TSP_NS_INTR_ASYNC_PREEMPT=1 FVP_TRUSTED_SRAM_SIZE=384
clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=opteed
clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=tlkd
clean_build $fvp_common_flags ${ARM_TBB_OPTIONS} SPD=pncd SPD_PNCD_NS_IRQ=126 SPD_PNCD_S_IRQ=15
diff --git a/tf_config/fvp-tbb-mbedtls-bl2-el3 b/tf_config/fvp-tbb-mbedtls-bl2-el3
index 7b461d4..b4b9d1d 100644
--- a/tf_config/fvp-tbb-mbedtls-bl2-el3
+++ b/tf_config/fvp-tbb-mbedtls-bl2-el3
@@ -1,6 +1,7 @@
ARM_ROTPK_LOCATION=devel_rsa
BL2_AT_EL3=1
CROSS_COMPILE=aarch64-none-elf-
+FVP_TRUSTED_SRAM_SIZE=384
GENERATE_COT=1
PLAT=fvp
ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem