tc: Add support for TC1 platform
This includes scp-boot-tests, AP boot tests and MISRA checks.
The tc0 platform arguments have also been modified to include
TARGET_PLATFORM.
Change-Id: I6e90add83cb39435ad0487aaa09a0002a3fe33a5
Signed-off-by: Usama Arif <usama.arif@arm.com>
diff --git a/fvp_utils.sh b/fvp_utils.sh
index 5545a95..109d3fe 100644
--- a/fvp_utils.sh
+++ b/fvp_utils.sh
@@ -93,6 +93,7 @@
[css-rdn1edgex2]=";;;"
[css-sgi575]=";;;"
[tc0]=";;;"
+[tc1]=";;;"
)
diff --git a/group/scp-boot-tests/fvp-tc1,fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug b/group/scp-boot-tests/fvp-tc1,fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug
new file mode 100644
index 0000000..aa57540
--- /dev/null
+++ b/group/scp-boot-tests/fvp-tc1,fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/tf-l1-build-plat/fvp-tc1-tbb:nil b/group/tf-l1-build-plat/fvp-tc1-tbb:nil
new file mode 100644
index 0000000..aa57540
--- /dev/null
+++ b/group/tf-l1-build-plat/fvp-tc1-tbb:nil
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/tf-l2-coverity-misra-nominated/fvp-tc-tbb:coverity-tf-misra.diff b/group/tf-l2-coverity-misra-nominated/fvp-tc-tbb:coverity-tf-misra.diff
new file mode 100644
index 0000000..aa57540
--- /dev/null
+++ b/group/tf-l2-coverity-misra-nominated/fvp-tc-tbb:coverity-tf-misra.diff
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/group/tf-l2-coverity-misra-nominated/fvp-tc0-tbb:coverity-tf-misra.diff b/group/tf-l2-coverity-misra-nominated/fvp-tc0-tbb:coverity-tf-misra.diff
deleted file mode 100644
index d52947d..0000000
--- a/group/tf-l2-coverity-misra-nominated/fvp-tc0-tbb:coverity-tf-misra.diff
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Copyright (c) 2020, Arm Limited. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
diff --git a/group/tf-l3-boot-tests-css/fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug b/group/tf-l3-boot-tests-css/fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug
new file mode 100644
index 0000000..aa57540
--- /dev/null
+++ b/group/tf-l3-boot-tests-css/fvp-tc1-tbb:fvp-linux.tc1-fip.tc1-tc1-debug
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/tc0-ports.awk b/model/tc-ports.awk
similarity index 79%
rename from model/tc0-ports.awk
rename to model/tc-ports.awk
index dc5eb0f..9689612 100644
--- a/model/tc0-ports.awk
+++ b/model/tc-ports.awk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
diff --git a/model/tc1.sh b/model/tc1.sh
new file mode 100644
index 0000000..e3deb8c
--- /dev/null
+++ b/model/tc1.sh
@@ -0,0 +1,20 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+set_model_path "$warehouse/SysGen/SubSystemModels/11.15/20/models/$model_flavour/FVP_TC1"
+
+cat <<EOF >"$model_param_file"
+${bl1_bin+-C css.trustedBootROMloader.fname=$bl1_bin}
+${scp_romfw_bin+-C css.scp.ROMloader.fname=$scp_romfw_bin}
+${fip_bin+-C board.flashloader0.fname=$fip_bin}
+${initrd_bin+--data board.dram=$initrd_bin@${initrd_addr:?}}
+${kernel_bin+--data board.dram=$kernel_bin@${kernel_addr:?}}
+${uart0_out+-C soc.pl011_uart0.out_file=$uart0_out}
+${uart0_out+-C soc.pl011_uart0.unbuffered_output=1}
+${uart1_out+-C soc.pl011_uart1.out_file=$uart1_out}
+${uart1_out+-C soc.pl011_uart1.unbuffered_output=1}
+EOF
diff --git a/run_config/fvp-fip.tc1 b/run_config/fvp-fip.tc1
new file mode 100644
index 0000000..439ec70
--- /dev/null
+++ b/run_config/fvp-fip.tc1
@@ -0,0 +1,19 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+post_tf_build() {
+ url="$tc_prebuilts/u-boot.bin" fetch_file
+ archive_file "u-boot.bin"
+
+ # Use SCP binary from SCP build if it exists, or fetch pre-built ones.
+ if [ ! -f "$archive/scp_ramfw.bin" ]; then
+ url="$scp_prebuilts/scp_ramfw.bin" fetch_file
+ archive_file "scp_ramfw.bin"
+ fi
+
+ build_fip BL33="$archive/u-boot.bin" SCP_BL2="$archive/scp_ramfw.bin"
+}
diff --git a/run_config/fvp-linux.tc1 b/run_config/fvp-linux.tc1
new file mode 100644
index 0000000..a2ca995
--- /dev/null
+++ b/run_config/fvp-linux.tc1
@@ -0,0 +1,14 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2020 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+fetch_tf_resource() {
+ kernel_type="fvp-tc-kernel" get_kernel
+ initrd_type="fvp-tc-ramdisk" get_initrd
+ uart="1" set_primary="1" file="linux-rd-busybox.exp" track_expect
+
+ payload_type="linux" gen_fvp_yaml_template
+}
diff --git a/run_config/fvp-tc0 b/run_config/fvp-tc0
index ae079c9..4199743 100644
--- a/run_config/fvp-tc0
+++ b/run_config/fvp-tc0
@@ -20,7 +20,7 @@
local model="tc0"
model="$model" gen_model_params
- set_run_env "ports_script" "$ci_root/model/tc0-ports.awk"
+ set_run_env "ports_script" "$ci_root/model/tc-ports.awk"
set_run_env "num_uarts" "2"
uart="1" set_expect_variable "num_cpus" "8"
model="$model" gen_fvp_yaml
diff --git a/run_config/fvp-tc1 b/run_config/fvp-tc1
new file mode 100644
index 0000000..c401de8
--- /dev/null
+++ b/run_config/fvp-tc1
@@ -0,0 +1,27 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+fetch_tf_resource() {
+ # Use SCP binary from SCP build if it exists, or fetch pre-built ones.
+ if [ ! -f "$archive/scp_romfw.bin" ]; then
+ url="$scp_prebuilts/scp_romfw.bin" fetch_file
+ archive_file "scp_romfw.bin"
+ fi
+
+ # Hold scp terminal_s0
+ uart="0" file="hold_uart.exp" track_expect
+}
+
+post_fetch_tf_resource() {
+ local model="tc1"
+
+ model="$model" gen_model_params
+ set_run_env "ports_script" "$ci_root/model/tc-ports.awk"
+ set_run_env "num_uarts" "2"
+ uart="1" set_expect_variable "num_cpus" "8"
+ model="$model" gen_fvp_yaml
+}
diff --git a/scp_config/fvp-tc1 b/scp_config/fvp-tc1
new file mode 100644
index 0000000..e157f90
--- /dev/null
+++ b/scp_config/fvp-tc1
@@ -0,0 +1,3 @@
+CC=/arm/pdsw/downloads/scp-models/tools/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-gcc
+PRODUCT=tc1
+LOG_LEVEL=WARN
diff --git a/script/tf-coverity/tf-cov-make b/script/tf-coverity/tf-cov-make
index 5122931..7f42acb 100755
--- a/script/tf-coverity/tf-cov-make
+++ b/script/tf-coverity/tf-cov-make
@@ -260,9 +260,10 @@
FPGA_PRELOADED_DTB_BASE=0x88000000 PRELOADED_BL33_BASE=0x82080000 all
#
-# Total Compute platform
+# Total Compute platforms
#
-make $(common_flags) PLAT=tc0 ${ARM_TBB_OPTIONS} all
+make $(common_flags) PLAT=tc TARGET_PLATFORM=0 ${ARM_TBB_OPTIONS} all
+make $(common_flags) PLAT=tc TARGET_PLATFORM=1 ${ARM_TBB_OPTIONS} all
#
# Morello platform
diff --git a/script/trusted-firmware.nomination.py b/script/trusted-firmware.nomination.py
index cc3b1b7..13af088 100644
--- a/script/trusted-firmware.nomination.py
+++ b/script/trusted-firmware.nomination.py
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+# Copyright (c) 2019-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -28,9 +28,9 @@
"tf-l3-boot-tests-css/fvp-sgi575-tbb,fvp-sgi575-default:fvp-tftf-fip.tftf-sgi575",
"tf-l2-coverity-misra-nominated/fvp-sgi575-tbb:coverity-tf-misra.diff"],
- # Run Coverity MISRA checks for tc0 platform changes
- "path:plat/arm/board/tc0":
- ["tf-l2-coverity-misra-nominated/fvp-tc0-tbb:coverity-tf-misra.diff"],
+ # Run Coverity MISRA checks for tc platform changes
+ "path:plat/arm/board/tc":
+ ["tf-l2-coverity-misra-nominated/fvp-tc-tbb:coverity-tf-misra.diff"],
# Run Coverity MISRA checks for n1sdp platform changes
"path:plat/arm/board/n1sdp":
diff --git a/tc1_utils.sh b/tc1_utils.sh
new file mode 100644
index 0000000..9893d11
--- /dev/null
+++ b/tc1_utils.sh
@@ -0,0 +1,20 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+source "$ci_root/fvp_utils.sh"
+
+tc_prebuilts="${tc_prebuilts:-$tfa_downloads/total_compute/tc1}"
+
+# Pre-built SCP v2.8.0 release binaries
+scp_prebuilts="${scp_prebuilts:-$tfa_downloads/total_compute_scp_2.8.0/tc1}"
+
+fvp_kernels[fvp-tc-kernel]="$tc_prebuilts/Image"
+fvp_initrd_urls[fvp-tc-ramdisk]="$tc_prebuilts/uInitrd-busybox.0x88000000"
+
+initrd_addr=0x8000000
+kernel_addr=0x80000
+scp_ram_addr=0x0bd80000
diff --git a/tf_config/fvp-tc0-tbb b/tf_config/fvp-tc0-tbb
index 1e3ab65..6092980 100644
--- a/tf_config/fvp-tc0-tbb
+++ b/tf_config/fvp-tc0-tbb
@@ -1,7 +1,8 @@
ARM_ROTPK_LOCATION=devel_rsa
CROSS_COMPILE=aarch64-none-elf-
GENERATE_COT=1
-PLAT=tc0
+PLAT=tc
+TARGET_PLATFORM=0
ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
SCP_BL2=/dev/null
TRUSTED_BOARD_BOOT=1
diff --git a/tf_config/fvp-tc1-tbb b/tf_config/fvp-tc1-tbb
new file mode 100644
index 0000000..843dbfe
--- /dev/null
+++ b/tf_config/fvp-tc1-tbb
@@ -0,0 +1,8 @@
+ARM_ROTPK_LOCATION=devel_rsa
+CROSS_COMPILE=aarch64-none-elf-
+GENERATE_COT=1
+PLAT=tc
+TARGET_PLATFORM=1
+ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
+SCP_BL2=/dev/null
+TRUSTED_BOARD_BOOT=1