diff --git a/group/spm-l2-boot-tests/fvp-default,fvp-context-mgmt-spm,fvp-context-mgmt:fvp-spm.ctx b/group/spm-l2-boot-tests/fvp-default,fvp-context-mgmt-spm,fvp-context-mgmt:fvp-spm.ctx
new file mode 100644
index 0000000..19363ec
--- /dev/null
+++ b/group/spm-l2-boot-tests/fvp-default,fvp-context-mgmt-spm,fvp-context-mgmt:fvp-spm.ctx
@@ -0,0 +1,5 @@
+#
+# Copyright (c) 2024 Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
diff --git a/model/base-aemva-common.sh b/model/base-aemva-common.sh
index 00f1bf5..018e576 100644
--- a/model/base-aemva-common.sh
+++ b/model/base-aemva-common.sh
@@ -106,6 +106,9 @@
 # Enable FEAT_GCS
 reset_var has_gcs
 
+# Enable FEAT_FGT2
+reset_var has_fgt2
+
 # Layout of MPIDR. 0=AFF0 is CPUID, 1=AFF1 is CPUID
 reset_var mpidr_layout
 
@@ -380,6 +383,13 @@
 EOF
 fi
 
+if [ "$arch_version" = "9.3" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster0.has_arm_v9-3=1
+-C cluster1.has_arm_v9-3=1
+EOF
+fi
+
 if [ "$arch_version" = "9.4" ]; then
 	cat <<EOF >>"$model_param_file"
 -C cluster0.has_arm_v9-4=1
@@ -455,6 +465,13 @@
 EOF
 fi
 
+if [ "$has_fgt2" = "1" ]; then
+	cat <<EOF >>"$model_param_file"
+-C cluster0.has_fgt2=2
+-C cluster1.has_fgt2=2
+EOF
+fi
+
 if [ "$has_ecv" = "1" ]; then
 	cat <<EOF >>"$model_param_file"
 -C cluster0.ecv_support_level=2
diff --git a/run_config/fvp-spm.ctx b/run_config/fvp-spm.ctx
new file mode 100644
index 0000000..4e4d17c
--- /dev/null
+++ b/run_config/fvp-spm.ctx
@@ -0,0 +1,56 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+pre_tftf_build() {
+	targets="tftf cactus ivy" set_tftf_build_targets
+}
+
+post_tf_build() {
+	build_fip BL33="$archive/tftf.bin" BL32="$archive/secure_hafnium.bin"
+}
+
+generate_lava_job_template() {
+	payload_type="tftf" gen_yaml_template
+}
+
+generate_lava_job() {
+	local model="base-aemv8a"
+
+	uart="0" file="tftf.exp" track_expect
+	uart="1" file="hold_uart.exp" track_expect
+
+	# SPM(reference implementation of S-EL2 firmware) has SMMUv3 driver
+	# enabled to help with stage-2 translation and virtualization of
+	# upstream peripheral devices. Hence, enable the SMMUv3 IP in FVP
+	# by configuring the appropriate parameters of the SMMUv3 AEM.
+
+	# FEAT_FGT, FEAT_VHE, FEAT_RAS, FEAT_RASv1p1, FEAT_NV2, FEAT_TRF and
+	# FEAT_HCX are enabled implicitly due to the architecture version
+	# being set to ARMv9.3.
+
+	model="$model" \
+		arch_version="9.3" \
+		has_branch_target_exception="1" \
+		has_smmuv3_params="1" \
+		memory_tagging_support_level="2" \
+		amu_present="1" \
+		has_fgt2="1" \
+		has_ecv="1" \
+		has_csv2_2="1" \
+		has_s1pie="1" \
+		has_s2pie="1" \
+		has_s1poe="1" \
+		has_gcs="1" \
+		has_mpam="1" \
+		gicd_are_fixed_one="1" \
+		gicv3_ext_interrupt_range="1" \
+		gicd_ext_ppi_count="64" \
+		gicd_ext_spi_count="1024" \
+		gen_model_params
+
+	model="$model" gen_fvp_yaml
+}
diff --git a/tf_config/fvp-context-mgmt-spm b/tf_config/fvp-context-mgmt-spm
new file mode 100644
index 0000000..4a7837d
--- /dev/null
+++ b/tf_config/fvp-context-mgmt-spm
@@ -0,0 +1,12 @@
+CROSS_COMPILE=aarch64-none-elf-
+CTX_INCLUDE_AARCH32_REGS=0
+PLAT=fvp
+SPD=spmd
+SPMD_SPM_AT_SEL2=1
+ARM_ARCH_MAJOR=8
+ARM_ARCH_MINOR=5
+BRANCH_PROTECTION=1
+ENABLE_FEAT_MTE2=1
+SP_LAYOUT_FILE=${tftf_root}/build/fvp/${bin_mode}/sp_layout.json
+GIC_EXT_INTID=1
+PLAT_TEST_SPM=1