feat(qemu): add secure_qemu_aarch64 target
Add a build target for Hafnium to run at S-EL2 with qemu.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I329bf7778529515b0655b8921904cfdf4b2a1414
diff --git a/BUILD.gn b/BUILD.gn
index acd1f9d..6f33e96 100644
--- a/BUILD.gn
+++ b/BUILD.gn
@@ -16,6 +16,7 @@
"//src:hafnium(:rpi4_clang)",
"//src:hafnium(:secure_aem_v8a_fvp_clang)",
"//src:hafnium(:secure_aem_v8a_fvp_vhe_clang)",
+ "//src:hafnium(:secure_qemu_aarch64_clang)",
"//src:hafnium(:secure_tc_clang)",
"//src/arch/aarch64/qemuloader:bl(:qemu_aarch64_clang)",
"//src/arch/aarch64/qemuloader:bl(:qemu_aarch64_vhe_clang)",
@@ -204,6 +205,33 @@
}
}
+aarch64_toolchains("secure_qemu_aarch64") {
+ cpu = "cortex-a57"
+ origin_address = "0xe100000"
+ boot_flow = "//src/boot_flow:spmc"
+ console = "//src/arch/aarch64/pl011"
+ iommu = "//src/iommu:absent"
+ gic_version = 3
+ gicd_base_address = "0x08000000"
+ gicr_base_address = "0x080A0000"
+ gicr_frames = 8
+ heap_pages = 180
+ max_cpus = 8
+ max_vms = 16
+ branch_protection = "standard"
+ toolchain_args = {
+ plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
+ plat_psci = "//src/arch/aarch64/plat/psci:spmc"
+ plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
+ secure_world = "1"
+ pl011_base_address = "0x09000000"
+ hftest_ctrl = "//test/hftest:ctrl_uart"
+ enable_vhe = "1"
+ enable_mte = "1"
+ plat_log_level = "LOG_LEVEL_INFO"
+ }
+}
+
aarch64_toolchains("rpi4") {
cpu = "cortex-a72"
origin_address = "0x80000"
diff --git a/secure_qemu_aarch64/BUILD.gn b/secure_qemu_aarch64/BUILD.gn
new file mode 100644
index 0000000..a27dbfb
--- /dev/null
+++ b/secure_qemu_aarch64/BUILD.gn
@@ -0,0 +1,8 @@
+# Copyright 2023 The Hafnium Authors.
+#
+# Use of this source code is governed by a BSD-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/BSD-3-Clause.
+
+source_set("secure_qemu_aarch64") {
+}