BUILD.gn

# Copyright 2018 The Hafnium Authors.
#
# Use of this source code is governed by a BSD-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/BSD-3-Clause.

import("//build/toolchain/embedded.gni")
import("//build/toolchain/host.gni")

group("aem_v8a_fvp_vhe") {
  deps = [ "//src:hafnium(:aem_v8a_fvp_vhe_clang)" ]
}

group("qemu_aarch64_vhe") {
  deps = [ "//src:hafnium(:qemu_aarch64_vhe_clang)" ]
}

group("rpi4") {
  deps = [ "//src:hafnium(:rpi4_clang)" ]
}

group("secure_aem_v8a_fvp_vhe") {
  deps = [ "//src:hafnium(:secure_aem_v8a_fvp_vhe_clang)" ]
}

group("secure_qemu_aarch64") {
  deps = [ "//src:hafnium(:secure_qemu_aarch64_clang)" ]
}

group("secure_tc") {
  deps = [ "//src:hafnium(:secure_tc_clang)" ]
}

group("secure_rd_fremont") {
  deps = [ "//src:hafnium(:secure_rd_fremont_clang)" ]
}

group("secure_rd_fremont_cfg1") {
  deps = [ "//src:hafnium(:secure_rd_fremont_cfg1_clang)" ]
}

group("root") {
  deps = [
    ":aem_v8a_fvp_vhe",
    ":qemu_aarch64_vhe",
    ":rpi4",
    ":secure_aem_v8a_fvp_vhe",
    ":secure_qemu_aarch64",
    ":secure_rd_fremont",
    ":secure_rd_fremont_cfg1",
    ":secure_tc",
    "//src/arch/aarch64/qemuloader:bl(:qemu_aarch64_vhe_clang)",
  ]
}

group("test_root") {
  testonly = true

  deps = [
    "//src:unit_tests(:host_fake_clang)",
    "//test/arch(:aem_v8a_fvp_vhe_clang)",
    "//test/arch(:qemu_aarch64_vhe_clang)",
    "//test/arch(:rpi4_clang)",
    "//test/linux(:aem_v8a_fvp_vhe_vm_clang)",
    "//test/linux(:qemu_aarch64_vhe_vm_clang)",
    "//test/linux(:rpi4_vm_clang)",
    "//test/vmapi:partitions(:secure_aem_v8a_fvp_vhe_vm_clang)",
    "//test/vmapi(:aem_v8a_fvp_vhe_vm_clang)",
    "//test/vmapi(:qemu_aarch64_vhe_vm_clang)",
    "//test/vmapi(:rpi4_vm_clang)",
    "//test/vmapi/arch/aarch64/gicv3:gicv3_test(:aem_v8a_fvp_vhe_vm_clang)",
    "//test/vmapi/arch/aarch64/gicv3:gicv3_test(:qemu_aarch64_vhe_vm_clang)",
  ]
}

# Describe each of the platforms used in this project.

host_toolchain("host_fake") {
  use_platform = true
  heap_pages = 60
  max_cpus = 4
  max_vms = 6
}

# RD (Reference Design) is a collection of resources to provide a representative
# view of typical compute subsystems that can be designed and implemented using
# specific generations of Arm IP. RD-Fremont is the first RD platform with Realm
# Management Extension (RME) support.
# For more information please refer:
# https://neoverse-reference-design.docs.arm.com/en/latest/platforms/rdfremont/readme.html
aarch64_toolchains("secure_rd_fremont") {
  cpu = "cortex-a57"
  origin_address = "0xF9000000"
  boot_flow = "//src/boot_flow:spmc"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/iommu:absent"
  gic_version = 4
  gicd_base_address = "0x30000000"
  gicr_base_address = "0x301C0000"
  gicr_frames = 16
  heap_pages = 180
  max_cpus = 16
  max_vms = 16
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
    plat_psci = "//src/arch/aarch64/plat/psci:spmc"
    plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
    secure_world = "1"
    pl011_base_address = "0x2A410000"
    enable_mte = "1"
    plat_log_level = "LOG_LEVEL_INFO"
    plat_num_virtual_interrupts_ids = 1024
  }
}

aarch64_toolchains("secure_rd_fremont_cfg1") {
  cpu = "cortex-a57"
  origin_address = "0xF9000000"
  boot_flow = "//src/boot_flow:spmc"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/iommu:absent"
  gic_version = 4
  gicd_base_address = "0x30000000"
  gicr_base_address = "0x30100000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 8
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
    plat_psci = "//src/arch/aarch64/plat/psci:spmc"
    plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
    secure_world = "1"
    pl011_base_address = "0x2A410000"
    enable_mte = "1"
    plat_log_level = "LOG_LEVEL_INFO"
    plat_num_virtual_interrupts_ids = 1024
  }
}

aarch64_toolchains("secure_aem_v8a_fvp_vhe") {
  cpu = "cortex-a57"
  origin_address = "0x06000000"
  boot_flow = "//src/boot_flow:spmc"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/arch/aarch64/arm_smmuv3"
  gic_version = 3
  gic_enable_espi = 1
  gicd_base_address = "0x2f000000"
  gicr_base_address = "0x2f100000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 16
  branch_protection = "standard"
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
    plat_psci = "//src/arch/aarch64/plat/psci:spmc"
    plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
    secure_world = "1"
    pl011_base_address = "0x1c090000"
    smmu_base_address = "0x2b400000"
    smmu_memory_size = "0x100000"
    enable_mte = "1"
    plat_log_level = "LOG_LEVEL_INFO"
    plat_num_virtual_interrupts_ids = 5120
  }
}

aarch64_toolchains("aem_v8a_fvp_vhe") {
  cpu = "cortex-a57"
  origin_address = "0x80000000"
  boot_flow = "//src/boot_flow:linux"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/arch/aarch64/arm_smmuv3"
  gic_version = 3
  gicd_base_address = "0x2f000000"
  gicr_base_address = "0x2f100000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 16
  branch_protection = "standard"
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:hypervisor"
    pl011_base_address = "0x1c090000"
    smmu_base_address = "0x2b400000"
    smmu_memory_size = "0x100000"
    plat_log_level = "LOG_LEVEL_INFO"
  }
}

aarch64_toolchains("qemu_aarch64_vhe") {
  cpu = "cortex-a57"
  origin_address = "0x40001000"
  boot_flow = "//src/boot_flow:linux"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/iommu:absent"
  gic_version = 3
  gicd_base_address = "0x08000000"
  gicr_base_address = "0x080A0000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 16
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:hypervisor"
    pl011_base_address = "0x09000000"
    plat_log_level = "LOG_LEVEL_INFO"
  }
}

aarch64_toolchains("secure_qemu_aarch64") {
  cpu = "cortex-a57"
  origin_address = "0xe100000"
  boot_flow = "//src/boot_flow:spmc"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/iommu:absent"
  gic_version = 3
  gicd_base_address = "0x08000000"
  gicr_base_address = "0x080A0000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 16
  branch_protection = "standard"
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
    plat_psci = "//src/arch/aarch64/plat/psci:spmc"
    plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
    secure_world = "1"
    pl011_base_address = "0x09000000"
    hftest_ctrl = "//test/hftest:ctrl_uart"
    enable_mte = "1"
    plat_log_level = "LOG_LEVEL_INFO"
    plat_num_virtual_interrupts_ids = 1024
  }
}

aarch64_toolchains("rpi4") {
  cpu = "cortex-a72"
  origin_address = "0x80000"
  boot_flow = "//src/boot_flow:linux"
  console = "//project/reference/rpi4:mini_uart"
  iommu = "//src/iommu:absent"
  gic_version = 2
  heap_pages = 180
  max_cpus = 4
  max_vms = 16
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:hypervisor"
    gpio_base_address = "0xfe200000"
    aux_base_address = "0xfe215000"
    core_freq_mhz = 500
    hftest_ctrl = "//test/hftest:ctrl_uart"
    plat_log_level = "LOG_LEVEL_INFO"
  }
}

# The Total Compute platform provides an envelope for Arm's latest client IPs.
# Release notes and user manual for the open source software stack targeting
# the Total Compute Fixed Virtual Platform (FVP) are found here:
# https://totalcompute.docs.arm.com/en/latest/
aarch64_toolchains("secure_tc") {
  cpu = "cortex-a57"
  origin_address = "0xfd000000"
  boot_flow = "//src/boot_flow:spmc"
  console = "//src/arch/aarch64/pl011"
  iommu = "//src/iommu:absent"
  gic_version = 4
  gicd_base_address = "0x30000000"
  gicr_base_address = "0x30080000"
  gicr_frames = 8
  heap_pages = 180
  max_cpus = 8
  max_vms = 16
  toolchain_args = {
    plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
    plat_psci = "//src/arch/aarch64/plat/psci:spmc"
    plat_interrupts = "//src/arch/aarch64/plat/interrupts:gicv3"
    secure_world = "1"
    pl011_base_address = "0x7ff80000"
    enable_mte = "1"
    plat_log_level = "LOG_LEVEL_INFO"
    plat_num_virtual_interrupts_ids = 1024
  }
}