Merge branch 'develop' of https://github.com/ARM-software/CMSIS_5 into develop
diff --git a/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_Kernel.txt b/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_Kernel.txt
index 6290113..5784ce6 100644
--- a/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_Kernel.txt
+++ b/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_Kernel.txt
@@ -64,10 +64,29 @@
The RTOS kernel does not start thread switching until the function osKernelStart is called.
<b> Code Example:</b>
-\code{.c}
+#include "RTE_Components.h"
+#include CMSIS_device_header
+#include "cmsis_os2.h"
+
+/*----------------------------------------------------------------------------
+ * Application main thread
+ *---------------------------------------------------------------------------*/
+void app_main (void *argument) {
+
+ // ...
+ for (;;) {}
+}
+
int main (void) {
- osKernelInitialize (); // initialize CMSIS-RTOS at first
- ; // ...
+
+ // System Initialization
+ SystemCoreClockUpdate();
+ // ...
+
+ osKernelInitialize(); // Initialize CMSIS-RTOS
+ osThreadNew(app_main, NULL, NULL); // Create application main thread
+ osKernelStart(); // Start thread execution
+ for (;;) {}
}
\endcode
diff --git a/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_MigrationGuide.txt b/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_MigrationGuide.txt
index 01d0844..f0556e0 100644
--- a/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_MigrationGuide.txt
+++ b/CMSIS/DoxyGen/RTOS2/src/cmsis_os2_MigrationGuide.txt
@@ -28,6 +28,7 @@
- System Configuration->Global Dynamic Memory size
- Kernel Tick Frequency
- Thread Configuration->Default Thread Stack size
+ - Details are found in \ref config_rtx
-# Rename function int \b main (void) to void \b app_main (void *arg).
Create new function int main (void) which implements at least:
- System initialization and configuration
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Abstract.txt b/CMSIS/RTOS2/RTX/Examples/Blinky/Abstract.txt
similarity index 100%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Abstract.txt
rename to CMSIS/RTOS2/RTX/Examples/Blinky/Abstract.txt
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.c b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.c
similarity index 94%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.c
rename to CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.c
index 479ffcc..d9425c5 100644
--- a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.c
+++ b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.c
@@ -32,12 +32,14 @@
osThreadId_t tid_phaseD; /* Thread id of thread: phase_d */
osThreadId_t tid_clock; /* Thread id of thread: clock */
-#define LED_A 0
-#define LED_B 1
-#define LED_C 2
-#define LED_D 3
-#define LED_CLK 7
+struct phases_t {
+ int_fast8_t phaseA;
+ int_fast8_t phaseB;
+ int_fast8_t phaseC;
+ int_fast8_t phaseD;
+} g_phases;
+osMutexId_t phases_mut_id;
/*----------------------------------------------------------------------------
* Switch LED on
@@ -72,9 +74,9 @@
void phaseA (void *argument) {
for (;;) {
osThreadFlagsWait(0x0001, osFlagsWaitAny ,osWaitForever); /* wait for an event flag 0x0001 */
- Switch_On (LED_A);
+ g_phases.phaseA = 1;
signal_func(tid_phaseB); /* call common signal function */
- Switch_Off(LED_A);
+ g_phases.phaseA = 0;
}
}
@@ -84,9 +86,9 @@
void phaseB (void *argument) {
for (;;) {
osThreadFlagsWait(0x0001, osFlagsWaitAny, osWaitForever); /* wait for an event flag 0x0001 */
- Switch_On (LED_B);
+ g_phases.phaseB = 1;
signal_func(tid_phaseC); /* call common signal function */
- Switch_Off(LED_B);
+ g_phases.phaseB = 0;
}
}
@@ -96,9 +98,9 @@
void phaseC (void *argument) {
for (;;) {
osThreadFlagsWait(0x0001, osFlagsWaitAny, osWaitForever); /* wait for an event flag 0x0001 */
- Switch_On (LED_C);
+ g_phases.phaseC = 1;
signal_func(tid_phaseD); /* call common signal function */
- Switch_Off(LED_C);
+ g_phases.phaseC = 0;
}
}
@@ -108,9 +110,9 @@
void phaseD (void *argument) {
for (;;) {
osThreadFlagsWait(0x0001, osFlagsWaitAny, osWaitForever); /* wait for an event flag 0x0001 */
- Switch_On (LED_D);
+ g_phases.phaseD = 1;
signal_func(tid_phaseA); /* call common signal function */
- Switch_Off(LED_D);
+ g_phases.phaseD = 0;
}
}
@@ -120,9 +122,7 @@
void clock (void *argument) {
for (;;) {
osThreadFlagsWait(0x0100, osFlagsWaitAny, osWaitForever); /* wait for an event flag 0x0100 */
- Switch_On (LED_CLK);
osDelay(80); /* delay 80ms */
- Switch_Off(LED_CLK);
}
}
@@ -157,3 +157,4 @@
while(1);
}
+
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvguix b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvguix
similarity index 100%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvguix
rename to CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvguix
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvoptx b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvoptx
similarity index 68%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvoptx
rename to CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvoptx
index 5cdf428..4ca3357 100644
--- a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvoptx
+++ b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvoptx
@@ -145,9 +145,33 @@
<Name>-UV0510N9E -O207 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FC1000 -FD20000000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
- <Breakpoint/>
+ <Breakpoint>
+ <Bp>
+ <Number>0</Number>
+ <Type>0</Type>
+ <LineNumber>106</LineNumber>
+ <EnabledFlag>1</EnabledFlag>
+ <Address>0</Address>
+ <ByteObject>0</ByteObject>
+ <HtxType>0</HtxType>
+ <ManyObjects>0</ManyObjects>
+ <SizeOfObject>0</SizeOfObject>
+ <BreakByAccess>0</BreakByAccess>
+ <BreakIfRCount>0</BreakIfRCount>
+ <Filename>.\Blinky.c</Filename>
+ <ExecCommand></ExecCommand>
+ <Expression></Expression>
+ </Bp>
+ </Breakpoint>
+ <WatchWindow1>
+ <Ww>
+ <count>0</count>
+ <WinNumber>1</WinNumber>
+ <ItemText>g_phases.phaseD</ItemText>
+ </Ww>
+ </WatchWindow1>
<ScvdPack>
- <Filename>C:\Keil\ARM\PACK\ARM\CMSIS\5.0.0-Beta15\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
+ <Filename>C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.0.0-Beta15\CMSIS\RTOS2\RTX\RTX5.scvd</Filename>
<Type>ARM.CMSIS.5.0.0-Beta15</Type>
<SubType>1</SubType>
</ScvdPack>
@@ -171,10 +195,10 @@
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
- <aLa>0</aLa>
+ <aLa>1</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
- <aSer4>1</aSer4>
+ <aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
@@ -186,6 +210,30 @@
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
+ <bAutoGenD>0</bAutoGenD>
+ <bAuto2GenD>0</bAuto2GenD>
+ <LogicAnalyzers>
+ <Wi>
+ <IntNumber>0</IntNumber>
+ <FirstString>`g_phases.phaseA</FirstString>
+ <SecondString>FF0000000000000000000000000000000000F03F00000000000000000000000000000000675F7068617365732E70686173654100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000D03F1A000000000000000000000000000000000000009A020000</SecondString>
+ </Wi>
+ <Wi>
+ <IntNumber>1</IntNumber>
+ <FirstString>`g_phases.phaseB</FirstString>
+ <SecondString>008000000000000000000000000000000000F03F00000000000000000000000000000000675F7068617365732E70686173654200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000002000000000000000000D03F1A000000000000000000000000000000000000009A020000</SecondString>
+ </Wi>
+ <Wi>
+ <IntNumber>2</IntNumber>
+ <FirstString>`g_phases.phaseC</FirstString>
+ <SecondString>000080000000000000000000000000000000F03F00000000000000000000000000000000675F7068617365732E70686173654300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000003000000000000000000D03F1A000000000000000000000000000000000000009A020000</SecondString>
+ </Wi>
+ <Wi>
+ <IntNumber>3</IntNumber>
+ <FirstString>`g_phases.phaseD</FirstString>
+ <SecondString>000000000000C0FFFFFFDFC10000C0FFFFFFDF4101000000000000000000000000000000675F7068617365732E70686173654400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000004000000000000000000D03F1A000000000000000000000000000000000000009A020000</SecondString>
+ </Wi>
+ </LogicAnalyzers>
<DebugDescription>
<Enable>1</Enable>
<EnableLog>0</EnableLog>
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvprojx b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvprojx
similarity index 99%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvprojx
rename to CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvprojx
index 6f29cca..854510d 100644
--- a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/Blinky.uvprojx
+++ b/CMSIS/RTOS2/RTX/Examples/Blinky/Blinky.uvprojx
@@ -453,7 +453,7 @@
</file>
<file attr="config" category="source" name="CMSIS\RTOS2\RTX\Config\RTX_Config.c" version="5.0.0">
<instance index="0">RTE\CMSIS\RTX_Config.c</instance>
- <component Capiversion="2.0" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.0.0-Alpha" condition="RTOS2 RTX5"/>
+ <component Capiversion="2.0" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cvendor="ARM" Cversion="5.0.0" condition="RTOS2 RTX5"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.0-Beta15"/>
<targetInfos>
<targetInfo name="Simulation"/>
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/CMSIS/RTX_Config.c b/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/CMSIS/RTX_Config.c
similarity index 100%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/CMSIS/RTX_Config.c
rename to CMSIS/RTOS2/RTX/Examples/Blinky/RTE/CMSIS/RTX_Config.c
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/Device/ARMCM3/startup_ARMCM3.s b/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/startup_ARMCM3.s
similarity index 100%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/Device/ARMCM3/startup_ARMCM3.s
rename to CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/startup_ARMCM3.s
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/Device/ARMCM3/system_ARMCM3.c b/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/system_ARMCM3.c
similarity index 100%
rename from CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/RTE/Device/ARMCM3/system_ARMCM3.c
rename to CMSIS/RTOS2/RTX/Examples/Blinky/RTE/Device/ARMCM3/system_ARMCM3.c
diff --git a/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/_Simulation/RTE_Components.h b/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/_Simulation/RTE_Components.h
new file mode 100644
index 0000000..7eff768
--- /dev/null
+++ b/CMSIS/RTOS2/RTX/Examples/Blinky/RTE/_Simulation/RTE_Components.h
@@ -0,0 +1,24 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'Blinky'
+ * Target: 'Simulation'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM3.h"
+
+#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
+ #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
+#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
+ #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/DebugConfig/Simulation_LPC1857.dbgconf b/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/DebugConfig/Simulation_LPC1857.dbgconf
deleted file mode 100644
index 6bda414..0000000
--- a/CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky/DebugConfig/Simulation_LPC1857.dbgconf
+++ /dev/null
@@ -1,31 +0,0 @@
-// <<< Use Configuration Wizard in Context Menu >>>
-
-// <h> Debug Setup
-
-// <o> Vector Reset
-// <0=> Processor Only
-// <1=> Processor and Peripherals
-// <i> Select if to additionally reset peripherals after a Vector Reset
-VecResetWithPeriph = 1;
-
-// </h>
-
-// <h> TPIU Pin Routing (TRACECLK fixed on PF_4)
-// <i> Configure the TPIU pin routing as used on your target platform.
-// <o.1> TRACEDATA0
-// <0=> Pin PF_5
-// <1=> Pin P7_4
-// <o.2> TRACEDATA1
-// <0=> Pin PF_6
-// <1=> Pin P7_5
-// <o.3> TRACEDATA2
-// <0=> Pin PF_7
-// <1=> Pin P7_6
-// <o.4> TRACEDATA3
-// <0=> Pin PF_8
-// <1=> Pin P7_7
-RoutingTPIU = 0x00000000;
-
-// </h>
-
-// <<< end of configuration section >>>
\ No newline at end of file
diff --git a/CMSIS/RTOS2/RTX/Template/Events.c b/CMSIS/RTOS2/RTX/Template/Events.c
index 058f573..75dc1fe 100644
--- a/CMSIS/RTOS2/RTX/Template/Events.c
+++ b/CMSIS/RTOS2/RTX/Template/Events.c
@@ -43,8 +43,8 @@
void Thread_EventSender (void *argument)
{
- while (1) {
- evt_id = osEventFlagsNew(NULL);
+ evt_id = osEventFlagsNew(NULL);
+ while (1) {
osEventFlagsSet(evt_id, FLAGS_MSK1);
osThreadYield (); // suspend thread
}
diff --git a/CMSIS/RTOS2/RTX/Template/main.c b/CMSIS/RTOS2/RTX/Template/main.c
index 89e8a88..c9a366b 100644
--- a/CMSIS/RTOS2/RTX/Template/main.c
+++ b/CMSIS/RTOS2/RTX/Template/main.c
@@ -26,3 +26,4 @@
osKernelStart(); // Start thread execution
for (;;) {}
}
+