Record new Armv8.1-M RTX5 libraries for IAR compiler
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 41c6ff2..c201d5f 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -1085,16 +1085,25 @@
<condition id="ARMv8-MML Device">
<description>Armv8-M main line architecture based device</description>
<accept Dcore="ARMV8MML"/>
- <accept Dcore="ARMV81MML"/>
<accept Dcore="Cortex-M33"/>
<accept Dcore="Cortex-M35P"/>
- <accept Dcore="Cortex-M55"/>
<accept Dcore="Star-MC1"/>
</condition>
+ <condition id="ARMv81-MML Device">
+ <description>Armv8.1-M main line architecture based device</description>
+ <accept Dcore="ARMV81MML"/>
+ <accept Dcore="Cortex-M55"/>
+ </condition>
+ <condition id="ARMv8x-MML Device">
+ <description>Armv8-M/Armv8.1-M architecture based device</description>
+ <accept condition="ARMv8-MML Device"/>
+ <accept condition="ARMv81-MML Device"/>
+ </condition>
<condition id="ARMv8-M Device">
<description>Armv8-M architecture based device</description>
<accept condition="ARMv8-MBL Device"/>
<accept condition="ARMv8-MML Device"/>
+ <accept condition="ARMv81-MML Device"/>
</condition>
<condition id="ARMv6_7-M Device">
<description>Armv6_7-M architecture based device</description>
@@ -1361,17 +1370,17 @@
<require Dendian="Little-endian"/>
</condition>
<condition id="ARMCC ARMv8-MML NOFP LE">
- <description>Arm Compiler for Armv8-M main line architecture without FPU/MVE (little endian)</description>
+ <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
<require condition="ARMCC"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
<require Dendian="Little-endian"/>
<require Dfpu="NO_FPU"/>
<require Dmve="NO_MVE"/>
</condition>
<condition id="ARMCC ARMv8-MML FP LE">
- <description>Arm Compiler for Armv8-M main line architecture with FPU/MVE (little endian)</description>
+ <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
<require condition="ARMCC"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
<require Dendian="Little-endian"/>
<accept Dfpu="SP_FPU"/>
<accept Dfpu="DP_FPU"/>
@@ -1428,17 +1437,17 @@
<require Dendian="Little-endian"/>
</condition>
<condition id="GCC ARMv8-MML NOFP LE">
- <description>GNU Compiler for Armv8-M main line architecture without FPU/MVE (little endian)</description>
+ <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
<require condition="GCC"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
<require Dendian="Little-endian"/>
<require Dfpu="NO_FPU"/>
<require Dmve="NO_MVE"/>
</condition>
<condition id="GCC ARMv8-MML FP LE">
- <description>GNU Compiler for Armv8-M main line architecture with FPU/MVE (little endian)</description>
+ <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
<require condition="GCC"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
<require Dendian="Little-endian"/>
<accept Dfpu="SP_FPU"/>
<accept Dfpu="DP_FPU"/>
@@ -1495,20 +1504,35 @@
<require Dendian="Little-endian"/>
</condition>
<condition id="IARCC ARMv8-MML NOFP LE">
- <description>IAR Compiler for Armv8-M main line architecture without FPU/MVE (little endian)</description>
+ <description>IAR Compiler for Armv8-M main line architecture without FPU (little endian)</description>
<require condition="IAR"/>
<require condition="ARMv8-MML Device"/>
<require Dendian="Little-endian"/>
<require Dfpu="NO_FPU"/>
- <require Dmve="NO_MVE"/>
</condition>
- <condition id="IARCC ARMv8-MML FP LE">
- <description>IAR Compiler for Armv8-M main line architecture with FPU/MVE (little endian)</description>
+ <condition id="IARCC ARMv8-MML FP LE">
+ <description>IAR Compiler for Armv8-M main line architecture with FPU (little endian)</description>
<require condition="IAR"/>
<require condition="ARMv8-MML Device"/>
<require Dendian="Little-endian"/>
<accept Dfpu="SP_FPU"/>
<accept Dfpu="DP_FPU"/>
+ </condition>
+ <condition id="IARCC ARMv81-MML NOFP LE">
+ <description>IAR Compiler for Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
+ <require condition="IAR"/>
+ <require condition="ARMv81-MML Device"/>
+ <require Dendian="Little-endian"/>
+ <require Dfpu="NO_FPU"/>
+ <require Dmve="NO_MVE"/>
+ </condition>
+ <condition id="IARCC ARMv81-MML FP LE">
+ <description>IAR Compiler for Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
+ <require condition="IAR"/>
+ <require condition="ARMv81-MML Device"/>
+ <require Dendian="Little-endian"/>
+ <accept Dfpu="SP_FPU"/>
+ <accept Dfpu="DP_FPU"/>
<accept Dmve="MVE"/>
<accept Dmve="FP_MVE"/>
</condition>
@@ -1553,9 +1577,9 @@
<require condition="ARMv8-MBL Device"/>
</condition>
<condition id="GNUASM ARMv8-MML">
- <description>GNU Assembler for Armv8-M main line architecture</description>
+ <description>GNU Assembler for Armv8-M/Armv8.1-M main line architecture</description>
<require condition="ARMCC GCC"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
</condition>
<condition id="IARASM ARMv8-MBL">
<description>IAR Assembler for Armv8-M base line architecture</description>
@@ -1565,7 +1589,7 @@
<condition id="IARASM ARMv8-MML">
<description>IAR Assembler for Armv8-M main line architecture</description>
<require condition="IAR"/>
- <require condition="ARMv8-MML Device"/>
+ <require condition="ARMv8x-MML Device"/>
</condition>
<condition id="ARMASM ARMv7-A">
@@ -2440,26 +2464,28 @@
<!-- RTX libraries (CPU and Compiler dependent) -->
<!-- ARMCC -->
- <file category="library" condition="ARMCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
<!-- GCC -->
- <file category="library" condition="GCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
<!-- IAR -->
- <file category="library" condition="IARCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv6-M LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv7-M FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MM.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv81-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
<component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
@@ -2498,17 +2524,19 @@
<!-- RTX libraries (CPU and Compiler dependent) -->
<!-- ARMCC -->
- <file category="library" condition="ARMCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="ARMCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="ARMCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
<!-- GCC -->
- <file category="library" condition="GCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="GCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="GCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
<!-- IAR -->
- <file category="library" condition="IARCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
- <file category="library" condition="IARCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MBL LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv8-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
+ <file category="library" condition="IARCC ARMv81-MML FP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
<component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">