RTX5: Corrected SysTick and SVC Interrupt Priority for Cortex-M.
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 1e4273f..67a56e8 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -14,6 +14,8 @@
- added GCC startup and linker script for Cortex-A9
CMSIS-Core(M): 5.0.3 (see revision history for details)
- Added MPU Functions for ARMv8-M for Cortex-M23/M33.
+ CMSIS-RTOS2:
+ - RTX 5.2.1 (see revision history for details)
</release>
<release version="5.1.0" date="2017-08-04">
CMSIS-Core(M): 5.0.2 (see revision history for details)
@@ -2419,7 +2421,7 @@
</component>
<!-- CMSIS-RTOS Keil RTX5 component -->
- <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
+ <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.1" Capiversion="1.0.0" condition="RTOS RTX5">
<description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2435,7 +2437,7 @@
</component>
<!-- CMSIS-RTOS2 Keil RTX5 component -->
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
<description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2504,7 +2506,7 @@
<file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
<description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2555,7 +2557,7 @@
<file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5">
<description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2638,7 +2640,7 @@
<file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
<description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->
@@ -2695,7 +2697,7 @@
<file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
</files>
</component>
- <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
+ <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
<description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
<RTE_Components_h>
<!-- the following content goes into file 'RTE_Components.h' -->