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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / e928a674c0494494c8fddf919ed3fdc84382c6e6 / . / ARM.CMSIS.pdsc
blob: ee35c931a9313648f0966b901a8a8f057df5bfbc [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
Joachim Krecha33860c2016-11-09 22:25:55 +0100[diff] [blame]7 <!-- <license>license.txt</license> -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]11 <release version="5.1.1-dev2">
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]12 Active development...
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]13 CMSIS-Core(M): 5.0.3 (see revision history for details)
14 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
15 </release>
16 <release version="5.1.1-dev1">
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]17 Devices:
18 - added GCC startup and linker script for Cortex-A9
Jonatan Antonif40ab952017-08-09 14:57:14 +0200[diff] [blame]19 CMSIS-Core(M): 5.0.3 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]20 - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
Jonatan Antonif49445f2017-09-14 14:17:57 +0200[diff] [blame]21 - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
Jonatan Antoni9568ea52017-09-07 13:50:59 +0200[diff] [blame]22 CMSIS-Core(A): 1.0.1 (see revision history for details)
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]23 CMSIS-Driver:
24 - CAN Driver API V1.2.0
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]25 CMSIS-RTOS:
26 - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
27 CMSIS-RTOS2:
28 - RTX 5.2.1 (see revision history for details)
29 - Message Queue Example
30 - Memory Pool Example
31 </release>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]32 <release version="5.1.0" date="2017-08-04">
33 CMSIS-Core(M): 5.0.2 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]34 - Changed Version Control macros to be core agnostic.
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]35 - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
36 CMSIS-Core(A): 1.0.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]37 - Initial release
38 - IRQ Controller API 1.0.0
39 CMSIS-Driver: 2.05 (see revision history for details)
40 - All typedefs related to status have been made volatile.
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]41 CMSIS-RTOS2:
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]42 - API 2.1.1 (see revision history for details)
43 - RTX 5.2.0 (see revision history for details)
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]44 - OS Tick API 1.0.0
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]45 CMSIS-DSP: 1.5.2 (see revision history for details)
46 - Fixed GNU Compiler specific diagnostics.
Jonatan Antoni31e48e62017-08-04 11:26:18 +0200[diff] [blame]47 CMSIS-PACK: 1.5.0 (see revision history for details)
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]48 - added System Description File (*.SDF) Format
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]49 CMSIS-Zone: 0.0.1 (Preview)
50 - Initial specification draft
51 </release>
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]52 <release version="5.0.1" date="2017-02-03">
53 Package Description:
54 - added taxonomy for Cclass RTOS
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]55 CMSIS-RTOS2:
Joachim Krech3ef97132017-02-03 15:09:58 +0100[diff] [blame]56 - API 2.1 (see revision history for details)
57 - RTX 5.1.0 (see revision history for details)
58 CMSIS-Core: 5.0.1 (see revision history for details)
59 - Added __PACKED_STRUCT macro
60 - Added uVisior support
61 - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
62 - Updated template for secure main function (main_s.c)
63 - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
64 CMSIS-DSP: 1.5.1 (see revision history for details)
65 - added ARMv8M DSP libraries.
66 CMSIS-PACK:1.4.9 (see revision history for details)
67 - added Pack Index File specification and schema file
Martin Güntherd1060532016-11-15 09:43:43 +0100[diff] [blame]68 </release>
Joachim Krechc45bb4a2016-11-11 11:01:22 +0100[diff] [blame]69 <release version="5.0.0" date="2016-11-11">
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]70 Changed open source license to Apache 2.0
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]71 CMSIS_Core:
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]72 - Added support for Cortex-M23 and Cortex-M33.
73 - Added ARMv8-M device configurations for mainline and baseline.
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]74 - Added CMSE support and thread context management for TrustZone for ARMv8-M
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]75 - Added cmsis_compiler.h to unify compiler behaviour.
76 - Updated function SCB_EnableICache (for Cortex-M7).
77 - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
78 CMSIS-RTOS:
79 - bug fix in RTX 4.82 (see revision history for details)
80 CMSIS-RTOS2:
81 - new API including compatibility layer to CMSIS-RTOS
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]82 - reference implementation based on RTX5
83 - supports all Cortex-M variants including TrustZone for ARMv8-M
ReinhardKeil0d399052016-10-21 13:40:52 +0200[diff] [blame]84 CMSIS-SVD:
85 - reworked SVD format documentation
Joachim Krech655f7242016-09-29 15:49:24 +0200[diff] [blame]86 - removed SVD file database documentation as SVD files are distributed in packs
87 - updated SVDConv for Win32 and Linux
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]88 CMSIS-DSP:
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]89 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
90 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]91 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]92 <release version="4.5.0" date="2015-10-28">
93 - CMSIS-Core 4.30.0 (see revision history for details)
94 - CMSIS-DAP 1.1.0 (unchanged)
95 - CMSIS-Driver 2.04.0 (see revision history for details)
96 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
97 - CMSIS-PACK 1.4.1 (see revision history for details)
98 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
99 - CMSIS-SVD 1.3.1 (see revision history for details)
100 </release>
101 <release version="4.4.0" date="2015-09-11">
102 - CMSIS-Core 4.20 (see revision history for details)
103 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
104 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
105 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
106 - CMSIS-RTOS
107 -- API 1.02 (unchanged)
108 -- RTX 4.79 (see revision history for details)
109 - CMSIS-SVD 1.3.0 (see revision history for details)
110 - CMSIS-DAP 1.1.0 (extended with SWO support)
111 </release>
112 <release version="4.3.0" date="2015-03-20">
113 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
114 - CMSIS-DSP 1.4.5 (see revision history for details)
115 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
116 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
117 - CMSIS-RTOS
118 -- API 1.02 (unchanged)
119 -- RTX 4.78 (see revision history for details)
120 - CMSIS-SVD 1.2 (unchanged)
121 </release>
122 <release version="4.2.0" date="2014-09-24">
123 Adding Cortex-M7 support
124 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
125 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
126 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
127 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
128 - CMSIS-RTOS RTX 4.75 (see revision history for details)
129 </release>
130 <release version="4.1.1" date="2014-06-30">
131 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
132 </release>
133 <release version="4.1.0" date="2014-06-12">
134 - CMSIS-Driver 2.02 (incompatible update)
135 - CMSIS-Pack 1.3 (see revision history for details)
136 - CMSIS-DSP 1.4.2 (unchanged)
137 - CMSIS-Core 3.30 (unchanged)
138 - CMSIS-RTOS RTX 4.74 (unchanged)
139 - CMSIS-RTOS API 1.02 (unchanged)
140 - CMSIS-SVD 1.10 (unchanged)
141 PACK:
142 - removed G++ specific files from PACK
143 - added Component Startup variant "C Startup"
144 - added Pack Checking Utility
145 - updated conditions to reflect tool-chain dependency
146 - added Taxonomy for Graphics
147 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
148 </release>
149 <release version="4.0.0">
150 - CMSIS-Driver 2.00 Preliminary (incompatible update)
151 - CMSIS-Pack 1.1 Preliminary
152 - CMSIS-DSP 1.4.2 (see revision history for details)
153 - CMSIS-Core 3.30 (see revision history for details)
154 - CMSIS-RTOS RTX 4.74 (see revision history for details)
155 - CMSIS-RTOS API 1.02 (unchanged)
156 - CMSIS-SVD 1.10 (unchanged)
157 </release>
158 <release version="3.20.4">
159 - CMSIS-RTOS 4.74 (see revision history for details)
160 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
161 </release>
162 <release version="3.20.3">
163 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
164 - CMSIS-RTOS 4.73 (see revision history for details)
165 </release>
166 <release version="3.20.2">
167 - CMSIS-Pack documentation has been added
168 - CMSIS-Drivers header and documentation have been added to PACK
169 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
170 </release>
171 <release version="3.20.1">
172 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
173 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
174 </release>
175 <release version="3.20.0">
176 The software portions that are deployed in the application program are now under a BSD license which allows usage
177 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
178 The individual components have been update as listed below:
179 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
180 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
181 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
182 - CMSIS-SVD is unchanged.
183 </release>
184 </releases>
185
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]186 <taxonomy>
187 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
188 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
189 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
190 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
191 <description Cclass="File System">File Drive Support and File System</description>
192 <description Cclass="Graphics">Graphical User Interface</description>
193 <description Cclass="Network">Network Stack using Internet Protocols</description>
194 <description Cclass="USB">Universal Serial Bus Stack</description>
Joachim Krech2384b8a2017-02-02 15:58:30 +0100[diff] [blame]195 <description Cclass="Compiler">Compiler Software Extensions</description>
Joachim Krech62838c82017-02-02 15:54:57 +0100[diff] [blame]196 <description Cclass="RTOS">Real-time Operating System</description>
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]197 </taxonomy>
198
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]199 <devices>
200 <!-- ****************************** Cortex-M0 ****************************** -->
201 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]202 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]203 <description>
204The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
205- simple, easy-to-use programmers model
206- highly efficient ultra-low power operation
207- excellent code density
208- deterministic, high-performance interrupt handling
209- upward compatibility with the rest of the Cortex-M processor family.
210 </description>
211 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
212 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
213 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
214 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
215
216 <device Dname="ARMCM0">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]217 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]218 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
219 </device>
220 </family>
221
222 <!-- ****************************** Cortex-M0P ****************************** -->
223 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]224 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]225 <description>
226The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
227- simple, easy-to-use programmers model
228- highly efficient ultra-low power operation
229- excellent code density
230- deterministic, high-performance interrupt handling
231- upward compatibility with the rest of the Cortex-M processor family.
232 </description>
233 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
234 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
235 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
236 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
237
238 <device Dname="ARMCM0P">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]239 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]240 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
241 </device>
242 </family>
243
244 <!-- ****************************** Cortex-M3 ****************************** -->
245 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]246 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]247 <description>
248The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
249- simple, easy-to-use programmers model
250- highly efficient ultra-low power operation
251- excellent code density
252- deterministic, high-performance interrupt handling
253- upward compatibility with the rest of the Cortex-M processor family.
254 </description>
255 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
256 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
257 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
258 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
259
260 <device Dname="ARMCM3">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]261 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]262 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
263 </device>
264 </family>
265
266 <!-- ****************************** Cortex-M4 ****************************** -->
267 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]268 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]269 <description>
270The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
271- simple, easy-to-use programmers model
272- highly efficient ultra-low power operation
273- excellent code density
274- deterministic, high-performance interrupt handling
275- upward compatibility with the rest of the Cortex-M processor family.
276 </description>
277 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
278 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
279 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
280 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
281
282 <device Dname="ARMCM4">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]283 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]284 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
285 </device>
286
287 <device Dname="ARMCM4_FP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]288 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]289 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
290 </device>
291 </family>
292
293 <!-- ****************************** Cortex-M7 ****************************** -->
294 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]295 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]296 <description>
Martin Güntheraa246272016-11-15 16:01:05 +0100[diff] [blame]297The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]298- simple, easy-to-use programmers model
299- highly efficient ultra-low power operation
300- excellent code density
301- deterministic, high-performance interrupt handling
302- upward compatibility with the rest of the Cortex-M processor family.
303 </description>
304 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
305 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
306 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
307 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
308
309 <device Dname="ARMCM7">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]310 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]311 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
312 </device>
313
314 <device Dname="ARMCM7_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]315 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]316 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
317 </device>
318
319 <device Dname="ARMCM7_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]320 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]321 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
322 </device>
323 </family>
324
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]325 <!-- ****************************** Cortex-M23 ********************** -->
326 <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
327 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
328 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]329The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]330It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]331Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]332 </description>
333 <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]334 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
335 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]336 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]337 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]338 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
339
340 <device Dname="ARMCM23">
341 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
342 <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
343 </device>
344
345 <device Dname="ARMCM23_TZ">
346 <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
347 <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
348 </device>
349 </family>
350
351 <!-- ****************************** Cortex-M33 ****************************** -->
352 <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
353 <!--book name="Device/ARM/Documents/??_dgug.pdf" title="?? Device Generic Users Guide"/-->
354 <description>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]355The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]356class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]357 </description>
358 <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]359 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
360 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]361 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]362 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
363 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]364
365 <device Dname="ARMCM33">
366 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]367 <description>
368 no DSP Instructions, no Floating Point Unit, no TrustZone
369 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]370 <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
371 </device>
372
373 <device Dname="ARMCM33_TZ">
374 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]375 <description>
376 no DSP Instructions, no Floating Point Unit, TrustZone
377 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]378 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
379 </device>
380
381 <device Dname="ARMCM33_DSP_FP">
382 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]383 <description>
384 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
385 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]386 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
387 </device>
388
389 <device Dname="ARMCM33_DSP_FP_TZ">
390 <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]391 <description>
392 DSP Instructions, Single Precision Floating Point Unit, TrustZone
393 </description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]394 <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
395 </device>
396 </family>
397
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]398 <!-- ****************************** ARMSC000 ****************************** -->
399 <family Dfamily="ARM SC000" Dvendor="ARM:82">
400 <description>
401The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
402- simple, easy-to-use programmers model
403- highly efficient ultra-low power operation
404- excellent code density
405- deterministic, high-performance interrupt handling
406 </description>
407 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
408 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
409 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
410 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
411
412 <device Dname="ARMSC000">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]413 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]414 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
415 </device>
416 </family>
417
418 <!-- ****************************** ARMSC300 ****************************** -->
419 <family Dfamily="ARM SC300" Dvendor="ARM:82">
420 <description>
421The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
422- simple, easy-to-use programmers model
423- highly efficient ultra-low power operation
424- excellent code density
425- deterministic, high-performance interrupt handling
426 </description>
427 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
428 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
429 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
430 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
431
432 <device Dname="ARMSC300">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]433 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]434 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
435 </device>
436 </family>
437
438 <!-- ****************************** ARMv8-M Baseline ********************** -->
439 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
440 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
441 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]442ARMv8-M Baseline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]443 </description>
444 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]445 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
446 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]447 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]448 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]449 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
450
451 <device Dname="ARMv8MBL">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]452 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]453 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
454 </device>
455 </family>
456
457 <!-- ****************************** ARMv8-M Mainline ****************************** -->
458 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
459 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
460 <description>
ReinhardKeile2b27022016-11-03 16:04:36 +0100[diff] [blame]461ARMv8-M Mainline based device with TrustZone
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]462 </description>
463 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]464 <memory id="IROM1" start="0x00000000" size="0x00200000" startup="1" default="1"/>
465 <memory id="IROM2" start="0x00200000" size="0x00200000" startup="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]466 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
Joachim Krech7eb01292016-11-04 17:17:05 +0100[diff] [blame]467 <memory id="IRAM2" start="0x20200000" size="0x00020000" init ="0" default="0"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]468 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
469
470 <device Dname="ARMv8MML">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]471 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]472 <description>
473 no DSP Instructions, no Floating Point Unit, TrustZone
474 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]475 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
476 </device>
477
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]478 <device Dname="ARMv8MML_DSP">
479 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]480 <description>
481 DSP Instructions, no Floating Point Unit, TrustZone
482 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]483 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]484 </device>
485
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]486 <device Dname="ARMv8MML_SP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]487 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]488 <description>
489 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
490 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]491 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
492 </device>
493
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]494 <device Dname="ARMv8MML_DSP_SP">
495 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]496 <description>
497 DSP Instructions, Single Precision Floating Point Unit, TrustZone
498 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]499 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]500 </device>
501
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]502 <device Dname="ARMv8MML_DP">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]503 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]504 <description>
505 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
506 </description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]507 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
508 </device>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]509
510 <device Dname="ARMv8MML_DSP_DP">
511 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
Joachim Kreche66f42b2017-02-02 17:03:31 +0100[diff] [blame]512 <description>
513 DSP Instructions, Double Precision Floating Point Unit, TrustZone
514 </description>
Martin Günther3afee7b2016-11-03 13:25:14 +0100[diff] [blame]515 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]516 </device>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]517 </family>
518
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]519 <!-- ****************************** Cortex-A5 ****************************** -->
520 <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
521 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
522 <description>
523The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
524virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
525ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
526 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]527
528 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
529 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
530
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]531 <device Dname="ARMCA5">
532 <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
533 <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
534 </device>
535 </family>
536
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]537 <!-- ****************************** Cortex-A7 ****************************** -->
538 <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
539 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
540 <description>
541The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
542The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
543an optional integrated GIC, and an optional L2 cache controller.
544 </description>
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]545
546 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
547 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
548
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]549 <device Dname="ARMCA7">
550 <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
551 <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
552 </device>
553 </family>
554
555 <!-- ****************************** Cortex-A9 ****************************** -->
556 <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]557 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]558 <description>
559The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
560The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
561and 8-bit Java bytecodes in Jazelle state.
562 </description>
563
Jonatan Antonif2884012017-08-29 16:59:49 +0200[diff] [blame]564 <memory id="IROM1" start="0x80000000" size="0x00200000" startup="1" default="1"/>
565 <memory id="IRAM1" start="0x80200000" size="0x00200000" init ="0" default="1"/>
566
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]567 <device Dname="ARMCA9">
568 <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
569 <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
570 </device>
571 </family>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]572 </devices>
573
574
575 <apis>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]576 <!-- CMSIS Device API -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]577 <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
578 <description>Device interrupt controller interface</description>
579 <files>
580 <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
581 </files>
582 </api>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]583 <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
Robert Rostoharaeb6dd52017-06-09 14:17:43 +0200[diff] [blame]584 <description>RTOS Kernel system tick timer interface</description>
Robert Rostohar6e5621b2017-06-09 12:55:56 +0200[diff] [blame]585 <files>
586 <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
587 </files>
588 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]589 <!-- CMSIS-RTOS API -->
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]590 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]591 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
592 <files>
593 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
594 </files>
595 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]596 <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]597 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
598 <files>
599 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
Robert Rostohar0a364052017-01-25 12:35:54 +0100[diff] [blame]600 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]601 </files>
602 </api>
Robert Rostohar9470b0b2017-06-09 09:38:31 +0200[diff] [blame]603 <!-- CMSIS Driver API -->
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]604 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]605 <description>USART Driver API for Cortex-M</description>
606 <files>
607 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
608 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
609 </files>
610 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]611 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]612 <description>SPI Driver API for Cortex-M</description>
613 <files>
614 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
615 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
616 </files>
617 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]618 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]619 <description>SAI Driver API for Cortex-M</description>
620 <files>
621 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
622 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
623 </files>
624 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]625 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]626 <description>I2C Driver API for Cortex-M</description>
627 <files>
628 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
629 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
630 </files>
631 </api>
Robert Rostohar3bb9b772017-09-13 15:24:14 +0200[diff] [blame]632 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]633 <description>CAN Driver API for Cortex-M</description>
634 <files>
635 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
636 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
637 </files>
638 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]639 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]640 <description>Flash Driver API for Cortex-M</description>
641 <files>
642 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
643 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
644 </files>
645 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]646 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]647 <description>MCI Driver API for Cortex-M</description>
648 <files>
649 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
650 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
651 </files>
652 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]653 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]654 <description>NAND Flash Driver API for Cortex-M</description>
655 <files>
656 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
657 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
658 </files>
659 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]660 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]661 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
662 <files>
663 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
664 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
665 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
666 </files>
667 </api>
Robert Rostohareff06772017-01-12 11:19:01 +0100[diff] [blame]668 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]669 <description>Ethernet MAC Driver API for Cortex-M</description>
670 <files>
671 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
672 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
673 </files>
674 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]675 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]676 <description>Ethernet PHY Driver API for Cortex-M</description>
677 <files>
678 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
679 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
680 </files>
681 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]682 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]683 <description>USB Device Driver API for Cortex-M</description>
684 <files>
685 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
686 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
687 </files>
688 </api>
Robert Rostohar9098a472017-02-02 17:59:12 +0100[diff] [blame]689 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]690 <description>USB Host Driver API for Cortex-M</description>
691 <files>
692 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
693 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
694 </files>
695 </api>
696 </apis>
697
698 <!-- conditions are dependency rules that can apply to a component or an individual file -->
699 <conditions>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]700 <!-- compiler -->
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]701 <condition id="ARMCC6">
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]702 <accept Tcompiler="ARMCC" Toptions="AC6"/>
703 <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]704 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]705 <condition id="ARMCC5">
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]706 <require Tcompiler="ARMCC" Toptions="AC5"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]707 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]708 <condition id="ARMCC">
709 <require Tcompiler="ARMCC"/>
710 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]711 <condition id="GCC">
712 <require Tcompiler="GCC"/>
713 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]714 <condition id="IAR">
715 <require Tcompiler="IAR"/>
716 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]717 <condition id="ARMCC GCC">
718 <accept Tcompiler="ARMCC"/>
719 <accept Tcompiler="GCC"/>
720 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]721 <condition id="ARMCC GCC IAR">
722 <accept Tcompiler="ARMCC"/>
723 <accept Tcompiler="GCC"/>
724 <accept Tcompiler="IAR"/>
725 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]726
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]727 <!-- ARM architecture -->
728 <condition id="ARMv6-M Device">
729 <description>ARMv6-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]730 <accept Dcore="Cortex-M0"/>
731 <accept Dcore="Cortex-M0+"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]732 <accept Dcore="SC000"/>
733 </condition>
734 <condition id="ARMv7-M Device">
735 <description>ARMv7-M architecture based device</description>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]736 <accept Dcore="Cortex-M3"/>
737 <accept Dcore="Cortex-M4"/>
738 <accept Dcore="Cortex-M7"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]739 <accept Dcore="SC300"/>
740 </condition>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]741 <condition id="ARMv8-M Device">
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]742 <description>ARMv8-M architecture based device</description>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]743 <accept Dcore="ARMV8MBL"/>
744 <accept Dcore="ARMV8MML"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]745 <accept Dcore="Cortex-M23"/>
746 <accept Dcore="Cortex-M33"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]747 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]748 <condition id="ARMv8-M TZ Device">
749 <description>ARMv8-M architecture based device with TrustZone</description>
750 <require condition="ARMv8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]751 <require Dtz="TZ"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]752 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]753 <condition id="ARMv6_7-M Device">
754 <description>ARMv6_7-M architecture based device</description>
755 <accept condition="ARMv6-M Device"/>
756 <accept condition="ARMv7-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]757 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]758 <condition id="ARMv6_7_8-M Device">
759 <description>ARMv6_7_8-M architecture based device</description>
760 <accept condition="ARMv6-M Device"/>
761 <accept condition="ARMv7-M Device"/>
762 <accept condition="ARMv8-M Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]763 </condition>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]764 <condition id="ARMv7-A Device">
765 <description>ARMv7-A architecture based device</description>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]766 <accept Dcore="Cortex-A5"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]767 <accept Dcore="Cortex-A7"/>
768 <accept Dcore="Cortex-A9"/>
769 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]770
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]771 <!-- ARM core -->
772 <condition id="CM0">
773 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
774 <accept Dcore="Cortex-M0"/>
775 <accept Dcore="Cortex-M0+"/>
776 <accept Dcore="SC000"/>
777 </condition>
778 <condition id="CM3">
779 <description>Cortex-M3 or SC300 processor based device</description>
780 <accept Dcore="Cortex-M3"/>
781 <accept Dcore="SC300"/>
782 </condition>
783 <condition id="CM4">
784 <description>Cortex-M4 processor based device</description>
785 <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
786 </condition>
787 <condition id="CM4_FP">
788 <description>Cortex-M4 processor based device using Floating Point Unit</description>
789 <require Dcore="Cortex-M4" Dfpu="FPU"/>
790 </condition>
791 <condition id="CM7">
792 <description>Cortex-M7 processor based device</description>
793 <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
794 </condition>
795 <condition id="CM7_FP">
796 <description>Cortex-M7 processor based device using Floating Point Unit</description>
797 <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
798 <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
799 </condition>
800 <condition id="CM7_SP">
801 <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
802 <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
803 </condition>
804 <condition id="CM7_DP">
805 <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
806 <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
807 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]808 <condition id="CM23">
809 <description>Cortex-M23 processor based device</description>
810 <require Dcore="Cortex-M23"/>
811 </condition>
812 <condition id="CM33">
813 <description>Cortex-M33 processor based device</description>
814 <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
815 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]816 <condition id="CM33_FP">
817 <description>Cortex-M33 processor based device using Floating Point Unit</description>
818 <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
819 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]820 <condition id="ARMv8MBL">
821 <description>ARMv8-M Baseline processor based device</description>
822 <require Dcore="ARMV8MBL"/>
823 </condition>
824 <condition id="ARMv8MML">
825 <description>ARMv8-M Mainline processor based device</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]826 <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
827 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]828 <condition id="ARMv8MML_FP">
829 <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
830 <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
831 <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]832 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]833
834 <condition id="CM33_NODSP_NOFPU">
835 <description>CM33, no DSP, no FPU</description>
836 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
837 </condition>
838 <condition id="CM33_DSP_NOFPU">
839 <description>CM33, DSP, no FPU</description>
840 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
841 </condition>
842 <condition id="CM33_NODSP_SP">
843 <description>CM33, no DSP, SP FPU</description>
844 <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
845 </condition>
846 <condition id="CM33_DSP_SP">
847 <description>CM33, DSP, SP FPU</description>
848 <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
849 </condition>
850
851 <condition id="ARMv8MML_NODSP_NOFPU">
852 <description>ARMv8MML, no DSP, no FPU</description>
853 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
854 </condition>
855 <condition id="ARMv8MML_DSP_NOFPU">
856 <description>ARMv8MML, DSP, no FPU</description>
857 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
858 </condition>
859 <condition id="ARMv8MML_NODSP_SP">
860 <description>ARMv8MML, no DSP, SP FPU</description>
861 <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]862 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]863 <condition id="ARMv8MML_DSP_SP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]864 <description>ARMv8MML, DSP, SP FPU</description>
865 <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]866 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]867
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]868 <condition id="CA5_CA9">
869 <description>Cortex-A5 or Cortex-A9 processor based device</description>
870 <accept Dcore="Cortex-A5"/>
871 <accept Dcore="Cortex-A9"/>
872 </condition>
873
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]874 <condition id="CA7">
875 <description>Cortex-A7 processor based device</description>
876 <accept Dcore="Cortex-A7"/>
877 </condition>
878
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]879 <!-- ARMCC compiler -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]880 <condition id="CA_ARMCC5">
881 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]882 <require condition="ARMv7-A Device"/>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]883 <require condition="ARMCC5"/>
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]884 </condition>
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]885 <condition id="CA_ARMCC6">
Jonatan Antoni41e74d52017-04-21 14:42:00 +0200[diff] [blame]886 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
887 <require condition="ARMv7-A Device"/>
888 <require condition="ARMCC6"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]889 </condition>
890
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]891 <condition id="CM0_ARMCC">
892 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
893 <require condition="CM0"/>
894 <require Tcompiler="ARMCC"/>
895 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]896 <condition id="CM0_LE_ARMCC">
897 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]898 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]899 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]900 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]901 <condition id="CM0_BE_ARMCC">
902 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]903 <require condition="CM0_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]904 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]905 </condition>
906
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]907 <condition id="CM3_ARMCC">
908 <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
909 <require condition="CM3"/>
910 <require Tcompiler="ARMCC"/>
911 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]912 <condition id="CM3_LE_ARMCC">
913 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]914 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]915 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]916 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]917 <condition id="CM3_BE_ARMCC">
918 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]919 <require condition="CM3_ARMCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]920 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]921 </condition>
922
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]923 <condition id="CM4_ARMCC">
924 <description>Cortex-M4 processor based device for the ARM Compiler</description>
925 <require condition="CM4"/>
926 <require Tcompiler="ARMCC"/>
927 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]928 <condition id="CM4_LE_ARMCC">
929 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]930 <require condition="CM4_ARMCC"/>
931 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]932 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]933 <condition id="CM4_BE_ARMCC">
934 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]935 <require condition="CM4_ARMCC"/>
936 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]937 </condition>
938
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]939 <condition id="CM4_FP_ARMCC">
940 <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
941 <require condition="CM4_FP"/>
942 <require Tcompiler="ARMCC"/>
943 </condition>
944 <condition id="CM4_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]945 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]946 <require condition="CM4_FP_ARMCC"/>
947 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]948 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]949 <condition id="CM4_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]950 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]951 <require condition="CM4_FP_ARMCC"/>
952 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]953 </condition>
954
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]955 <condition id="CM7_ARMCC">
956 <description>Cortex-M7 processor based device for the ARM Compiler</description>
957 <require condition="CM7"/>
958 <require Tcompiler="ARMCC"/>
959 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]960 <condition id="CM7_LE_ARMCC">
961 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]962 <require condition="CM7_ARMCC"/>
963 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]964 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]965 <condition id="CM7_BE_ARMCC">
966 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]967 <require condition="CM7_ARMCC"/>
968 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]969 </condition>
970
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]971 <condition id="CM7_FP_ARMCC">
972 <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
973 <require condition="CM7_FP"/>
974 <require Tcompiler="ARMCC"/>
975 </condition>
976 <condition id="CM7_FP_LE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]977 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]978 <require condition="CM7_FP_ARMCC"/>
979 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]980 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]981 <condition id="CM7_FP_BE_ARMCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]982 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]983 <require condition="CM7_FP_ARMCC"/>
984 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]985 </condition>
986
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]987 <condition id="CM7_SP_ARMCC">
988 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
989 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]990 <require Tcompiler="ARMCC"/>
991 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]992 <condition id="CM7_SP_LE_ARMCC">
993 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
994 <require condition="CM7_SP_ARMCC"/>
995 <require Dendian="Little-endian"/>
996 </condition>
997 <condition id="CM7_SP_BE_ARMCC">
998 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
999 <require condition="CM7_SP_ARMCC"/>
1000 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1001 </condition>
1002
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1003 <condition id="CM7_DP_ARMCC">
1004 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1005 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1006 <require Tcompiler="ARMCC"/>
1007 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1008 <condition id="CM7_DP_LE_ARMCC">
1009 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1010 <require condition="CM7_DP_ARMCC"/>
1011 <require Dendian="Little-endian"/>
1012 </condition>
1013 <condition id="CM7_DP_BE_ARMCC">
1014 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1015 <require condition="CM7_DP_ARMCC"/>
1016 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1017 </condition>
1018
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1019 <condition id="CM23_ARMCC">
1020 <description>Cortex-M23 processor based device for the ARM Compiler</description>
1021 <require condition="CM23"/>
1022 <require Tcompiler="ARMCC"/>
1023 </condition>
1024 <condition id="CM23_LE_ARMCC">
1025 <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1026 <require condition="CM23_ARMCC"/>
1027 <require Dendian="Little-endian"/>
1028 </condition>
1029 <condition id="CM23_BE_ARMCC">
1030 <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1031 <require condition="CM23_ARMCC"/>
1032 <require Dendian="Big-endian"/>
1033 </condition>
1034
1035 <condition id="CM33_ARMCC">
1036 <description>Cortex-M33 processor based device for the ARM Compiler</description>
1037 <require condition="CM33"/>
1038 <require Tcompiler="ARMCC"/>
1039 </condition>
1040 <condition id="CM33_LE_ARMCC">
1041 <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1042 <require condition="CM33_ARMCC"/>
1043 <require Dendian="Little-endian"/>
1044 </condition>
1045 <condition id="CM33_BE_ARMCC">
1046 <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1047 <require condition="CM33_ARMCC"/>
1048 <require Dendian="Big-endian"/>
1049 </condition>
1050
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1051 <condition id="CM33_FP_ARMCC">
1052 <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1053 <require condition="CM33_FP"/>
1054 <require Tcompiler="ARMCC"/>
1055 </condition>
1056 <condition id="CM33_FP_LE_ARMCC">
1057 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1058 <require condition="CM33_FP_ARMCC"/>
1059 <require Dendian="Little-endian"/>
1060 </condition>
1061 <condition id="CM33_FP_BE_ARMCC">
1062 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1063 <require condition="CM33_FP_ARMCC"/>
1064 <require Dendian="Big-endian"/>
1065 </condition>
1066
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1067 <condition id="CM33_NODSP_NOFPU_ARMCC">
1068 <description>CM33, no DSP, no FPU, ARM Compiler</description>
1069 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1070 <require Tcompiler="ARMCC"/>
1071 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1072 <condition id="CM33_DSP_NOFPU_ARMCC">
1073 <description>CM33, DSP, no FPU, ARM Compiler</description>
1074 <require condition="CM33_DSP_NOFPU"/>
1075 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1076 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1077 <condition id="CM33_NODSP_SP_ARMCC">
1078 <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1079 <require condition="CM33_NODSP_SP"/>
1080 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1081 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1082 <condition id="CM33_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1083 <description>CM33, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1084 <require condition="CM33_DSP_SP"/>
1085 <require Tcompiler="ARMCC"/>
1086 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1087 <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1088 <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1089 <require condition="CM33_NODSP_NOFPU_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1090 <require Dendian="Little-endian"/>
1091 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1092 <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1093 <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1094 <require condition="CM33_DSP_NOFPU_ARMCC"/>
1095 <require Dendian="Little-endian"/>
1096 </condition>
1097 <condition id="CM33_NODSP_SP_LE_ARMCC">
1098 <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1099 <require condition="CM33_NODSP_SP_ARMCC"/>
1100 <require Dendian="Little-endian"/>
1101 </condition>
1102 <condition id="CM33_DSP_SP_LE_ARMCC">
1103 <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1104 <require condition="CM33_DSP_SP_ARMCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1105 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1106 </condition>
1107
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1108 <condition id="ARMv8MBL_ARMCC">
1109 <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1110 <require condition="ARMv8MBL"/>
1111 <require Tcompiler="ARMCC"/>
1112 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1113 <condition id="ARMv8MBL_LE_ARMCC">
1114 <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1115 <require condition="ARMv8MBL_ARMCC"/>
1116 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1117 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1118 <condition id="ARMv8MBL_BE_ARMCC">
1119 <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1120 <require condition="ARMv8MBL_ARMCC"/>
1121 <require Dendian="Big-endian"/>
1122 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1123
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1124 <condition id="ARMv8MML_ARMCC">
1125 <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1126 <require condition="ARMv8MML"/>
1127 <require Tcompiler="ARMCC"/>
1128 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1129 <condition id="ARMv8MML_LE_ARMCC">
1130 <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1131 <require condition="ARMv8MML_ARMCC"/>
1132 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1133 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1134 <condition id="ARMv8MML_BE_ARMCC">
1135 <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1136 <require condition="ARMv8MML_ARMCC"/>
1137 <require Dendian="Big-endian"/>
1138 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1139
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1140 <condition id="ARMv8MML_FP_ARMCC">
1141 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1142 <require condition="ARMv8MML_FP"/>
1143 <require Tcompiler="ARMCC"/>
1144 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1145 <condition id="ARMv8MML_FP_LE_ARMCC">
1146 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1147 <require condition="ARMv8MML_FP_ARMCC"/>
1148 <require Dendian="Little-endian"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1149 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1150 <condition id="ARMv8MML_FP_BE_ARMCC">
1151 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1152 <require condition="ARMv8MML_FP_ARMCC"/>
1153 <require Dendian="Big-endian"/>
1154 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1155
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1156 <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1157 <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1158 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1159 <require Tcompiler="ARMCC"/>
1160 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1161 <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1162 <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1163 <require condition="ARMv8MML_DSP_NOFPU"/>
1164 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1165 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1166 <condition id="ARMv8MML_NODSP_SP_ARMCC">
1167 <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1168 <require condition="ARMv8MML_NODSP_SP"/>
1169 <require Tcompiler="ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1170 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1171 <condition id="ARMv8MML_DSP_SP_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1172 <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1173 <require condition="ARMv8MML_DSP_SP"/>
1174 <require Tcompiler="ARMCC"/>
1175 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1176 <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1177 <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1178 <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1179 <require Dendian="Little-endian"/>
1180 </condition>
1181 <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1182 <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1183 <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1184 <require Dendian="Little-endian"/>
1185 </condition>
1186 <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1187 <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1188 <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1189 <require Dendian="Little-endian"/>
1190 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1191 <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1192 <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1193 <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1194 <require Dendian="Little-endian"/>
1195 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1196
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1197 <!-- GCC compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1198 <condition id="CA_GCC">
1199 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1200 <require condition="ARMv7-A Device"/>
1201 <require Tcompiler="GCC"/>
1202 </condition>
1203
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1204 <condition id="CM0_GCC">
1205 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1206 <require condition="CM0"/>
1207 <require Tcompiler="GCC"/>
1208 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1209 <condition id="CM0_LE_GCC">
1210 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1211 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1212 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1213 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1214 <condition id="CM0_BE_GCC">
1215 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1216 <require condition="CM0_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1217 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1218 </condition>
1219
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1220 <condition id="CM3_GCC">
1221 <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1222 <require condition="CM3"/>
1223 <require Tcompiler="GCC"/>
1224 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1225 <condition id="CM3_LE_GCC">
1226 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1227 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1228 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1229 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1230 <condition id="CM3_BE_GCC">
1231 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1232 <require condition="CM3_GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1233 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1234 </condition>
1235
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1236 <condition id="CM4_GCC">
1237 <description>Cortex-M4 processor based device for the GCC Compiler</description>
1238 <require condition="CM4"/>
1239 <require Tcompiler="GCC"/>
1240 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1241 <condition id="CM4_LE_GCC">
1242 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1243 <require condition="CM4_GCC"/>
1244 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1245 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1246 <condition id="CM4_BE_GCC">
1247 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1248 <require condition="CM4_GCC"/>
1249 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1250 </condition>
1251
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1252 <condition id="CM4_FP_GCC">
1253 <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1254 <require condition="CM4_FP"/>
1255 <require Tcompiler="GCC"/>
1256 </condition>
1257 <condition id="CM4_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1258 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1259 <require condition="CM4_FP_GCC"/>
1260 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1261 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1262 <condition id="CM4_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1263 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1264 <require condition="CM4_FP_GCC"/>
1265 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1266 </condition>
1267
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1268 <condition id="CM7_GCC">
1269 <description>Cortex-M7 processor based device for the GCC Compiler</description>
1270 <require condition="CM7"/>
1271 <require Tcompiler="GCC"/>
1272 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1273 <condition id="CM7_LE_GCC">
1274 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1275 <require condition="CM7_GCC"/>
1276 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1277 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1278 <condition id="CM7_BE_GCC">
1279 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1280 <require condition="CM7_GCC"/>
1281 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1282 </condition>
1283
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1284 <condition id="CM7_FP_GCC">
1285 <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1286 <require condition="CM7_FP"/>
1287 <require Tcompiler="GCC"/>
1288 </condition>
1289 <condition id="CM7_FP_LE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1290 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1291 <require condition="CM7_FP_GCC"/>
1292 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1293 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1294 <condition id="CM7_FP_BE_GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1295 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1296 <require condition="CM7_FP_GCC"/>
1297 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1298 </condition>
1299
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1300 <condition id="CM7_SP_GCC">
1301 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1302 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1303 <require Tcompiler="GCC"/>
1304 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1305 <condition id="CM7_SP_LE_GCC">
1306 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1307 <require condition="CM7_SP_GCC"/>
1308 <require Dendian="Little-endian"/>
1309 </condition>
1310 <condition id="CM7_SP_BE_GCC">
1311 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1312 <require condition="CM7_SP_GCC"/>
1313 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1314 </condition>
1315
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1316 <condition id="CM7_DP_GCC">
1317 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1318 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1319 <require Tcompiler="GCC"/>
1320 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1321 <condition id="CM7_DP_LE_GCC">
1322 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1323 <require condition="CM7_DP_GCC"/>
1324 <require Dendian="Little-endian"/>
1325 </condition>
1326 <condition id="CM7_DP_BE_GCC">
1327 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1328 <require condition="CM7_DP_GCC"/>
1329 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1330 </condition>
1331
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1332 <condition id="CM23_GCC">
1333 <description>Cortex-M23 processor based device for the GCC Compiler</description>
1334 <require condition="CM23"/>
1335 <require Tcompiler="GCC"/>
1336 </condition>
1337 <condition id="CM23_LE_GCC">
1338 <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1339 <require condition="CM23_GCC"/>
1340 <require Dendian="Little-endian"/>
1341 </condition>
1342 <condition id="CM23_BE_GCC">
1343 <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1344 <require condition="CM23_GCC"/>
1345 <require Dendian="Big-endian"/>
1346 </condition>
1347
1348 <condition id="CM33_GCC">
1349 <description>Cortex-M33 processor based device for the GCC Compiler</description>
1350 <require condition="CM33"/>
1351 <require Tcompiler="GCC"/>
1352 </condition>
1353 <condition id="CM33_LE_GCC">
1354 <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1355 <require condition="CM33_GCC"/>
1356 <require Dendian="Little-endian"/>
1357 </condition>
1358 <condition id="CM33_BE_GCC">
1359 <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1360 <require condition="CM33_GCC"/>
1361 <require Dendian="Big-endian"/>
1362 </condition>
1363
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1364 <condition id="CM33_FP_GCC">
1365 <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1366 <require condition="CM33_FP"/>
1367 <require Tcompiler="GCC"/>
1368 </condition>
1369 <condition id="CM33_FP_LE_GCC">
1370 <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1371 <require condition="CM33_FP_GCC"/>
1372 <require Dendian="Little-endian"/>
1373 </condition>
1374 <condition id="CM33_FP_BE_GCC">
1375 <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1376 <require condition="CM33_FP_GCC"/>
1377 <require Dendian="Big-endian"/>
1378 </condition>
1379
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1380 <condition id="CM33_NODSP_NOFPU_GCC">
1381 <description>CM33, no DSP, no FPU, GCC Compiler</description>
1382 <require condition="CM33_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1383 <require Tcompiler="GCC"/>
1384 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1385 <condition id="CM33_DSP_NOFPU_GCC">
1386 <description>CM33, DSP, no FPU, GCC Compiler</description>
1387 <require condition="CM33_DSP_NOFPU"/>
1388 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1389 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1390 <condition id="CM33_NODSP_SP_GCC">
1391 <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1392 <require condition="CM33_NODSP_SP"/>
1393 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1394 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1395 <condition id="CM33_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1396 <description>CM33, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1397 <require condition="CM33_DSP_SP"/>
1398 <require Tcompiler="GCC"/>
1399 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1400 <condition id="CM33_NODSP_NOFPU_LE_GCC">
1401 <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1402 <require condition="CM33_NODSP_NOFPU_GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1403 <require Dendian="Little-endian"/>
1404 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1405 <condition id="CM33_DSP_NOFPU_LE_GCC">
1406 <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1407 <require condition="CM33_DSP_NOFPU_GCC"/>
1408 <require Dendian="Little-endian"/>
1409 </condition>
1410 <condition id="CM33_NODSP_SP_LE_GCC">
1411 <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1412 <require condition="CM33_NODSP_SP_GCC"/>
1413 <require Dendian="Little-endian"/>
1414 </condition>
1415 <condition id="CM33_DSP_SP_LE_GCC">
1416 <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1417 <require condition="CM33_DSP_SP_GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1418 <require Dendian="Little-endian"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1419 </condition>
1420
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1421 <condition id="ARMv8MBL_GCC">
1422 <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1423 <require condition="ARMv8MBL"/>
1424 <require Tcompiler="GCC"/>
1425 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1426 <condition id="ARMv8MBL_LE_GCC">
1427 <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1428 <require condition="ARMv8MBL_GCC"/>
1429 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1430 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1431 <condition id="ARMv8MBL_BE_GCC">
1432 <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1433 <require condition="ARMv8MBL_GCC"/>
1434 <require Dendian="Big-endian"/>
1435 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1436
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1437 <condition id="ARMv8MML_GCC">
1438 <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1439 <require condition="ARMv8MML"/>
1440 <require Tcompiler="GCC"/>
1441 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1442 <condition id="ARMv8MML_LE_GCC">
1443 <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1444 <require condition="ARMv8MML_GCC"/>
1445 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1446 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1447 <condition id="ARMv8MML_BE_GCC">
1448 <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1449 <require condition="ARMv8MML_GCC"/>
1450 <require Dendian="Big-endian"/>
1451 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1452
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1453 <condition id="ARMv8MML_FP_GCC">
1454 <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1455 <require condition="ARMv8MML_FP"/>
1456 <require Tcompiler="GCC"/>
1457 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1458 <condition id="ARMv8MML_FP_LE_GCC">
1459 <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1460 <require condition="ARMv8MML_FP_GCC"/>
1461 <require Dendian="Little-endian"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1462 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1463 <condition id="ARMv8MML_FP_BE_GCC">
1464 <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1465 <require condition="ARMv8MML_FP_GCC"/>
1466 <require Dendian="Big-endian"/>
1467 </condition>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]1468
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1469 <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1470 <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1471 <require condition="ARMv8MML_NODSP_NOFPU"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1472 <require Tcompiler="GCC"/>
1473 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1474 <condition id="ARMv8MML_DSP_NOFPU_GCC">
1475 <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1476 <require condition="ARMv8MML_DSP_NOFPU"/>
1477 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1478 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1479 <condition id="ARMv8MML_NODSP_SP_GCC">
1480 <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1481 <require condition="ARMv8MML_NODSP_SP"/>
1482 <require Tcompiler="GCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1483 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1484 <condition id="ARMv8MML_DSP_SP_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1485 <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1486 <require condition="ARMv8MML_DSP_SP"/>
1487 <require Tcompiler="GCC"/>
1488 </condition>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1489 <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1490 <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1491 <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1492 <require Dendian="Little-endian"/>
1493 </condition>
1494 <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1495 <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1496 <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1497 <require Dendian="Little-endian"/>
1498 </condition>
1499 <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1500 <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1501 <require condition="ARMv8MML_NODSP_SP_GCC"/>
1502 <require Dendian="Little-endian"/>
1503 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1504 <condition id="ARMv8MML_DSP_SP_LE_GCC">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1505 <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1506 <require condition="ARMv8MML_DSP_SP_GCC"/>
1507 <require Dendian="Little-endian"/>
1508 </condition>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1509
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1510 <!-- IAR compiler -->
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1511 <condition id="CA_IAR">
1512 <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1513 <require condition="ARMv7-A Device"/>
1514 <require Tcompiler="IAR"/>
1515 </condition>
1516
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1517 <condition id="CM0_IAR">
1518 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1519 <require condition="CM0"/>
1520 <require Tcompiler="IAR"/>
1521 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1522 <condition id="CM0_LE_IAR">
1523 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1524 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1525 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1526 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1527 <condition id="CM0_BE_IAR">
1528 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1529 <require condition="CM0_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1530 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1531 </condition>
1532
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1533 <condition id="CM3_IAR">
1534 <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1535 <require condition="CM3"/>
1536 <require Tcompiler="IAR"/>
1537 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1538 <condition id="CM3_LE_IAR">
1539 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1540 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1541 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1542 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1543 <condition id="CM3_BE_IAR">
1544 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1545 <require condition="CM3_IAR"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1546 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1547 </condition>
1548
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1549 <condition id="CM4_IAR">
1550 <description>Cortex-M4 processor based device for the IAR Compiler</description>
1551 <require condition="CM4"/>
1552 <require Tcompiler="IAR"/>
1553 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1554 <condition id="CM4_LE_IAR">
1555 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1556 <require condition="CM4_IAR"/>
1557 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1558 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1559 <condition id="CM4_BE_IAR">
1560 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1561 <require condition="CM4_IAR"/>
1562 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1563 </condition>
1564
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1565 <condition id="CM4_FP_IAR">
1566 <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1567 <require condition="CM4_FP"/>
1568 <require Tcompiler="IAR"/>
1569 </condition>
1570 <condition id="CM4_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1571 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1572 <require condition="CM4_FP_IAR"/>
1573 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1574 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1575 <condition id="CM4_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1576 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1577 <require condition="CM4_FP_IAR"/>
1578 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1579 </condition>
1580
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1581 <condition id="CM7_IAR">
1582 <description>Cortex-M7 processor based device for the IAR Compiler</description>
1583 <require condition="CM7"/>
1584 <require Tcompiler="IAR"/>
1585 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1586 <condition id="CM7_LE_IAR">
1587 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1588 <require condition="CM7_IAR"/>
1589 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1590 </condition>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1591 <condition id="CM7_BE_IAR">
1592 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1593 <require condition="CM7_IAR"/>
1594 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1595 </condition>
1596
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1597 <condition id="CM7_FP_IAR">
1598 <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1599 <require condition="CM7_FP"/>
1600 <require Tcompiler="IAR"/>
1601 </condition>
1602 <condition id="CM7_FP_LE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1603 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1604 <require condition="CM7_FP_IAR"/>
1605 <require Dendian="Little-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1606 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1607 <condition id="CM7_FP_BE_IAR">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1608 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1609 <require condition="CM7_FP_IAR"/>
1610 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1611 </condition>
1612
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1613 <condition id="CM7_SP_IAR">
1614 <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1615 <require condition="CM7_SP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1616 <require Tcompiler="IAR"/>
1617 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1618 <condition id="CM7_SP_LE_IAR">
1619 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1620 <require condition="CM7_SP_IAR"/>
1621 <require Dendian="Little-endian"/>
1622 </condition>
1623 <condition id="CM7_SP_BE_IAR">
1624 <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1625 <require condition="CM7_SP_IAR"/>
1626 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1627 </condition>
1628
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1629 <condition id="CM7_DP_IAR">
1630 <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1631 <require condition="CM7_DP"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1632 <require Tcompiler="IAR"/>
1633 </condition>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1634 <condition id="CM7_DP_LE_IAR">
1635 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1636 <require condition="CM7_DP_IAR"/>
1637 <require Dendian="Little-endian"/>
1638 </condition>
1639 <condition id="CM7_DP_BE_IAR">
1640 <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1641 <require condition="CM7_DP_IAR"/>
1642 <require Dendian="Big-endian"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1643 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1644
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1645 <!-- conditions selecting single devices and CMSIS Core -->
1646 <!-- used for component startup, GCC version is used for C-Startup -->
1647 <condition id="ARMCM0 CMSIS">
1648 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1649 <require Dvendor="ARM:82" Dname="ARMCM0"/>
1650 <require Cclass="CMSIS" Cgroup="CORE"/>
1651 </condition>
1652 <condition id="ARMCM0 CMSIS GCC">
1653 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1654 <require condition="ARMCM0 CMSIS"/>
1655 <require condition="GCC"/>
1656 </condition>
1657
1658 <condition id="ARMCM0+ CMSIS">
1659 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1660 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1661 <require Cclass="CMSIS" Cgroup="CORE"/>
1662 </condition>
1663 <condition id="ARMCM0+ CMSIS GCC">
1664 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1665 <require condition="ARMCM0+ CMSIS"/>
1666 <require condition="GCC"/>
1667 </condition>
1668
1669 <condition id="ARMCM3 CMSIS">
1670 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1671 <require Dvendor="ARM:82" Dname="ARMCM3"/>
1672 <require Cclass="CMSIS" Cgroup="CORE"/>
1673 </condition>
1674 <condition id="ARMCM3 CMSIS GCC">
1675 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1676 <require condition="ARMCM3 CMSIS"/>
1677 <require condition="GCC"/>
1678 </condition>
1679
1680 <condition id="ARMCM4 CMSIS">
1681 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1682 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1683 <require Cclass="CMSIS" Cgroup="CORE"/>
1684 </condition>
1685 <condition id="ARMCM4 CMSIS GCC">
1686 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1687 <require condition="ARMCM4 CMSIS"/>
1688 <require condition="GCC"/>
1689 </condition>
1690
1691 <condition id="ARMCM7 CMSIS">
1692 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1693 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1694 <require Cclass="CMSIS" Cgroup="CORE"/>
1695 </condition>
1696 <condition id="ARMCM7 CMSIS GCC">
1697 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1698 <require condition="ARMCM7 CMSIS"/>
1699 <require condition="GCC"/>
1700 </condition>
1701
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1702 <condition id="ARMCM23 CMSIS">
1703 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1704 <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1705 <require Cclass="CMSIS" Cgroup="CORE"/>
1706 </condition>
1707 <condition id="ARMCM23 CMSIS GCC">
1708 <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1709 <require condition="ARMCM23 CMSIS"/>
1710 <require condition="GCC"/>
1711 </condition>
1712
1713 <condition id="ARMCM33 CMSIS">
1714 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1715 <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1716 <require Cclass="CMSIS" Cgroup="CORE"/>
1717 </condition>
1718 <condition id="ARMCM33 CMSIS GCC">
1719 <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1720 <require condition="ARMCM33 CMSIS"/>
1721 <require condition="GCC"/>
1722 </condition>
1723
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1724 <condition id="ARMSC000 CMSIS">
1725 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1726 <require Dvendor="ARM:82" Dname="ARMSC000"/>
1727 <require Cclass="CMSIS" Cgroup="CORE"/>
1728 </condition>
1729 <condition id="ARMSC000 CMSIS GCC">
1730 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1731 <require condition="ARMSC000 CMSIS"/>
1732 <require condition="GCC"/>
1733 </condition>
1734
1735 <condition id="ARMSC300 CMSIS">
1736 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1737 <require Dvendor="ARM:82" Dname="ARMSC300"/>
1738 <require Cclass="CMSIS" Cgroup="CORE"/>
1739 </condition>
1740 <condition id="ARMSC300 CMSIS GCC">
1741 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1742 <require condition="ARMSC300 CMSIS"/>
1743 <require condition="GCC"/>
1744 </condition>
1745
1746 <condition id="ARMv8MBL CMSIS">
1747 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1748 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1749 <require Cclass="CMSIS" Cgroup="CORE"/>
1750 </condition>
1751 <condition id="ARMv8MBL CMSIS GCC">
1752 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1753 <require condition="ARMv8MBL CMSIS"/>
1754 <require condition="GCC"/>
1755 </condition>
1756
1757 <condition id="ARMv8MML CMSIS">
1758 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1759 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1760 <require Cclass="CMSIS" Cgroup="CORE"/>
1761 </condition>
1762 <condition id="ARMv8MML CMSIS GCC">
1763 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1764 <require condition="ARMv8MML CMSIS"/>
1765 <require condition="GCC"/>
1766 </condition>
1767
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1768 <condition id="ARMCA5 CMSIS">
1769 <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1770 <require Dvendor="ARM:82" Dname="ARMCA5"/>
1771 <require Cclass="CMSIS" Cgroup="CORE"/>
1772 </condition>
1773
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1774 <condition id="ARMCA7 CMSIS">
1775 <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1776 <require Dvendor="ARM:82" Dname="ARMCA7"/>
1777 <require Cclass="CMSIS" Cgroup="CORE"/>
1778 </condition>
1779
1780 <condition id="ARMCA9 CMSIS">
1781 <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1782 <require Dvendor="ARM:82" Dname="ARMCA9"/>
1783 <require Cclass="CMSIS" Cgroup="CORE"/>
1784 </condition>
1785
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1786 <!-- CMSIS DSP -->
1787 <condition id="CMSIS DSP">
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1788 <description>Components required for DSP</description>
1789 <require condition="ARMv6_7_8-M Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]1790 <require condition="ARMCC GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]1791 <require Cclass="CMSIS" Cgroup="CORE"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1792 </condition>
1793
1794 <!-- RTOS RTX -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1795 <condition id="RTOS RTX">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1796 <description>Components required for RTOS RTX</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1797 <require condition="ARMv6_7-M Device"/>
1798 <require condition="ARMCC GCC IAR"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1799 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1800 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1801 </condition>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]1802 <condition id="RTOS RTX IFX">
1803 <description>Components required for RTOS RTX IFX</description>
1804 <require condition="ARMv6_7-M Device"/>
1805 <require condition="ARMCC GCC IAR"/>
1806 <require Dvendor="Infineon:7" Dname="XMC4*"/>
1807 <require Cclass="Device" Cgroup="Startup"/>
1808 <deny Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
1809 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1810 <condition id="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1811 <description>Components required for RTOS RTX5</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1812 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1813 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1814 <require Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5"/>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1815 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1816 <condition id="RTOS2 RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]1817 <description>Components required for RTOS2 RTX5</description>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1818 <require condition="ARMv6_7_8-M Device"/>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1819 <require condition="ARMCC GCC IAR"/>
1820 <require Cclass="CMSIS" Cgroup="CORE"/>
1821 <require Cclass="Device" Cgroup="Startup"/>
1822 </condition>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1823 <condition id="RTOS2 RTX5 v7-A">
1824 <description>Components required for RTOS2 RTX5 v7-A</description>
1825 <require condition="ARMv7-A Device"/>
1826 <require condition="ARMCC GCC IAR"/>
1827 <require Cclass="CMSIS" Cgroup="CORE"/>
1828 <require Cclass="Device" Cgroup="Startup"/>
1829 <require Cclass="Device" Cgroup="OS Tick"/>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1830 <require Cclass="Device" Cgroup="IRQ Controller"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]1831 </condition>
Robert Rostoharff9fa5b2017-04-19 11:55:58 +0200[diff] [blame]1832 <condition id="RTOS2 RTX5 Lib">
1833 <description>Components required for RTOS2 RTX5 Library</description>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1834 <require condition="ARMv6_7_8-M Device"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]1835 <require condition="ARMCC GCC IAR"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1836 <require Cclass="CMSIS" Cgroup="CORE"/>
1837 <require Cclass="Device" Cgroup="Startup"/>
1838 </condition>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1839 <condition id="RTOS2 RTX5 NS">
1840 <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1841 <require condition="ARMv8-M TZ Device"/>
1842 <require condition="ARMCC GCC"/>
1843 <require Cclass="CMSIS" Cgroup="CORE"/>
1844 <require Cclass="Device" Cgroup="Startup"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]1845 </condition>
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]1846
1847 <!-- OS Tick -->
1848 <condition id="OS Tick PTIM">
1849 <description>Components required for OS Tick Private Timer</description>
1850 <require condition="CA5_CA9"/>
1851 <require Cclass="Device" Cgroup="IRQ Controller"/>
1852 </condition>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]1853
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]1854 <condition id="OS Tick GTIM">
1855 <description>Components required for OS Tick Generic Physical Timer</description>
1856 <require condition="CA7"/>
1857 <require Cclass="Device" Cgroup="IRQ Controller"/>
1858 </condition>
1859
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1860 </conditions>
1861
1862 <components>
1863 <!-- CMSIS-Core component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]1864 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2" condition="ARMv6_7_8-M Device" >
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1865 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1866 <files>
1867 <!-- CPU independent -->
1868 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1869 <file category="include" name="CMSIS/Include/"/>
Robert Rostoharb2e07162016-11-04 10:43:56 +0100[diff] [blame]1870 <file category="header" name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
Christopher Seidl2e8b8142016-10-25 16:29:05 +0200[diff] [blame]1871 <!-- Code template -->
Robert Rostohar0e71e882016-11-16 19:03:44 +0100[diff] [blame]1872 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c" version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
Robert Rostohar71f4dcf2016-11-16 19:06:01 +0100[diff] [blame]1873 <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1874 </files>
1875 </component>
1876
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1877 <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0" condition="ARMv7-A Device" >
1878 <description>CMSIS-CORE for Cortex-A</description>
1879 <files>
1880 <!-- CPU independent -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]1881 <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
brondanib6bdb2c2017-03-02 16:15:52 +0100[diff] [blame]1882 <file category="include" name="CMSIS/Core_A/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]1883 </files>
1884 </component>
1885
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1886 <!-- CMSIS-Startup components -->
1887 <!-- Cortex-M0 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1888 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1889 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1890 <files>
1891 <!-- include folder / device header file -->
1892 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1893 <!-- startup / system file -->
1894 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1895 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1896 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1897 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1898 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1899 </files>
1900 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1901 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1902 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1903 <files>
1904 <!-- include folder / device header file -->
1905 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1906 <!-- startup / system file -->
1907 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1908 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1909 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1910 </files>
1911 </component>
1912
1913 <!-- Cortex-M0+ -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1914 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1915 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1916 <files>
1917 <!-- include folder / device header file -->
1918 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1919 <!-- startup / system file -->
1920 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1921 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1922 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1923 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1924 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1925 </files>
1926 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1927 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1928 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1929 <files>
1930 <!-- include folder / device header file -->
1931 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1932 <!-- startup / system file -->
1933 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1934 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1935 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1936 </files>
1937 </component>
1938
1939 <!-- Cortex-M3 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1940 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1941 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1942 <files>
1943 <!-- include folder / device header file -->
1944 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1945 <!-- startup / system file -->
1946 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1947 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1948 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1949 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1950 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1951 </files>
1952 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1953 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1954 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1955 <files>
1956 <!-- include folder / device header file -->
1957 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1958 <!-- startup / system file -->
1959 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1960 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1961 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1962 </files>
1963 </component>
1964
1965 <!-- Cortex-M4 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1966 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1967 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1968 <files>
1969 <!-- include folder / device header file -->
1970 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1971 <!-- startup / system file -->
1972 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1973 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1974 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1975 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1976 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1977 </files>
1978 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]1979 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1980 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1981 <files>
1982 <!-- include folder / device header file -->
1983 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1984 <!-- startup / system file -->
1985 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1986 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1987 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1988 </files>
1989 </component>
1990
1991 <!-- Cortex-M7 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]1992 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1993 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1994 <files>
1995 <!-- include folder / device header file -->
1996 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1997 <!-- startup / system file -->
1998 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1999 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2000 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2001 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2002 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2003 </files>
2004 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2005 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2006 <description>System and Startup for Generic ARM Cortex-M7 device</description>
2007 <files>
2008 <!-- include folder / device header file -->
2009 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
2010 <!-- startup / system file -->
2011 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2012 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2013 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
2014 </files>
2015 </component>
2016
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2017 <!-- Cortex-M23 -->
2018 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS">
2019 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2020 <files>
2021 <!-- include folder / device header file -->
2022 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2023 <!-- startup / system file -->
2024 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2025 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2026 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2027 <file category="sourceAsm" name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2028 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2029 <!-- SAU configuration -->
2030 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2031 </files>
2032 </component>
2033 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2034 <description>System and Startup for Generic ARM Cortex-M23 device</description>
2035 <files>
2036 <!-- include folder / device header file -->
2037 <file category="include" name="Device/ARM/ARMCM23/Include/"/>
2038 <!-- startup / system file -->
2039 <file category="sourceC" name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2040 <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2041 <file category="sourceC" name="Device/ARM/ARMCM23/Source/system_ARMCM23.c" version="1.0.0" attr="config"/>
2042 <!-- SAU configuration -->
2043 <file category="header" name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2044 </files>
2045 </component>
2046
2047 <!-- Cortex-M33 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2048 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2049 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2050 <files>
2051 <!-- include folder / device header file -->
2052 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2053 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2054 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2055 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2056 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
Jonatan Antonie1454c12017-09-11 09:23:17 +0200[diff] [blame]2057 <file category="sourceAsm" name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s" version="1.0.0" attr="config" condition="IAR"/>
2058 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2059 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2060 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2061 </files>
2062 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2063 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2064 <description>System and Startup for Generic ARM Cortex-M33 device</description>
2065 <files>
2066 <!-- include folder / device header file -->
2067 <file category="include" name="Device/ARM/ARMCM33/Include/"/>
2068 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2069 <file category="sourceC" name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2070 <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2071 <file category="sourceC" name="Device/ARM/ARMCM33/Source/system_ARMCM33.c" version="1.0.0" attr="config"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2072 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2073 <file category="header" name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2074 </files>
2075 </component>
2076
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2077 <!-- Cortex-SC000 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2078 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2079 <description>System and Startup for Generic ARM SC000 device</description>
2080 <files>
2081 <!-- include folder / device header file -->
2082 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2083 <!-- startup / system file -->
2084 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2085 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2086 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2087 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2088 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2089 </files>
2090 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2091 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2092 <description>System and Startup for Generic ARM SC000 device</description>
2093 <files>
2094 <!-- include folder / device header file -->
2095 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2096 <!-- startup / system file -->
2097 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2098 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2099 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
2100 </files>
2101 </component>
2102
2103 <!-- Cortex-SC300 -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2104 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2105 <description>System and Startup for Generic ARM SC300 device</description>
2106 <files>
2107 <!-- include folder / device header file -->
2108 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2109 <!-- startup / system file -->
2110 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2111 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2112 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2113 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2114 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2115 </files>
2116 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2117 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2118 <description>System and Startup for Generic ARM SC300 device</description>
2119 <files>
2120 <!-- include folder / device header file -->
2121 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2122 <!-- startup / system file -->
2123 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2124 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2125 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
2126 </files>
2127 </component>
2128
2129 <!-- ARMv8MBL -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2130 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2131 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2132 <files>
2133 <!-- include folder / device header file -->
2134 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2135 <!-- startup / system file -->
2136 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2137 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2138 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2139 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
2140 <!-- SAU configuration -->
2141 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2142 </files>
2143 </component>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2144 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2145 <description>System and Startup for Generic ARM ARMv8MBL device</description>
2146 <files>
2147 <!-- include folder / device header file -->
2148 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
2149 <!-- startup / system file -->
2150 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2151 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2152 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2153 <!-- SAU configuration -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2154 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2155 </files>
2156 </component>
2157
2158 <!-- ARMv8MML -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2159 <component Cclass="Device" Cgroup="Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2160 <description>System and Startup for Generic ARM ARMv8MML device</description>
2161 <files>
2162 <!-- include folder / device header file -->
2163 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
2164 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2165 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2166 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2167 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2168 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2169 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2170 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2171 </files>
2172 </component>
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2173 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2174 <description>System and Startup for Generic ARM ARMv8MML device</description>
2175 <files>
2176 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2177 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2178 <!-- startup / system file -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2179 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2180 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
2181 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2182 <!-- SAU configuration -->
Martin Günther21669672016-12-07 10:40:50 +0100[diff] [blame]2183 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2184 </files>
2185 </component>
2186
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2187 <!-- Cortex-A5 -->
2188 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA5 CMSIS">
2189 <description>System and Startup for Generic ARM Cortex-A5 device</description>
2190 <files>
2191 <!-- include folder / device header file -->
2192 <file category="include" name="Device/ARM/ARMCA5/Include/"/>
2193 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2194 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2195 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2196 <file category="sourceC" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2197 <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2198 <file category="sourceC" name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2199 <file category="other" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2200 <file category="sourceC" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.0" attr="config"/>
2201 <file category="sourceC" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0" attr="config"/>
2202 <file category="header" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0" attr="config"/>
2203 <file category="header" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2204
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2205 </files>
2206 </component>
2207
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2208 <!-- Cortex-A7 -->
2209 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMCA7 CMSIS">
2210 <description>System and Startup for Generic ARM Cortex-A7 device</description>
2211 <files>
2212 <!-- include folder / device header file -->
Daniel Brondaniaabf1ab2017-03-17 10:02:30 +0100[diff] [blame]2213 <file category="include" name="Device/ARM/ARMCA7/Include/"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2214 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2215 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2216 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2217 <file category="sourceC" name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2218 <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antoni7e5e24f2017-09-12 16:40:22 +0200[diff] [blame]2219 <file category="sourceC" name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2220 <file category="other" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2221 <file category="sourceC" name="Device/ARM/ARMCA7/Source/system_ARMCA7.c" version="1.0.0" attr="config"/>
2222 <file category="sourceC" name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2223 <file category="header" name="Device/ARM/ARMCA7/Include/system_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2224 <file category="header" name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2225 </files>
2226 </component>
2227
2228 <!-- Cortex-A9 -->
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2229 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCA9 CMSIS">
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2230 <description>System and Startup for Generic ARM Cortex-A9 device</description>
2231 <files>
2232 <!-- include folder / device header file -->
2233 <file category="include" name="Device/ARM/ARMCA9/Include/"/>
2234 <!-- startup / system / mmu files -->
Jonatan Antonic34d5322017-04-25 09:32:40 +0200[diff] [blame]2235 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2236 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC5"/>
Daniel Brondani7bfe5d02017-04-13 15:56:17 +0200[diff] [blame]2237 <file category="sourceC" name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2238 <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct" version="1.0.0" attr="config" condition="ARMCC6"/>
Jonatan Antonib27a4122017-08-08 13:30:19 +0200[diff] [blame]2239 <file category="sourceC" name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2240 <file category="other" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld" version="1.0.0" attr="config" condition="GCC"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2241 <file category="sourceC" name="Device/ARM/ARMCA9/Source/system_ARMCA9.c" version="1.0.0" attr="config"/>
2242 <file category="sourceC" name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c" version="1.0.0" attr="config"/>
Daniel Brondani44b26e02017-03-01 10:56:18 +0100[diff] [blame]2243 <file category="header" name="Device/ARM/ARMCA9/Include/system_ARMCA9.h" version="1.0.0" attr="config"/>
2244 <file category="header" name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h" version="1.0.0" attr="config"/>
Daniel Brondani0d4e4992017-02-23 09:26:46 +0100[diff] [blame]2245 </files>
2246 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2247
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2248 <!-- IRQ Controller -->
2249 <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2250 <description>IRQ Controller implementation using GIC</description>
2251 <files>
2252 <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2253 </files>
2254 </component>
2255
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2256 <!-- OS Tick -->
Vladimir Umekc852bdd2017-07-03 09:19:47 +0200[diff] [blame]2257 <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
Vladimir Umekbed07592017-06-14 14:35:26 +0200[diff] [blame]2258 <description>OS Tick implementation using Private Timer</description>
2259 <files>
2260 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2261 </files>
2262 </component>
2263
Daniel Brondani650abfe2017-07-24 15:35:57 +0200[diff] [blame]2264 <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2265 <description>OS Tick implementation using Generic Physical Timer</description>
2266 <files>
2267 <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2268 </files>
2269 </component>
2270
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2271 <!-- CMSIS-DSP component -->
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2272 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2273 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2274 <files>
2275 <!-- CPU independent -->
2276 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2277 <file category="header" name="CMSIS/Include/arm_math.h"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2278
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2279 <!-- CPU and Compiler dependent -->
2280 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2281 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2282 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2283 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2284 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2285 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2286 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2287 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2288 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2289 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2290 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2291 <file category="library" condition="CM7_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2292 <file category="library" condition="CM7_SP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2293 <file category="library" condition="CM7_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2294 <file category="library" condition="CM7_DP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2295
2296 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2297 <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2298 <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2299 <file category="library" condition="CM33_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2300 <file category="library" condition="CM33_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2301 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2302 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2303 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2304 <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2305 <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
2306 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2307 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/-->
2308
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2309 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2310 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2311 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2312 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2313 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2314 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2315 <file category="library" condition="CM7_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2316 <file category="library" condition="CM7_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
Martin Güntherceee6862017-02-02 14:14:34 +0100[diff] [blame]2317
2318 <file category="library" condition="CM23_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2319 <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2320 <file category="library" condition="CM33_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2321 <file category="library" condition="CM33_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2322 <file category="library" condition="CM33_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2323 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2324 <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2325 <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2326 <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2327 <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2328 <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2329 <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC" name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2330
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2331 </files>
2332 </component>
2333
2334 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2335 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2336 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2337 <RTE_Components_h>
2338 <!-- the following content goes into file 'RTE_Components.h' -->
2339 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2340 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2341 </RTE_Components_h>
2342 <files>
2343 <!-- CPU independent -->
bruneu01f9c01952016-09-13 16:28:46 +0200[diff] [blame]2344 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2345 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2346 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2347
2348 <!-- RTX templates -->
2349 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2350 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2351 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2352 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2353 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2354 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2355 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2356 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2357 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2358 <!-- tool-chain specific template file -->
2359 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2360 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2361 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2362
2363 <!-- CPU and Compiler dependent -->
2364 <!-- ARMCC -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2365 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2366 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2367 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2368 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2369 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2370 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2371 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2372 <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2373 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2374 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2375 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2376 <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2377 <!-- GCC -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2378 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2379 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2380 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2381 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2382 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2383 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2384 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2385 <file category="library" condition="CM4_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2386 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2387 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2388 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2389 <file category="library" condition="CM7_FP_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2390 <!-- IAR -->
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2391 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2392 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2393 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2394 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2395 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2396 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2397 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2398 <file category="library" condition="CM4_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2399 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2400 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2401 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2402 <file category="library" condition="CM7_FP_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
2403 </files>
2404 </component>
2405 <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2406 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2407 <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2408 <RTE_Components_h>
2409 <!-- the following content goes into file 'RTE_Components.h' -->
2410 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
2411 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
2412 </RTE_Components_h>
2413 <files>
2414 <!-- CPU independent -->
2415 <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2416 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2417 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2418
2419 <!-- RTX templates -->
2420 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2421 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
2422 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2423 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
2424 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
2425 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
2426 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2427 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
2428 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
2429 <!-- tool-chain specific template file -->
2430 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2431 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2432 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2433
2434 <!-- CPU and Compiler dependent -->
2435 <!-- ARMCC -->
2436 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2437 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
2438 <!-- GCC -->
2439 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2440 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2441 <!-- IAR -->
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2442 </files>
2443 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2444
2445 <!-- CMSIS-RTOS Keil RTX5 component -->
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2446 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.1" Capiversion="1.0.0" condition="RTOS RTX5">
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2447 <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2448 <RTE_Components_h>
2449 <!-- the following content goes into file 'RTE_Components.h' -->
2450 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2451 #define RTE_CMSIS_RTOS_RTX5 /* CMSIS-RTOS Keil RTX5 */
2452 </RTE_Components_h>
2453 <files>
2454 <!-- RTX header file -->
2455 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2456 <!-- RTX compatibility module for API V1 -->
2457 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2458 </files>
2459 </component>
2460
2461 <!-- CMSIS-RTOS2 Keil RTX5 component -->
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2462 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2463 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
Robert Rostohar1e9866f2016-07-06 22:19:58 +0200[diff] [blame]2464 <RTE_Components_h>
2465 <!-- the following content goes into file 'RTE_Components.h' -->
2466 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2467 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2468 </RTE_Components_h>
2469 <files>
2470 <!-- RTX documentation -->
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2471 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2472
2473 <!-- RTX header files -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2474 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2475
2476 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2477 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2478 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2479
2480 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2481 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2482 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2483 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2484 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2485 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2486 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2487 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2488 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2489 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2490 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2491
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2492 <!-- RTX library configuration -->
2493 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2494
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]2495 <!-- RTX libraries (CPU and Compiler dependent) -->
2496 <!-- ARMCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2497 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
2498 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2499 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2500 <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2501 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
2502 <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2503 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2504 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2505 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2506 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib" src="CMSIS/RTOS2/RTX/Source"/>
2507 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib" src="CMSIS/RTOS2/RTX/Source"/>
2508 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib" src="CMSIS/RTOS2/RTX/Source"/>
2509 <!-- GCC -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2510 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2511 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2512 <file category="library" condition="CM4_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2513 <file category="library" condition="CM4_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2514 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2515 <file category="library" condition="CM7_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2516 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2517 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2518 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2519 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a" src="CMSIS/RTOS2/RTX/Source"/>
2520 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a" src="CMSIS/RTOS2/RTX/Source"/>
2521 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2522 <!-- IAR -->
2523 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
2524 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2525 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2526 <file category="library" condition="CM4_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
2527 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
2528 <file category="library" condition="CM7_FP_LE_IAR" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2529 </files>
2530 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2531 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2532 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2533 <RTE_Components_h>
2534 <!-- the following content goes into file 'RTE_Components.h' -->
2535 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2536 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2537 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2538 </RTE_Components_h>
2539 <files>
2540 <!-- RTX documentation -->
2541 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2542
2543 <!-- RTX header files -->
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2544 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2545
2546 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2547 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2548 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2549
2550 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2551 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2552 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2553 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2554 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2555 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2556 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2557 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2558 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2559 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2560 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2561
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2562 <!-- RTX library configuration -->
2563 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2564
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2565 <!-- RTX libraries (CPU and Compiler dependent) -->
2566 <!-- ARMCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2567 <file category="library" condition="CM23_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2568 <file category="library" condition="CM33_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2569 <file category="library" condition="CM33_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2570 <file category="library" condition="ARMv8MBL_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2571 <file category="library" condition="ARMv8MML_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2572 <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib" src="CMSIS/RTOS2/RTX/Source"/>
2573 <!-- GCC -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2574 <file category="library" condition="CM23_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2575 <file category="library" condition="CM33_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2576 <file category="library" condition="CM33_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostohar2a0fd6d2016-09-28 13:53:18 +0200[diff] [blame]2577 <file category="library" condition="ARMv8MBL_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a" src="CMSIS/RTOS2/RTX/Source"/>
2578 <file category="library" condition="ARMv8MML_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a" src="CMSIS/RTOS2/RTX/Source"/>
2579 <file category="library" condition="ARMv8MML_FP_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2580 </files>
2581 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2582 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2583 <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2584 <RTE_Components_h>
2585 <!-- the following content goes into file 'RTE_Components.h' -->
2586 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2587 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2588 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2589 </RTE_Components_h>
2590 <files>
2591 <!-- RTX documentation -->
2592 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2593
2594 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2595 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2596
2597 <!-- RTX configuration -->
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2598 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2599 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2600
2601 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2602 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2603 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2604 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2605 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2606 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2607 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2608 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2609 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2610 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2611 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2612
2613 <!-- RTX sources (core) -->
2614 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2615 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2616 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2617 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2618 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2619 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2620 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2621 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2622 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2623 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2624 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2625 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2626 <!-- RTX sources (library configuration) -->
2627 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2628 <!-- RTX sources (handlers ARMCC) -->
2629 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s" condition="CM0_ARMCC"/>
2630 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM3_ARMCC"/>
2631 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM4_ARMCC"/>
2632 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM4_FP_ARMCC"/>
2633 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s" condition="CM7_ARMCC"/>
2634 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s" condition="CM7_FP_ARMCC"/>
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2635 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
2636 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
2637 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2638 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
2639 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
2640 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
2641 <!-- RTX sources (handlers GCC) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2642 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S" condition="CM0_GCC"/>
2643 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM3_GCC"/>
2644 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM4_GCC"/>
2645 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM4_FP_GCC"/>
2646 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S" condition="CM7_GCC"/>
2647 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S" condition="CM7_FP_GCC"/>
2648 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
2649 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
2650 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2651 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
2652 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
2653 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohar0695d882016-12-20 12:26:34 +0100[diff] [blame]2654 <!-- RTX sources (handlers IAR) -->
2655 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s" condition="CM0_IAR"/>
2656 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM3_IAR"/>
2657 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM4_IAR"/>
2658 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM4_FP_IAR"/>
2659 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s" condition="CM7_IAR"/>
2660 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s" condition="CM7_FP_IAR"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2661 <!-- OS Tick (SysTick) -->
2662 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2663 </files>
2664 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2665 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2666 <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2667 <RTE_Components_h>
2668 <!-- the following content goes into file 'RTE_Components.h' -->
2669 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2670 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
2671 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
2672 </RTE_Components_h>
2673 <files>
2674 <!-- RTX documentation -->
2675 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2676
2677 <!-- RTX header files -->
2678 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2679
2680 <!-- RTX configuration -->
2681 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2682 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
2683
2684 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
2685
2686 <!-- RTX templates -->
2687 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2688 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2689 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2690 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2691 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2692 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2693 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2694 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2695 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2696 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2697
2698 <!-- RTX sources (core) -->
2699 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2700 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2701 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2702 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2703 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2704 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2705 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2706 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2707 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2708 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2709 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2710 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2711 <!-- RTX sources (library configuration) -->
2712 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2713 <!-- RTX sources (handlers ARMCC) -->
2714 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s" condition="CA_ARMCC5"/>
2715 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_ARMCC6"/>
2716 <!-- RTX sources (handlers GCC) -->
2717 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S" condition="CA_GCC"/>
2718 <!-- RTX sources (handlers IAR) -->
2719 <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s" condition="CA_IAR"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2720 </files>
2721 </component>
Robert Rostohara6351332017-08-18 11:44:41 +0200[diff] [blame]2722 <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2723 <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2724 <RTE_Components_h>
2725 <!-- the following content goes into file 'RTE_Components.h' -->
2726 #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
2727 #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
Robert Rostoharecaa0d62016-10-28 09:05:16 +0200[diff] [blame]2728 #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2729 #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2730 </RTE_Components_h>
2731 <files>
2732 <!-- RTX documentation -->
2733 <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2734
2735 <!-- RTX header files -->
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2736 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2737
2738 <!-- RTX configuration -->
Robert Rostoharffe28d02017-01-11 07:09:19 +0100[diff] [blame]2739 <file category="header" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.1.0"/>
2740 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2741
2742 <!-- RTX templates -->
ReinhardKeilb124e912016-11-09 11:09:21 +0100[diff] [blame]2743 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2744 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c" version="2.0.0" select="CMSIS-RTOS2 Events"/>
2745 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c" version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2746 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2747 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c" version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2748 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2749 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c" version="2.0.0" select="CMSIS-RTOS2 Thread"/>
Jonatan Antoni102fe7f2017-08-03 11:33:08 +0200[diff] [blame]2750 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c" version="2.0.1" select="CMSIS-RTOS2 Timer"/>
Robert Rostohar2e05f3b2017-09-05 11:08:05 +0200[diff] [blame]2751 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c" version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2752 <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2753
2754 <!-- RTX sources (core) -->
2755 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2756 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2757 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2758 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2759 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2760 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2761 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2762 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2763 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2764 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2765 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
Robert Rostohar0e8657f2016-11-25 21:54:15 +0100[diff] [blame]2766 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2767 <!-- RTX sources (library configuration) -->
2768 <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2769 <!-- RTX sources (ARMCC handlers) -->
Martin Günther4a4e39c2016-11-03 11:47:02 +0100[diff] [blame]2770 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
2771 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
2772 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2773 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
2774 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
2775 <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
2776 <!-- RTX sources (GCC handlers) -->
Robert Rostohar9f7ce662016-11-10 09:20:14 +0100[diff] [blame]2777 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="CM23_GCC"/>
2778 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="CM33_GCC"/>
2779 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2780 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S" condition="ARMv8MBL_GCC"/>
2781 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S" condition="ARMv8MML_GCC"/>
2782 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
Robert Rostohardcfd4322017-06-09 13:11:57 +0200[diff] [blame]2783 <!-- OS Tick (SysTick) -->
2784 <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
Robert Rostohar014b5542016-10-26 11:12:01 +0200[diff] [blame]2785 </files>
2786 </component>
Robert Rostoharef8c22c2016-09-23 16:12:18 +0200[diff] [blame]2787
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2788 </components>
2789
2790 <boards>
2791 <board name="uVision Simulator" vendor="Keil">
2792 <description>uVision Simulator</description>
2793 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2794 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2795 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2796 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2797 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2798 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
Martin Günther4ed87812016-10-27 15:29:12 +0200[diff] [blame]2799 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2800 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2801 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2802 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2803 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2804 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2805 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
Joachim Krech4a03e6d2017-02-06 13:17:39 +0100[diff] [blame]2806 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
Joachim Krech465bd432016-11-21 09:15:30 +0100[diff] [blame]2807 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2808 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2809 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2810 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2811 </board>
2812
2813 <board name="Fixed Virtual Platform" vendor="ARM">
Daniel Brondani040d63b2017-08-01 16:49:57 +0200[diff] [blame]2814 <description>Fixed Virtual Platform</description>
Daniel Brondanifaaa48f2017-07-31 14:00:54 +0200[diff] [blame]2815 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2816 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2817 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2818 </board>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]2819 </boards>
2820
2821 <examples>
2822 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2823 <description>DSP_Lib Class Marks example</description>
2824 <board name="uVision Simulator" vendor="Keil"/>
2825 <project>
2826 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2827 </project>
2828 <attributes>
2829 <component Cclass="CMSIS" Cgroup="CORE"/>
2830 <component Cclass="CMSIS" Cgroup="DSP"/>
2831 <component Cclass="Device" Cgroup="Startup"/>
2832 <category>Getting Started</category>
2833 </attributes>
2834 </example>
2835
2836 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2837 <description>DSP_Lib Convolution example</description>
2838 <board name="uVision Simulator" vendor="Keil"/>
2839 <project>
2840 <environment name="uv" load="arm_convolution_example.uvprojx"/>
2841 </project>
2842 <attributes>
2843 <component Cclass="CMSIS" Cgroup="CORE"/>
2844 <component Cclass="CMSIS" Cgroup="DSP"/>
2845 <component Cclass="Device" Cgroup="Startup"/>
2846 <category>Getting Started</category>
2847 </attributes>
2848 </example>
2849
2850 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2851 <description>DSP_Lib Dotproduct example</description>
2852 <board name="uVision Simulator" vendor="Keil"/>
2853 <project>
2854 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2855 </project>
2856 <attributes>
2857 <component Cclass="CMSIS" Cgroup="CORE"/>
2858 <component Cclass="CMSIS" Cgroup="DSP"/>
2859 <component Cclass="Device" Cgroup="Startup"/>
2860 <category>Getting Started</category>
2861 </attributes>
2862 </example>
2863
2864 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2865 <description>DSP_Lib FFT Bin example</description>
2866 <board name="uVision Simulator" vendor="Keil"/>
2867 <project>
2868 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2869 </project>
2870 <attributes>
2871 <component Cclass="CMSIS" Cgroup="CORE"/>
2872 <component Cclass="CMSIS" Cgroup="DSP"/>
2873 <component Cclass="Device" Cgroup="Startup"/>
2874 <category>Getting Started</category>
2875 </attributes>
2876 </example>
2877
2878 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2879 <description>DSP_Lib FIR example</description>
2880 <board name="uVision Simulator" vendor="Keil"/>
2881 <project>
2882 <environment name="uv" load="arm_fir_example.uvprojx"/>
2883 </project>
2884 <attributes>
2885 <component Cclass="CMSIS" Cgroup="CORE"/>
2886 <component Cclass="CMSIS" Cgroup="DSP"/>
2887 <component Cclass="Device" Cgroup="Startup"/>
2888 <category>Getting Started</category>
2889 </attributes>
2890 </example>
2891
2892 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2893 <description>DSP_Lib Graphic Equalizer example</description>
2894 <board name="uVision Simulator" vendor="Keil"/>
2895 <project>
2896 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2897 </project>
2898 <attributes>
2899 <component Cclass="CMSIS" Cgroup="CORE"/>
2900 <component Cclass="CMSIS" Cgroup="DSP"/>
2901 <component Cclass="Device" Cgroup="Startup"/>
2902 <category>Getting Started</category>
2903 </attributes>
2904 </example>
2905
2906 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2907 <description>DSP_Lib Linear Interpolation example</description>
2908 <board name="uVision Simulator" vendor="Keil"/>
2909 <project>
2910 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2911 </project>
2912 <attributes>
2913 <component Cclass="CMSIS" Cgroup="CORE"/>
2914 <component Cclass="CMSIS" Cgroup="DSP"/>
2915 <component Cclass="Device" Cgroup="Startup"/>
2916 <category>Getting Started</category>
2917 </attributes>
2918 </example>
2919
2920 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2921 <description>DSP_Lib Matrix example</description>
2922 <board name="uVision Simulator" vendor="Keil"/>
2923 <project>
2924 <environment name="uv" load="arm_matrix_example.uvprojx"/>
2925 </project>
2926 <attributes>
2927 <component Cclass="CMSIS" Cgroup="CORE"/>
2928 <component Cclass="CMSIS" Cgroup="DSP"/>
2929 <component Cclass="Device" Cgroup="Startup"/>
2930 <category>Getting Started</category>
2931 </attributes>
2932 </example>
2933
2934 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2935 <description>DSP_Lib Signal Convergence example</description>
2936 <board name="uVision Simulator" vendor="Keil"/>
2937 <project>
2938 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2939 </project>
2940 <attributes>
2941 <component Cclass="CMSIS" Cgroup="CORE"/>
2942 <component Cclass="CMSIS" Cgroup="DSP"/>
2943 <component Cclass="Device" Cgroup="Startup"/>
2944 <category>Getting Started</category>
2945 </attributes>
2946 </example>
2947
2948 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2949 <description>DSP_Lib Sinus/Cosinus example</description>
2950 <board name="uVision Simulator" vendor="Keil"/>
2951 <project>
2952 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2953 </project>
2954 <attributes>
2955 <component Cclass="CMSIS" Cgroup="CORE"/>
2956 <component Cclass="CMSIS" Cgroup="DSP"/>
2957 <component Cclass="Device" Cgroup="Startup"/>
2958 <category>Getting Started</category>
2959 </attributes>
2960 </example>
2961
2962 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2963 <description>DSP_Lib Variance example</description>
2964 <board name="uVision Simulator" vendor="Keil"/>
2965 <project>
2966 <environment name="uv" load="arm_variance_example.uvprojx"/>
2967 </project>
2968 <attributes>
2969 <component Cclass="CMSIS" Cgroup="CORE"/>
2970 <component Cclass="CMSIS" Cgroup="DSP"/>
2971 <component Cclass="Device" Cgroup="Startup"/>
2972 <category>Getting Started</category>
2973 </attributes>
2974 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2975
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2976 <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
Matthias Hertelb73eaf32016-07-22 15:18:56 +0200[diff] [blame]2977 <description>CMSIS-RTOS2 Blinky example</description>
2978 <board name="uVision Simulator" vendor="Keil"/>
2979 <project>
2980 <environment name="uv" load="Blinky.uvprojx"/>
2981 </project>
2982 <attributes>
2983 <component Cclass="CMSIS" Cgroup="CORE"/>
2984 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2985 <component Cclass="Device" Cgroup="Startup"/>
2986 <category>Getting Started</category>
2987 </attributes>
2988 </example>
Martin Günther0ffe8f92016-08-24 11:43:05 +0200[diff] [blame]2989
Robert Rostohare13e4702016-11-07 15:23:44 +0100[diff] [blame]2990 <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
Matthias Hertel4b70ae42016-11-07 14:14:59 +0100[diff] [blame]2991 <description>CMSIS-RTOS2 mixed API v1 and v2</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]2992 <board name="uVision Simulator" vendor="Keil"/>
2993 <project>
2994 <environment name="uv" load="Blinky.uvprojx"/>
2995 </project>
2996 <attributes>
2997 <component Cclass="CMSIS" Cgroup="CORE"/>
2998 <component Cclass="CMSIS" Cgroup="RTOS2"/>
2999 <component Cclass="Device" Cgroup="Startup"/>
3000 <category>Getting Started</category>
3001 </attributes>
3002 </example>
3003
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3004 <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3005 <description>CMSIS-RTOS2 Message Queue Example</description>
3006 <board name="uVision Simulator" vendor="Keil"/>
3007 <project>
3008 <environment name="uv" load="MsqQueue.uvprojx"/>
3009 </project>
3010 <attributes>
3011 <component Cclass="CMSIS" Cgroup="CORE"/>
3012 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3013 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3014 <component Cclass="Device" Cgroup="Startup"/>
3015 <category>Getting Started</category>
3016 </attributes>
3017 </example>
Jonatan Antoni6c160d42017-09-01 10:48:45 +0200[diff] [blame]3018
3019 <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3020 <description>CMSIS-RTOS2 Memory Pool Example</description>
3021 <board name="Fixed Virtual Platform" vendor="ARM"/>
3022 <project>
3023 <environment name="uv" load="MemPool.uvprojx"/>
3024 </project>
3025 <attributes>
3026 <component Cclass="CMSIS" Cgroup="CORE"/>
3027 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3028 <component Cclass="Compiler" Cgroup="EventRecorder"/>
3029 <component Cclass="Device" Cgroup="Startup"/>
3030 <category>Getting Started</category>
3031 </attributes>
3032 </example>
Jonatan Antoni401391f2017-08-30 16:52:33 +0200[diff] [blame]3033
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3034 <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3035 <description>Bare-metal secure/non-secure example without RTOS</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3036 <board name="uVision Simulator" vendor="Keil"/>
3037 <project>
3038 <environment name="uv" load="NoRTOS.uvmpw"/>
3039 </project>
3040 <attributes>
3041 <component Cclass="CMSIS" Cgroup="CORE"/>
3042 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3043 <component Cclass="Device" Cgroup="Startup"/>
3044 <category>Getting Started</category>
3045 </attributes>
3046 </example>
3047
Christopher Seidlb8c998f2016-11-08 15:49:02 +0100[diff] [blame]3048 <example name="TrustZone for ARMv8-M RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
Christopher Seidl522e1f22016-11-07 16:05:02 +0100[diff] [blame]3049 <description>Secure/non-secure RTOS example with thread context management</description>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3050 <board name="uVision Simulator" vendor="Keil"/>
3051 <project>
3052 <environment name="uv" load="RTOS.uvmpw"/>
3053 </project>
3054 <attributes>
3055 <component Cclass="CMSIS" Cgroup="CORE"/>
3056 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3057 <component Cclass="Device" Cgroup="Startup"/>
3058 <category>Getting Started</category>
3059 </attributes>
3060 </example>
Matthias Hertel3bb828f2016-11-07 13:51:50 +0100[diff] [blame]3061
ReinhardKeil3bd0e172016-11-10 07:59:24 +0100[diff] [blame]3062 <example name="TrustZone for ARMv8-M RTOS Security Tests" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3063 <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3064 <board name="uVision Simulator" vendor="Keil"/>
3065 <project>
3066 <environment name="uv" load="RTOS_Faults.uvmpw"/>
3067 </project>
3068 <attributes>
3069 <component Cclass="CMSIS" Cgroup="CORE"/>
3070 <component Cclass="CMSIS" Cgroup="RTOS2"/>
3071 <component Cclass="Device" Cgroup="Startup"/>
3072 <category>Getting Started</category>
3073 </attributes>
3074 </example>
3075
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]3076 </examples>
3077
3078</package>