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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / 31e48e61174567e77b1fa7a221e017d3e7ff8ca1
  1. 31e48e6 Fixed revision histories for release 5.1.0. by Jonatan Antoni · 8 years ago
  2. 9329fe3 Flash programming function - diagrams added by ReinhardKeil · 8 years ago
  3. 3b98359 MPU_Enable function description enhanced by ReinhardKeil · 8 years ago
  4. a37414d Added flow diagrams for Flash programming. by Christopher Seidl · 8 years ago
  5. 6b4231f CMSIS-Core(A): Updated cmsis_gcc.h by Daniel Brondani · 8 years ago
  6. 41401c7 Revert "CMSIS-RTOS2: Updated TrustZone Examples startup code to set MSPLIM correctly." by Jonatan Antoni · 8 years ago
  7. 102fe7f Bump all versions and change histories for CMSIS 5.1.0 release. by Jonatan Antoni · 8 years ago
  8. 3a1f5e7 CMSIS-RTOS2: Added a special case handling for Cortex-A when a thread is dispatched by tick handler and overruled by pendsv handler directly afterwards. by Jonatan Antoni · 8 years ago
  9. 703f445 Added RelChip by Christopher Seidl · 8 years ago
  10. 8bb13a7 CMSIS-Core(M): Added MPU CTRL register defines to MPU section in documentation. by Jonatan Antoni · 8 years ago
  11. 040d63b CMSIS-Core(A): Changed byte access into word access in remaining GIC functions by Daniel Brondani · 8 years ago
  12. e2c0850 Documentation clean up by ReinhardKeil · 8 years ago
  13. ca0a3ff CMSIS-RTOS2: Updated TrustZone Examples startup code to set MSPLIM correctly. by Jonatan Antoni · 8 years ago
  14. faaa48f CMSIS-Core(A): by Daniel Brondani · 8 years ago
  15. a6803ab CMSIS-Core(A): Changed byte access into word access in GIC_SetPendingIRQ and GIC_ClearPendingIRQ functions for FVP compliance. by Daniel Brondani · 8 years ago
  16. 519f3b3 CMSIS-Core(M): Fixed ARM MPU implementation for Cortex-M0+. by Jonatan Antoni · 8 years ago
  17. dc7e2ca CMSIS-Core(M): Fixed MPU documentation after prefix addition. by Jonatan Antoni · 8 years ago
  18. 9a2792a CMSIS-Core(M): Prefixed all MPU functions with ARM_ to prevent name clashes with existing vendor abstractions. by Jonatan Antoni · 8 years ago
  19. d632146 CMSIS-Core(A): Added register correlation between CMSIS and TRMs. by Jonatan Antoni · 8 years ago
  20. 45dc996 CMSIS-Core(A): Core Register documentation. by Jonatan Antoni · 8 years ago
  21. ca41305 CMSIS-RTOS: Fixed signed/unsigned warnings ins TrustZoneV8M examples. by Jonatan Antoni · 8 years ago
  22. 37ebc75 updating FVP Simulator config files for v10.3 by Joachim Krech · 8 years ago
  23. db5c253 CMSIS-Core(A): Removed duplicate RESERVED members. by Jonatan Antoni · 8 years ago
  24. 03df35f CMSIS-Core(A): Enhanced register abstraction and documentation. by Jonatan Antoni · 8 years ago
  25. 0a0d2b9 CMSIS-Core(M): Fixed typos and formatting in MPU functions. by Daniel Brondani · 8 years ago
  26. 650abfe Added OS Tick component for Cortex-A7: Generic Physical Timer by Daniel Brondani · 8 years ago
  27. 3c2148c CMSIS-Core(A): Rework documentation. by Jonatan Antoni · 8 years ago
  28. 4952b3a CMSIS-Driver: Minor fixes and example enhancements. by Jonatan Antoni · 8 years ago
  29. 954d83f CMSIS-Core(M): Fix up MPU implementation. by Jonatan Antoni · 8 years ago
  30. f97808b Fixed LINT comments. by Jonatan Antoni · 8 years ago
  31. c884072 Added HDSC by Christopher Seidl · 8 years ago
  32. ea12c66 CMSIS-Zone: Split up use cases MPU Protection and TrustZone Partitioning. by Jonatan Antoni · 8 years ago
  33. f974dd4 CMSIS-Zone: Enhanced XML Format documentation with storage data model introduction. by Jonatan Antoni · 8 years ago
  34. f71f6cf CMSIS-Core(M): Initial contribution for generic MPU functions. by Jonatan Antoni · 8 years ago
  35. 63caeaa Documentation: Added CMSIS-Zone to overview page. by Jonatan Antoni · 8 years ago
  36. f4123e1 CMSIS-RTOS2: Enhanced RTX5 documentation with references to required IRQ and OS Tick components. by Jonatan Antoni · 8 years ago
  37. 67a4147 CMSIS-RTOS2: Enhanced documentation of Thread Flags with usage example explaining return value behaviour. by Jonatan Antoni · 8 years ago
  38. 9ee09eb CMSIS-Zone: Added first FreeMarker template example to Generator Data Model documentation. by Jonatan Antoni · 8 years ago
  39. 2b33752 Modified LINT comments to use C-style instead of C++-style in order to be C89 compliant. by Jonatan Antoni · 8 years ago
  40. 8293457 CMSIS-Core(M): Fixed SYSTICK example with missing volatile definition. by Jonatan Antoni · 8 years ago
  41. 6b0c405 CMSIS-Zone: Enhanced Generator Data Model documentation. by Jonatan Antoni · 8 years ago
  42. bc749fc CMSIS-Zone: Added Generator Data Model JavaDoc. by Jonatan Antoni · 8 years ago
  43. 06ee0bb Fix: RTX5 Timer template by Matthias Hertel · 8 years ago
  44. 03241e1 CMSIS-Pack: Debug Sequence: added ResetProcessor is empty for ARMv8-M based systems by ReinhardKeil · 8 years ago
  45. 91fa3f7 CMSIS-Core(A): Initial contribution of GCC compiler header. by Jonatan Antoni · 8 years ago
  46. baebcb1 Clarified the usage of the <processor> element with its attributes. by Christopher Seidl · 8 years ago
  47. d574833 CMSIS-Core(A): Updated documentation by Daniel Brondani · 8 years ago
  48. c5dc7e6 CMSIS-Zone: Added schema structure example to documentation. by Jonatan Antoni · 8 years ago
  49. 597839e CMSIS-Zone: generic overview by ReinhardKeil · 8 years ago
  50. 2d9a9cd CMSIS-DAP: renamed "Debug Unit Timer" to "Test Domain Timer" to avoid confusion with DUT (Device Under Test) by ReinhardKeil · 8 years ago
  51. 0a0992d Aligned GIC examples in documentation by Vladimir Umek · 8 years ago
  52. 9e35a88 GIC priority grouping handling corrected by Vladimir Umek · 8 years ago
  53. 639abb8 CMSIS-Core(A): Enhanced documentation for new IRQ API. by Jonatan Antoni · 8 years ago
  54. 3b4c652 CMSIS-Zone: Documentation in progress. by Jonatan Antoni · 8 years ago
  55. f31c722 CMSIS-Zone: Documentation progress. by Jonatan Antoni · 8 years ago
  56. a925278 CMCIS-Core(A): Fixed some typos. by Jonatan Antoni · 8 years ago
  57. bf186a6 RTX5: component view optimizations and corrections by Vladimir Umek · 8 years ago
  58. c2538f8 Correct gcc version check for __builtin_arm_[gs]et_fpscr builtins by Norbert Lange · 8 years ago
  59. 4df83f8 Pack generator updated by Vladimir Umek · 8 years ago
  60. a80bbcf OS Tick Private Timer updated (it now uses IRQ Controller API) by Vladimir Umek · 8 years ago
  61. 77391f3 RTX5: IRQ Controller support added by Vladimir Umek · 8 years ago
  62. c852bdd Added IRQ Controller API, implementation using ARM GIC and basic documentation by Vladimir Umek · 8 years ago
  63. 56dedd5 Updated GIC and Private Timer access functions by Vladimir Umek · 8 years ago
  64. abc26bc RTX: Enhanced SCVD with current stack pointer. by Jonatan Antoni · 8 years ago
  65. ca251ce CMSIS-DAP: renamed "Performance Counter" to "Test Input" by ReinhardKeil · 8 years ago
  66. 2c8fcb6 CMSIS-DAP documentation - review feedback phase 1 by ReinhardKeil · 8 years ago
  67. 7560b55 removed none existing image path by Joachim Krech · 8 years ago
  68. 0d08766 configure default compiler version 6 by Joachim Krech · 8 years ago
  69. 1f3820c Doxygen Core(A): Fixed warnings regarding ambiguous grouping. by Jonatan Antoni · 8 years ago
  70. 7a01823 Fix wrong comment in SCB about MVFR2 register by Guntli Michael · 8 years ago
  71. ebea7cb Time Stamp changed to 32-bit by ReinhardKeil · 8 years ago
  72. 8eb4e2b Fixed compilation errors by Vladimir Umek · 8 years ago
  73. bed0759 OS Tick: added Private Timer implementation by Vladimir Umek · 8 years ago
  74. 2a4ab85 CMSIS-RTOS2: Enhanced semaphore documentation with producer/consumer example. by Jonatan Antoni · 8 years ago
  75. 97c25ae RTX5: updated library project and libraries (IAR) by Vladimir Umek · 8 years ago
  76. 2fd855b RTX5: register access order changed (SVC_Initialize) by Vladimir Umek · 8 years ago
  77. 34dda88 CMSIS-RTOS2: Enhanced documentation. by Jonatan Antoni · 8 years ago
  78. a012919 RTX5: updated revision history by Robert Rostohar · 8 years ago
  79. debe9fd OS Tick: updated documentation (typo correction) by Robert Rostohar · 8 years ago
  80. eacfe06 RTOS2: Enhanced documentation with details about new OS Tick API. by Jonatan Antoni · 8 years ago
  81. 325b542 RTOS2: Enhanced osDelayUntil and osKernelGetTickCount with tick overflow handling. by Jonatan Antoni · 8 years ago
  82. 6ae0d96 RTOS2: Enhanced RTX configuration documentation (SDCMSIS-607). by Jonatan Antoni · 8 years ago
  83. 216c127 RTX5: latest libraries (ARM/GCC) by Robert Rostohar · 8 years ago
  84. 0c23db8 RTX5: updated library projects by Robert Rostohar · 8 years ago
  85. aeb6dd5 Updated description of OS Tick API by Robert Rostohar · 8 years ago
  86. 04fa90a Updated pack generator script by Robert Rostohar · 8 years ago
  87. dcfd432 RTX5: updated to use OS Tick API by Robert Rostohar · 8 years ago
  88. 6e5621b CMSIS Device: Added OS Tick API by Robert Rostohar · 8 years ago
  89. f2da71e CMSIS-Core: #203 compiler macro for packed union by Guillaume Galeazzi · 8 years ago
  90. f32dc4c RTX5: updated to CMSIS RTOS2 API V2.1.1 by Robert Rostohar · 8 years ago
  91. 9470b0b RTOS2: Updated API V2.1.1 by Robert Rostohar · 8 years ago
  92. 3c55eec Fixed read/write permissions of Core_A Private Timer registers by Daniel Brondani · 8 years ago
  93. 3edfb48 RTX5: Corrected MessageQueue to use actual message length (before padding). by Robert Rostohar · 8 years ago
  94. 4f96e9f updated device vendor list by Joachim Krech · 8 years ago
  95. 7917826 Added Synwit by Christopher Seidl · 8 years ago
  96. 390320d CMSIS-RTOS2: Fixed example for osThreadGetName, added missing id parameter. SDCMSIS-667 by Jonatan Antoni · 8 years ago
  97. 8078c31 CMSIS-RTOS2: Enhanced mutex flag documentation and added examples. Issue #200 by Jonatan Antoni · 8 years ago
  98. 3e5e886 Added ArteryTek by Christopher Seidl · 8 years ago
  99. 31da064 Fixed priority value display for messages in message queue. by Vladimir Umek · 8 years ago
  100. 1183f2d Added GIC set/clear SGI pending flags handling by Daniel Brondani · 8 years ago