1. 5e4b392 RTX5: version increased to V5.2.2 by Vladimir Umek · 8 years ago
  2. e928a67 Core(A): Fixed common core functions to access CP15 registers in cmsis_armcc.h by Daniel Brondani · 8 years ago
  3. 9687df3 Corrected IRQ and SVC exception handlers for Cortex-A. by Vladimir Umek · 8 years ago
  4. 12dd925 Fixed typo by Christopher Seidl · 8 years ago
  5. 838ee26 Core(M): Added cast to __USAT error return value to suppress compiler warnings. by Jonatan Antoni · 8 years ago
  6. f49445f Bump pack dev version due to major changes to compiler iar/iccarm header. by Jonatan Antoni · 8 years ago
  7. 975d3fe Moved SSAT and USAT implementation to work for all compiler versions by Peter Nyström · 8 years ago
  8. bc632ae Added cmsis_iccarm.h by Peter Nyström · 8 years ago
  9. 6b091ec CoreValidation: Fixed example projects. by Jonatan Antoni · 8 years ago
  10. b56631a CoreValidation: Updated MDK examples (Cortex-M). by Jonatan Antoni · 8 years ago
  11. 00ff3fb CoreValidation: Updated DS-MDK examples (Cortex-A). by Jonatan Antoni · 8 years ago
  12. 1ee5416 CoreValidation: Fixed DS-MDK projects in pdsc. by Jonatan Antoni · 8 years ago
  13. c45122c CodeValidation: Added configuration files for Cortex-A fast models for correct semihosting usage. by Jonatan Antoni · 8 years ago
  14. 7d4e1f5 CoreValidation: Fixed CoreA issues and warnings. by Jonatan Antoni · 8 years ago
  15. c5f12e1 Core(A): Fixed pedantic GCC warnings. by Jonatan Antoni · 8 years ago
  16. bc54e9b CoreValidation: Fixed DS-MDK projects and added build script. by Jonatan Antoni · 8 years ago
  17. 0f1da77 CoreValidation: Separated DS-MDK example projects per target and compiler. by Jonatan Antoni · 8 years ago
  18. 7e5e24f Added startup code and linker scripts for GCC Cortex-A5 and -A7. by Jonatan Antoni · 8 years ago
  19. 43bf37f CoreValidation: Enhanced framework with a catch for (unintended) hard faults during test cases. by Jonatan Antoni · 8 years ago
  20. 3bb9b77 CMSIS Driver: Updated CAN API V1.2 (issue #179: added Bus-off state) by Robert Rostohar · 8 years ago
  21. cdd1492 CoreValidation: Added batch build script for IAR examples. by Jonatan Antoni · 8 years ago
  22. 8105ff9 CoreValidation: Moved common parts of command line build script to Utilities. by Jonatan Antoni · 8 years ago
  23. 81f6c5c CoreValidation: Fixed MDK example project settings. by Jonatan Antoni · 8 years ago
  24. 0de6ff1 CoreValidation: Modified MDK example project for automated test execution using FVP with semihosting. by Jonatan Antoni · 8 years ago
  25. d79f3a0 Fixed typo by Christopher Seidl · 8 years ago
  26. 6649ddc adding CM23 and CM33 to SVD Schema by Joachim Krech · 8 years ago
  27. bf718a3 Core(M): Changed USAT intrinsic to work on signed input values. by Jonatan Antoni · 8 years ago
  28. d4f18cc CoreValidation: Fixed compiler and MISRA warnings. by Jonatan Antoni · 8 years ago
  29. e1454c1 Added missing startup files for IAR to ARMCM23 and ARMCM33 devices in PDSC. by Jonatan Antoni · 8 years ago
  30. 61be213 CoreValidation: Initial contribution of a test suite for validating CMSIS-Core. by Jonatan Antoni · 8 years ago
  31. d5d5549 Core: Fixed minor compiler and MISRA warnings. by Jonatan Antoni · 8 years ago
  32. ca5cf5d Fixed documentation after Core(A) refactoring. by Jonatan Antoni · 8 years ago
  33. 005bc4d Core(A): Fixed compiler header for GCC. by Jonatan Antoni · 8 years ago
  34. 9568ea5 Core(A): Updated version information and history. by Jonatan Antoni · 8 years ago
  35. 096b2f0 Core(A): Refactored all Coprocessor 15 related core functions into a common header file. by Jonatan Antoni · 8 years ago
  36. e1beccb Fixed Cortex-A startup code for AC5 by adding PRESERVE8 to all assembly functions. by Jonatan Antoni · 8 years ago
  37. 74d87a9 Core(A): Fixed various compiler intrinsics. by Jonatan Antoni · 8 years ago
  38. 7b7dd34 Core(A): Added __SSAT and __USAT intrinsics like for Core(M). by Jonatan Antoni · 8 years ago
  39. 857fed9 Core(M): Added new IAR compiler header, not yet used. by Jonatan Antoni · 8 years ago
  40. 3cc0797 Core(M): Fixed MPU RBAR register define ADDR to BASE. by Jonatan Antoni · 8 years ago
  41. efbfed0 Core(M): Fixed indention in mpu_armv7.h by Jonatan Antoni · 8 years ago
  42. 2e05f3b RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata by Robert Rostohar · 8 years ago
  43. 711f673 Merge branch 'develop' of https://github.com/ARM-software/CMSIS_5 into develo by Joachim Krech · 8 years ago
  44. 7e866a7 fixed start/end tag in code example for config wizard by Joachim Krech · 8 years ago
  45. fa7b62b DSP: Clean up arm_math.h by Jonatan Antoni · 8 years ago
  46. 54e572e Core(M): Fixed mpu_armv8.h region declaration, fields of MPU tables are not volatile (IOM). by Jonatan Antoni · 8 years ago
  47. c4b3290 Core(M): Substituted assembly implementation for get/set FPSCR intrinsic on AC6 with builtin functions. by Jonatan Antoni · 8 years ago
  48. 6c160d4 CMSIS-RTOS2: Added example for memory pool usage. by Jonatan Antoni · 8 years ago
  49. 9e75a4e Core(M): Added ARMv6-M compatibility functions for __SSAT and __USAT. by Jonatan Antoni · 8 years ago
  50. 14930c1 Core(M): Fixed function prototypes in compiler headers. by Jonatan Antoni · 8 years ago
  51. 401391f RTX5: Added example for using message queues. by Jonatan Antoni · 8 years ago
  52. a09503d Core: Fixed documentation __SSAT function signature. by Jonatan Antoni · 8 years ago
  53. f288401 Added a default memory layout description for Cortex-A devices. (Issue #233) by Jonatan Antoni · 8 years ago
  54. 5523c62 Fixed command code in response for DAP_SWD_Sequence by Reinhard Keil · 8 years ago
  55. b80fe54 Further MISRA-C Rule 10.6 fix up: Unsigned constant values with U suffix, uppercase instead of lowercase. (Issue #227) by Jonatan Antoni · 8 years ago
  56. 40d172f Global MISRA-C Rule 10.6 fix up: Unsigned constant values with U suffix, uppercase instead of lowercase. (Issue #227) by Jonatan Antoni · 8 years ago
  57. 1e5c700 RTX5: latest libraries (IAR) by Vladimir Umek · 8 years ago
  58. f9ac05d RTX5: latest libraries (ARM/GCC) by Robert Rostohar · 8 years ago
  59. a635133 RTX5: Corrected SysTick and SVC Interrupt Priority for Cortex-M. by Robert Rostohar · 8 years ago
  60. 121caed Minor variable naming change by Vladimir Umek · 8 years ago
  61. 21937c8 CMSIS-RTOS2: Updated TrustZone Examples (literal suffixes shall be upper case - MISRA C++ 2008 Rule 2-13-4) by Robert Rostohar · 8 years ago
  62. 8474866 CMSIS-Core(M): Fixed ARMv7 MPU Function for loading MPU tables. by Jonatan Antoni · 8 years ago
  63. f40ab95 CMSIS-Core(M): Added ARMv8-M MPU Functions for Cortex-M23/M33. by Jonatan Antoni · 8 years ago
  64. 8cbaa7d CMSIS-RTOS2/RTX5: Added current global dynamic memory usage counter to component viewer description. by Jonatan Antoni · 8 years ago
  65. 847c52c CMSIS-Core(A): Fixed GCC and ArmClang __FPU_ENABLE implementations to adhere to TARGET_FEATURE_EXTENSION_REGISTER_COUNT correctly. by Jonatan Antoni · 8 years ago
  66. b27a412 Added startup file and linker script for GCC targeting ARMCA9. by Jonatan Antoni · 8 years ago
  67. 4e074e7 Bump pack version to post-release 5.1.1-dev0 for development. by Jonatan Antoni · 8 years ago
  68. 31e48e6 Fixed revision histories for release 5.1.0. by Jonatan Antoni · 8 years ago
  69. 9329fe3 Flash programming function - diagrams added by ReinhardKeil · 8 years ago
  70. 3b98359 MPU_Enable function description enhanced by ReinhardKeil · 8 years ago
  71. a37414d Added flow diagrams for Flash programming. by Christopher Seidl · 8 years ago
  72. 6b4231f CMSIS-Core(A): Updated cmsis_gcc.h by Daniel Brondani · 8 years ago
  73. 41401c7 Revert "CMSIS-RTOS2: Updated TrustZone Examples startup code to set MSPLIM correctly." by Jonatan Antoni · 8 years ago
  74. 102fe7f Bump all versions and change histories for CMSIS 5.1.0 release. by Jonatan Antoni · 8 years ago
  75. 3a1f5e7 CMSIS-RTOS2: Added a special case handling for Cortex-A when a thread is dispatched by tick handler and overruled by pendsv handler directly afterwards. by Jonatan Antoni · 8 years ago
  76. 703f445 Added RelChip by Christopher Seidl · 8 years ago
  77. 8bb13a7 CMSIS-Core(M): Added MPU CTRL register defines to MPU section in documentation. by Jonatan Antoni · 8 years ago
  78. 040d63b CMSIS-Core(A): Changed byte access into word access in remaining GIC functions by Daniel Brondani · 8 years ago
  79. e2c0850 Documentation clean up by ReinhardKeil · 8 years ago
  80. ca0a3ff CMSIS-RTOS2: Updated TrustZone Examples startup code to set MSPLIM correctly. by Jonatan Antoni · 8 years ago
  81. faaa48f CMSIS-Core(A): by Daniel Brondani · 8 years ago
  82. a6803ab CMSIS-Core(A): Changed byte access into word access in GIC_SetPendingIRQ and GIC_ClearPendingIRQ functions for FVP compliance. by Daniel Brondani · 8 years ago
  83. 519f3b3 CMSIS-Core(M): Fixed ARM MPU implementation for Cortex-M0+. by Jonatan Antoni · 8 years ago
  84. dc7e2ca CMSIS-Core(M): Fixed MPU documentation after prefix addition. by Jonatan Antoni · 8 years ago
  85. 9a2792a CMSIS-Core(M): Prefixed all MPU functions with ARM_ to prevent name clashes with existing vendor abstractions. by Jonatan Antoni · 8 years ago
  86. d632146 CMSIS-Core(A): Added register correlation between CMSIS and TRMs. by Jonatan Antoni · 8 years ago
  87. 45dc996 CMSIS-Core(A): Core Register documentation. by Jonatan Antoni · 8 years ago
  88. ca41305 CMSIS-RTOS: Fixed signed/unsigned warnings ins TrustZoneV8M examples. by Jonatan Antoni · 8 years ago
  89. 37ebc75 updating FVP Simulator config files for v10.3 by Joachim Krech · 8 years ago
  90. db5c253 CMSIS-Core(A): Removed duplicate RESERVED members. by Jonatan Antoni · 8 years ago
  91. 03df35f CMSIS-Core(A): Enhanced register abstraction and documentation. by Jonatan Antoni · 8 years ago
  92. 0a0d2b9 CMSIS-Core(M): Fixed typos and formatting in MPU functions. by Daniel Brondani · 8 years ago
  93. 650abfe Added OS Tick component for Cortex-A7: Generic Physical Timer by Daniel Brondani · 8 years ago
  94. 3c2148c CMSIS-Core(A): Rework documentation. by Jonatan Antoni · 8 years ago
  95. 4952b3a CMSIS-Driver: Minor fixes and example enhancements. by Jonatan Antoni · 8 years ago
  96. 954d83f CMSIS-Core(M): Fix up MPU implementation. by Jonatan Antoni · 8 years ago
  97. f97808b Fixed LINT comments. by Jonatan Antoni · 8 years ago
  98. c884072 Added HDSC by Christopher Seidl · 8 years ago
  99. ea12c66 CMSIS-Zone: Split up use cases MPU Protection and TrustZone Partitioning. by Jonatan Antoni · 8 years ago
  100. f974dd4 CMSIS-Zone: Enhanced XML Format documentation with storage data model introduction. by Jonatan Antoni · 8 years ago