commit 851cf5a325c6c1e3a794009e873cec02b4597b1d
author Dave Rodgman <dave.rodgman@arm.com> Sun Oct 08 12:26:41 2023 +0100
committer Dave Rodgman <dave.rodgman@arm.com> Wed Oct 25 09:06:24 2023 +0100
tree dc9d625cf627ad07fd63780ca5a5cc54fe91a095
parent 27e3c87fc1b33438a7a17b11e4aa9f1a69cfbc1a

Fix runtime detection on A32/T32

Signed-off-by: Dave Rodgman <dave.rodgman@arm.com>

library/aesce.c

diff --git a/library/aesce.c b/library/aesce.c
index cc0015b..11a22f6 100644
--- a/library/aesce.c
+++ b/library/aesce.c
@@ -190,6 +190,16 @@
      * once, but that is harmless.
      */
     if (mbedtls_aesce_has_support_result == -1) {
+#if defined(MBEDTLS_ARCH_IS_ARM32)
+        unsigned long auxval  = getauxval(AT_HWCAP);
+        unsigned long auxval2 = getauxval(AT_HWCAP2);
+        if (((auxval  & HWCAP_NEON) == HWCAP_NEON) &&
+            ((auxval2 & HWCAP2_AES) == HWCAP2_AES)) {
+            mbedtls_aesce_has_support_result = 1;
+        } else {
+            mbedtls_aesce_has_support_result = 0;
+        }
+#else
         unsigned long auxval = getauxval(AT_HWCAP);
         if ((auxval & (HWCAP_ASIMD | HWCAP_AES)) ==
             (HWCAP_ASIMD | HWCAP_AES)) {
@@ -197,6 +207,7 @@
         } else {
             mbedtls_aesce_has_support_result = 0;
         }
+#endif
     }
     return mbedtls_aesce_has_support_result;
 }