diff --git a/library/timing.c b/library/timing.c
index f22591d..4b29d7e 100644
--- a/library/timing.c
+++ b/library/timing.c
@@ -63,7 +63,7 @@
     struct timeval start;
 };
 
-#endif
+#endif /* _WIN32 && !EFIX64 && !EFI32 */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
@@ -77,7 +77,8 @@
     __asm   mov  [tsc], eax
     return( tsc );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          ( _MSC_VER && _M_IX86 ) || __WATCOMC__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     defined(__GNUC__) && defined(__i386__)
@@ -90,7 +91,8 @@
     asm volatile( "rdtsc" : "=a" (lo), "=d" (hi) );
     return( lo );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && __i386__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     defined(__GNUC__) && (defined(__amd64__) || defined(__x86_64__))
@@ -103,7 +105,8 @@
     asm volatile( "rdtsc" : "=a" (lo), "=d" (hi) );
     return( lo | (hi << 32) );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && ( __amd64__ || __x86_64__ ) */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__))
@@ -124,7 +127,8 @@
 
     return( tbl );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && ( __powerpc__ || __ppc__ ) */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     defined(__GNUC__) && defined(__sparc64__)
@@ -140,8 +144,9 @@
     asm volatile( "rdpr %%tick, %0;" : "=&r" (tick) );
     return( tick );
 }
-#endif
-#endif
+#endif /* __OpenBSD__ */
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && __sparc64__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&  \
     defined(__GNUC__) && defined(__sparc__) && !defined(__sparc64__)
@@ -155,7 +160,8 @@
     asm volatile( "mov   %%g1, %0" : "=r" (tick) );
     return( tick );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && __sparc__ && !__sparc64__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&      \
     defined(__GNUC__) && defined(__alpha__)
@@ -168,7 +174,8 @@
     asm volatile( "rpcc %0" : "=r" (cc) );
     return( cc & 0xFFFFFFFF );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && __alpha__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) &&      \
     defined(__GNUC__) && defined(__ia64__)
@@ -181,7 +188,8 @@
     asm volatile( "mov %0 = ar.itc" : "=r" (itc) );
     return( itc );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && POLARSSL_HAVE_ASM &&
+          __GNUC__ && __ia64__ */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(_MSC_VER) && \
     !defined(EFIX64) && !defined(EFI32)
@@ -196,7 +204,7 @@
 
     return (unsigned long)( offset.QuadPart );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK && _MSC_VER && !EFIX64 && !EFI32 */
 
 #if !defined(POLARSSL_HAVE_HARDCLOCK)
 
@@ -219,7 +227,7 @@
     return( ( tv_cur.tv_sec  - tv_init.tv_sec  ) * 1000000
           + ( tv_cur.tv_usec - tv_init.tv_usec ) );
 }
-#endif
+#endif /* !POLARSSL_HAVE_HARDCLOCK */
 
 volatile int alarmed = 0;
 
@@ -461,7 +469,7 @@
 
     if( verbose != 0 )
         polarssl_printf( "passed\n" );
-#endif
+#endif /* POLARSSL_NET_C */
 
     return( 0 );
 }