commit 14c785b71601092c1574ccb7eab4cf1c43dd07ec
author Fabio Utzig <utzig@apache.org> Thu Oct 07 12:13:53 2021 -0300
committer Fabio Utzig <utzig@utzig.org> Thu Oct 07 14:23:51 2021 -0300
tree 199369c5b1e04a48243b5b74f6a1ffa916744710
parent db543e502617a54c1ff62d39655d4aac914b5dc0

ci: add encrypted image RAM load test

Signed-off-by: Fabio Utzig <utzig@apache.org>

.github/workflows/sim.yaml

diff --git a/.github/workflows/sim.yaml b/.github/workflows/sim.yaml
index a2fec92..df103ac 100644
--- a/.github/workflows/sim.yaml
+++ b/.github/workflows/sim.yaml
@@ -34,6 +34,7 @@
         - "sig-ecdsa-mbedtls enc-aes256-ec256 validate-primary-slot"
         - "sig-rsa validate-primary-slot overwrite-only downgrade-prevention"
         - "sig-rsa validate-primary-slot ram-load"
+        - "sig-rsa enc-rsa validate-primary-slot ram-load"
         - "sig-rsa validate-primary-slot direct-xip"
         - "sig-rsa validate-primary-slot ram-load multiimage"
         - "sig-rsa validate-primary-slot direct-xip multiimage"