diff --git a/boot/cypress/MCUBootApp/MCUBootApp.md b/boot/cypress/MCUBootApp/MCUBootApp.md
index 3422afb..ddbbea1 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.md
+++ b/boot/cypress/MCUBootApp/MCUBootApp.md
@@ -586,18 +586,14 @@
 
 This application is created to demonstrate the MCUboot library features and not as a reference example. So, some considerations are taken.
 
-1. `SCB5` is used to configure a serial port for debug prints. This is the most commonly used Serial Communication Block number among available Cypress PSoC™ 6 kits. To use custom hardware with this application, set custom `SCB*` and pins in the  `cypress/MCUBootApp/custom_debug_uart_cfg.h` file and pass the `USE_CUSTOM_DEBUG_UART=1` parameter to the `make` command upon MCUBootApp build.
+1. To use custom UART hardware pass the `UART_RX_DEFAULT=xx` and `UART_TX_DEFAULT=xx` parameters to the `make` command upon MCUBootApp build. 
 
-The `custom_debug_uart_cfg.h` file description:
+    For example:
 
-`CUSTOM_UART_HW`           - Sets a custom SCB name used as the debug serial port. (e.g. `SCB1`, `SCB2`, ...)  
-`CUSTOM_UART_SCB_NUMBER`   - Sets the number of SCB. It is `x` in the custom SCBx, which is set in `CUSTOM_UART_HW`.
-                                 (e.g. `1` if `CUSTOM_UART_HW` is  set to  SCB1, `2` if `CUSTOM_UART_HW`is  set to  SCB2, ...)  
-`CUSTOM_UART_PORT`         - Sets the GPIO port number whose pins are used as RX and TX of the debug serial port.  
-`CUSTOM_UART_RX_PIN`       - Sets the pin number in the GPIO port used as RX of the debug serial port.  
-`CUSTOM_UART_TX_PIN`       - Sets the pin number in the GPIO port used as TX of the debug serial port.  
+        make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M FLASH_MAP=./psoc62_2m_swap_single.json UART_TX_DEFAULT?=P0_3 UART_RX_DEFAULT?=P0_2
 
-The above-described applies to `PSoC™ 62` and `PSoC™ 63` platforms.
+`UART_RX_DEFAULT` - Sets the pin number in the GPIO port used as RX of the debug serial port.  
+`UART_TX_DEFAULT` - Sets the pin number in the GPIO port used as TX of the debug serial port.  
 
 2. `CY_SMIF_SLAVE_SELECT_0` is used to define the chip select for the SMIF driver. This configuration is used on the evaluation kit for this example CY8CPROTO-062-4343W. To use custom hardware with this application, change the value of `smif_id` in `main.c` of MCUBootApp to a value that corresponds to your design.
 __NOTE__: SMIF driver not supported with `PSoC™ 063` based kits.
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
index c6e3361..b5fcfca 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
@@ -64,8 +64,8 @@
      * where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'.
      */
     ram               (rwx)   : ORIGIN = 0x08000A00, LENGTH = 0x1F600
-    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x27E90
-    smif_struct		  (rx)    : ORIGIN = 0x10027E90, LENGTH = 0x170
+    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = BOOTLOADER_SIZE
+    smif_struct		  (rx)    : ORIGIN = 0x10000000 + BOOTLOADER_SIZE - 0x170, LENGTH = 0x170
 
     /* This is an unprotected public RAM region, with the placed .cy_sharedmem.
      * This region is used to place objects that require full access from both cores.
diff --git a/boot/cypress/MCUBootApp/README.md b/boot/cypress/MCUBootApp/README.md
index bb53301..6a70b21 100644
--- a/boot/cypress/MCUBootApp/README.md
+++ b/boot/cypress/MCUBootApp/README.md
@@ -167,6 +167,8 @@
 
         make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1 ENC_IMG=1
 
+**KNOWN ISSUE:** On **CYW20829** platform MCUBootApp compiled in `BUILDCFG=Release` mode and with enabled encryption `ENC_IMG=1` and hardware rollback support does not start valid next application `BlinkyApp`. This would be fixed in next releases.
+
 **Programming solution**
 
 There are couple ways of programming hex of MCUBootApp and BlinkyApp. Following instructions assume one of Cypress development kits, for example `CY8CPROTO_062_4343W`.
diff --git a/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h b/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h
deleted file mode 100644
index 9d99c58..0000000
--- a/boot/cypress/MCUBootApp/config/custom_debug_uart_cfg.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/********************************************************************************
-* Copyright 2021 Infineon Technologies AG
-* SPDX-License-Identifier: Apache-2.0
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-*     http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-********************************************************************************/
-
-#if !defined(CUSTOM_DEBUG_UART_CFG_H)
-#define CUSTOM_DEBUG_UART_CFG_H
-
-#if defined(USE_CUSTOM_DEBUG_UART)
-
-/* Define SCB which will be used as UART. */
-#define CUSTOM_UART_HW             SCB1
-
-/* Define SCB number which will be used as UART.
- * It is 'x' in SCBx
- * */
-#define CUSTOM_UART_SCB_NUMBER     1
-
-#define CUSTOM_UART_PORT           10
-
-/* define RX pin */
-#define CUSTOM_UART_RX_PIN         0
-
-/* define TX pin */
-#define CUSTOM_UART_TX_PIN         1
-
-#endif /* defined(USE_CUSTOM_DEBUG_UART) */
-
-#endif /* CUSTOM_DEBUG_UART_CFG_H */
diff --git a/boot/cypress/MCUBootApp/main.c b/boot/cypress/MCUBootApp/main.c
index 926e36d..86f37fe 100644
--- a/boot/cypress/MCUBootApp/main.c
+++ b/boot/cypress/MCUBootApp/main.c
@@ -212,6 +212,23 @@
     return false;
 }
 
+static void DeepSleep_Prepare(void)
+{
+    static cy_stc_syspm_callback_params_t syspmSleepAppParams;
+    static cy_stc_syspm_callback_t syspmAppSleepCallbackHandler =
+        {
+            Cy_SCB_UART_DeepSleepCallback, CY_SYSPM_DEEPSLEEP, 0u, &syspmSleepAppParams,
+            NULL, NULL, 0};
+
+    syspmSleepAppParams.base = cy_retarget_io_uart_obj.base;
+    syspmSleepAppParams.context = (void *)&(cy_retarget_io_uart_obj.context);
+
+    if (!Cy_SysPm_RegisterCallback(&syspmAppSleepCallbackHandler)) {
+        BOOT_LOG_ERR("Failed to register syspmAppSleepCallbackHandler");
+        CY_ASSERT(false);
+    }
+}
+
 int main(void)
 {
     struct boot_rsp rsp = {};
@@ -221,7 +238,7 @@
 
 
     if (rc != CY_RSLT_SUCCESS) {
-        CY_ASSERT((bool)0);
+        CY_ASSERT(false);
         /* Loop forever... */
         while (true) {
             __WFI();
@@ -257,7 +274,7 @@
                              CY_RETARGET_IO_BAUDRATE);
 
     if (rc != CY_RSLT_SUCCESS) {
-        CY_ASSERT((bool)0);
+        CY_ASSERT(false);
         /* Loop forever... */
         while (true) {
             __WFI();
@@ -286,7 +303,7 @@
         /* Check service application completion status */
         if (check_service_app_status() != 0) {
             BOOT_LOG_ERR("Service application failed");
-            CY_ASSERT((bool)0);
+            CY_ASSERT(false);
             /* Loop forever... */
             while (true) {
                 __WFI();
@@ -331,6 +348,8 @@
         }
     }
 
+    DeepSleep_Prepare();
+
     while (true) {
         if (boot_succeeded) {
             (void)Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);