Add support for intel_s1000 SoC which is based on Xtensa arch

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
diff --git a/boot/zephyr/boards/intel_s1000_crb.conf b/boot/zephyr/boards/intel_s1000_crb.conf
new file mode 100644
index 0000000..dcd38a6
--- /dev/null
+++ b/boot/zephyr/boards/intel_s1000_crb.conf
@@ -0,0 +1,44 @@
+CONFIG_LOG=y
+CONFIG_USB_DRIVER_LOG_LEVEL_ERR=y
+CONFIG_USB_DEVICE_LOG_LEVEL_ERR=y
+
+CONFIG_CONSOLE_HANDLER=y
+CONFIG_SYS_LOG=y
+CONFIG_DEBUG=n
+CONFIG_SYSTEM_CLOCK_DISABLE=y
+CONFIG_SYS_POWER_MANAGEMENT=n
+
+CONFIG_MAIN_STACK_SIZE=10240
+CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h"
+
+CONFIG_BOOT_ENCRYPT_RSA=n
+
+### Default to RSA
+CONFIG_BOOT_SIGNATURE_TYPE_RSA=y
+CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=n
+
+### The bootloader generates its own signature verification based on a
+### key file which needs to be provided and needs to match the selected signing
+### algorithm (CONFIG_BOOT_SIGNATURE_TYPE_).
+### The PEM files below are provided as examples.
+CONFIG_BOOT_SIGNATURE_KEY_FILE="root-rsa-2048.pem"
+#CONFIG_BOOT_SIGNATURE_KEY_FILE="root-ec-p256.pem"
+
+### mbedTLS has its own heap
+# CONFIG_HEAP_MEM_POOL_SIZE is not set
+
+### We never want Zephyr's copy of tinycrypt.  If tinycrypt is needed,
+### MCUboot has its own copy in tree.
+# CONFIG_TINYCRYPT is not set
+# CONFIG_TINYCRYPT_ECC_DSA is not set
+# CONFIG_TINYCRYPT_SHA256 is not set
+
+CONFIG_I2C=n
+CONFIG_SPI=y
+CONFIG_FLASH=y
+CONFIG_BOOT_MAX_IMG_SECTORS=512
+CONFIG_MULTITHREADING=y
+
+### Various Zephyr boards enable features that we don't want.
+# CONFIG_BT is not set
+# CONFIG_BT_CTLR is not set
diff --git a/boot/zephyr/boards/intel_s1000_crb.overlay b/boot/zephyr/boards/intel_s1000_crb.overlay
new file mode 100644
index 0000000..61f0d43
--- /dev/null
+++ b/boot/zephyr/boards/intel_s1000_crb.overlay
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2018 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/ {
+	sram0: memory@be000000 {
+		device_type = "memory";
+		compatible = "mmio-sram";
+		reg = <0xbe000000 0x30000>;
+	};
+};
+