diff --git a/boot/zephyr/CMakeLists.txt b/boot/zephyr/CMakeLists.txt
index 15c2ece..b5c754e 100644
--- a/boot/zephyr/CMakeLists.txt
+++ b/boot/zephyr/CMakeLists.txt
@@ -36,6 +36,11 @@
   set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_LIST_DIR}/dts.overlay)
 endif()
 
+if (EXISTS ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}.overlay)
+  set(DTC_OVERLAY_FILE
+      "${DTC_OVERLAY_FILE} ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}.overlay")
+endif()
+
 # Enable Zephyr runner options which request mass erase if so
 # configured.
 #
diff --git a/boot/zephyr/boards/intel_s1000_crb.conf b/boot/zephyr/boards/intel_s1000_crb.conf
new file mode 100644
index 0000000..dcd38a6
--- /dev/null
+++ b/boot/zephyr/boards/intel_s1000_crb.conf
@@ -0,0 +1,44 @@
+CONFIG_LOG=y
+CONFIG_USB_DRIVER_LOG_LEVEL_ERR=y
+CONFIG_USB_DEVICE_LOG_LEVEL_ERR=y
+
+CONFIG_CONSOLE_HANDLER=y
+CONFIG_SYS_LOG=y
+CONFIG_DEBUG=n
+CONFIG_SYSTEM_CLOCK_DISABLE=y
+CONFIG_SYS_POWER_MANAGEMENT=n
+
+CONFIG_MAIN_STACK_SIZE=10240
+CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h"
+
+CONFIG_BOOT_ENCRYPT_RSA=n
+
+### Default to RSA
+CONFIG_BOOT_SIGNATURE_TYPE_RSA=y
+CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=n
+
+### The bootloader generates its own signature verification based on a
+### key file which needs to be provided and needs to match the selected signing
+### algorithm (CONFIG_BOOT_SIGNATURE_TYPE_).
+### The PEM files below are provided as examples.
+CONFIG_BOOT_SIGNATURE_KEY_FILE="root-rsa-2048.pem"
+#CONFIG_BOOT_SIGNATURE_KEY_FILE="root-ec-p256.pem"
+
+### mbedTLS has its own heap
+# CONFIG_HEAP_MEM_POOL_SIZE is not set
+
+### We never want Zephyr's copy of tinycrypt.  If tinycrypt is needed,
+### MCUboot has its own copy in tree.
+# CONFIG_TINYCRYPT is not set
+# CONFIG_TINYCRYPT_ECC_DSA is not set
+# CONFIG_TINYCRYPT_SHA256 is not set
+
+CONFIG_I2C=n
+CONFIG_SPI=y
+CONFIG_FLASH=y
+CONFIG_BOOT_MAX_IMG_SECTORS=512
+CONFIG_MULTITHREADING=y
+
+### Various Zephyr boards enable features that we don't want.
+# CONFIG_BT is not set
+# CONFIG_BT_CTLR is not set
diff --git a/boot/zephyr/boards/intel_s1000_crb.overlay b/boot/zephyr/boards/intel_s1000_crb.overlay
new file mode 100644
index 0000000..61f0d43
--- /dev/null
+++ b/boot/zephyr/boards/intel_s1000_crb.overlay
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2018 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/ {
+	sram0: memory@be000000 {
+		device_type = "memory";
+		compatible = "mmio-sram";
+		reg = <0xbe000000 0x30000>;
+	};
+};
+
diff --git a/boot/zephyr/flash_map_extended.c b/boot/zephyr/flash_map_extended.c
index 39989a1..b7fa610 100644
--- a/boot/zephyr/flash_map_extended.c
+++ b/boot/zephyr/flash_map_extended.c
@@ -15,14 +15,15 @@
 
 #include "bootutil/bootutil_log.h"
 
-/*
- * For now, we only support one flash device.
- *
- * Pick the SoC Flash driver ID.
- */
+#if (!defined(CONFIG_XTENSA) && defined(DT_FLASH_DEV_NAME))
 #define FLASH_DEVICE_ID SOC_FLASH_0_ID
-#define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS
+#elif (defined(CONFIG_XTENSA) && defined(DT_SPI_NOR_DRV_NAME))
+#define FLASH_DEVICE_ID SPI_FLASH_0_ID
+#else
+#error "FLASH_DEVICE_ID could not be determined"
+#endif
 
+#define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS
 static struct device *flash_dev;
 
 struct device *flash_device_get_binding(char *dev_name)
diff --git a/boot/zephyr/main.c b/boot/zephyr/main.c
index 09286b6..345b449 100644
--- a/boot/zephyr/main.c
+++ b/boot/zephyr/main.c
@@ -76,6 +76,54 @@
     __set_MSP(vt->msp);
     ((void (*)(void))vt->reset)();
 }
+
+#elif defined(CONFIG_XTENSA)
+#define SRAM_BASE_ADDRESS	0xBE030000
+
+static void copy_img_to_SRAM(int slot, unsigned int hdr_offset)
+{
+    const struct flash_area *fap;
+    int area_id;
+    int rc;
+    unsigned char *dst = (unsigned char *)(SRAM_BASE_ADDRESS + hdr_offset);
+
+    BOOT_LOG_INF("Copying image to SRAM");
+
+    area_id = flash_area_id_from_image_slot(slot);
+    rc = flash_area_open(area_id, &fap);
+    if (rc != 0) {
+	BOOT_LOG_ERR("flash_area_open failed with %d\n", rc);
+        goto done;
+    }
+
+    rc = flash_area_read(fap, hdr_offset, dst, fap->fa_size - hdr_offset);
+    if (rc != 0) {
+	BOOT_LOG_ERR("flash_area_read failed with %d\n", rc);
+        goto done;
+    }
+
+done:
+    flash_area_close(fap);
+}
+
+/* Entry point (.ResetVector) is at the very beginning of the image.
+ * Simply copy the image to a suitable location and jump there.
+ */
+static void do_boot(struct boot_rsp *rsp)
+{
+    void *start;
+
+    BOOT_LOG_INF("br_image_off = 0x%x\n", rsp->br_image_off);
+    BOOT_LOG_INF("ih_hdr_size = 0x%x\n", rsp->br_hdr->ih_hdr_size);
+
+    /* Copy from the flash to HP SRAM */
+    copy_img_to_SRAM(0, rsp->br_hdr->ih_hdr_size);
+
+    /* Jump to entry point */
+    start = (void *)(SRAM_BASE_ADDRESS + rsp->br_hdr->ih_hdr_size);
+    ((void (*)(void))start)();
+}
+
 #else
 /* Default: Assume entry point is at the very beginning of the image. Simply
  * lock interrupts and jump there. This is the right thing to do for X86 and
@@ -108,12 +156,18 @@
 
     os_heap_init();
 
-#ifdef DT_FLASH_DEV_NAME
+#if (!defined(CONFIG_XTENSA) && defined(DT_FLASH_DEV_NAME))
     if (!flash_device_get_binding(DT_FLASH_DEV_NAME)) {
         BOOT_LOG_ERR("Flash device %s not found", DT_FLASH_DEV_NAME);
         while (1)
             ;
     }
+#elif (defined(CONFIG_XTENSA) && defined(DT_SPI_NOR_DRV_NAME))
+    if (!flash_device_get_binding(DT_SPI_NOR_DRV_NAME)) {
+        BOOT_LOG_ERR("Flash device %s not found", DT_SPI_NOR_DRV_NAME);
+        while (1)
+            ;
+    }
 #endif
 
 #ifdef CONFIG_MCUBOOT_SERIAL