espressif: esp32xx: adjust memory map on linker script
Reorganize memory mapping and document the address ranges that
the OS must avoid overlapping.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
diff --git a/boot/espressif/CMakeLists.txt b/boot/espressif/CMakeLists.txt
index 3c732db..bc7868f 100644
--- a/boot/espressif/CMakeLists.txt
+++ b/boot/espressif/CMakeLists.txt
@@ -308,10 +308,28 @@
${bootutil_paths}
)
+set(ld_input ${CMAKE_CURRENT_LIST_DIR}/port/${MCUBOOT_TARGET}/ld/bootloader.ld)
+set(ld_output ${CMAKE_CURRENT_BINARY_DIR}/ld/bootloader.ld)
+
+file(MAKE_DIRECTORY "${CMAKE_CURRENT_BINARY_DIR}/ld")
+
+get_directory_property(configs COMPILE_DEFINITIONS)
+foreach(c ${configs})
+ list(APPEND conf_defines "-D${c}")
+endforeach()
+
+# Preprocess linker script
+add_custom_command(
+ TARGET ${APP_EXECUTABLE} PRE_LINK
+ COMMAND ${CMAKE_C_COMPILER} -x c -E -P -o ${ld_output} ${conf_defines} ${ld_input}
+ MAIN_DEPENDENCY ${ld_input}
+ COMMENT "Preprocessing bootloader.ld linker script..."
+ )
+
target_link_libraries(
${APP_EXECUTABLE}
PUBLIC
- -T${CMAKE_CURRENT_LIST_DIR}/port/${MCUBOOT_TARGET}/ld/bootloader.ld
+ -T${ld_output}
${LDFLAGS}
)
diff --git a/boot/espressif/port/esp32/ld/bootloader.ld b/boot/espressif/port/esp32/ld/bootloader.ld
index 48b6ff5..5ceac18 100644
--- a/boot/espressif/port/esp32/ld/bootloader.ld
+++ b/boot/espressif/port/esp32/ld/bootloader.ld
@@ -12,9 +12,14 @@
MEMORY
{
- iram_seg (RWX) : org = 0x40093000, len = 0x7A00
- iram_loader_seg (RWX) : org = 0x4009AA00, len = 0x5600
- dram_seg (RW) : org = 0x3FFF5000, len = 0x9900
+#ifdef CONFIG_ESP_MULTI_PROCESSOR_BOOT
+ iram_loader_seg (RWX) : org = 0x400AB900, len = 0x6500
+#else
+ /* iram_loader_seg is currently placed on APP_CPU cache IRAM address range */
+ iram_loader_seg (RWX) : org = 0x40078000, len = 0x6500
+#endif
+ iram_seg (RWX) : org = 0x40090000, len = 0x9000
+ dram_seg (RW) : org = 0x3FFF4700, len = 0xB900
}
/* Default entry point: */
@@ -28,42 +33,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:app_cpu_start.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp32c2/ld/bootloader.ld b/boot/espressif/port/esp32c2/ld/bootloader.ld
index bb9479f..b24fabb 100644
--- a/boot/espressif/port/esp32c2/ld/bootloader.ld
+++ b/boot/espressif/port/esp32c2/ld/bootloader.ld
@@ -26,9 +26,9 @@
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x3fcdcb70;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
+bootloader_dram_seg_len = 0xA000;
bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x3000;
+bootloader_iram_seg_len = 0x8800;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
@@ -49,7 +49,7 @@
* 2. Update the value in this assert.
* 3. Update (SRAM_DRAM_END + I_D_SRAM_OFFSET) in components/esp_system/ld/esp32c2/memory.ld.in to the same value.
*/
-ASSERT(bootloader_iram_loader_seg_start == 0x403aeb70, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
+ASSERT(bootloader_iram_loader_seg_start == 0x403a9b70, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(main);
@@ -62,43 +62,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32c2.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp32c3/ld/bootloader.ld b/boot/espressif/port/esp32c3/ld/bootloader.ld
index 304e79f..65f15cc 100644
--- a/boot/espressif/port/esp32c3/ld/bootloader.ld
+++ b/boot/espressif/port/esp32c3/ld/bootloader.ld
@@ -12,9 +12,9 @@
MEMORY
{
- iram_seg (RWX) : org = 0x403C8000, len = 0x8000
+ iram_seg (RWX) : org = 0x403C7000, len = 0x9000
iram_loader_seg (RWX) : org = 0x403D0000, len = 0x5000
- dram_seg (RW) : org = 0x3FCD5000, len = 0x9000
+ dram_seg (RW) : org = 0x3FCD5000, len = 0xA000
}
/* Default entry point: */
@@ -28,43 +28,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32c3.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp32c6/ld/bootloader.ld b/boot/espressif/port/esp32c6/ld/bootloader.ld
index 2f2cb5f..06b6e91 100644
--- a/boot/espressif/port/esp32c6/ld/bootloader.ld
+++ b/boot/espressif/port/esp32c6/ld/bootloader.ld
@@ -23,9 +23,9 @@
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4087c610;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
+bootloader_dram_seg_len = 0xA000;
bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x3000;
+bootloader_iram_seg_len = 0x9000;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; /* 0x4087c610 - 0x2000 = 0x4087a610 */
@@ -46,7 +46,7 @@
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c6/memory.ld.in to the same value.
*/
-ASSERT(bootloader_iram_loader_seg_start == 0x4086E610, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
+ASSERT(bootloader_iram_loader_seg_start == 0x40869610, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(main);
@@ -59,43 +59,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32c6.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
@@ -110,7 +77,6 @@
*(.init)
} > iram_seg
-
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
diff --git a/boot/espressif/port/esp32h2/ld/bootloader.ld b/boot/espressif/port/esp32h2/ld/bootloader.ld
index fa6d26f..b4330bf 100644
--- a/boot/espressif/port/esp32h2/ld/bootloader.ld
+++ b/boot/espressif/port/esp32h2/ld/bootloader.ld
@@ -24,9 +24,9 @@
/* These lengths can be adjusted, if necessary: */
bootloader_usable_dram_end = 0x4084cfd0;
bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
+bootloader_dram_seg_len = 0xA000;
bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x3000;
+bootloader_iram_seg_len = 0x8800;
/* Start of the lower region is determined by region size and the end of the higher region */
bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
@@ -47,7 +47,7 @@
* 2. Update the value in this assert.
* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32h2/memory.ld.in to the same value.
*/
-ASSERT(bootloader_iram_loader_seg_start == 0x4083EFD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
+ASSERT(bootloader_iram_loader_seg_start == 0x40839FD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
/* Default entry point: */
ENTRY(main);
@@ -60,43 +60,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32h2.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp32s2/ld/bootloader.ld b/boot/espressif/port/esp32s2/ld/bootloader.ld
index 005c046..cf159c3 100644
--- a/boot/espressif/port/esp32s2/ld/bootloader.ld
+++ b/boot/espressif/port/esp32s2/ld/bootloader.ld
@@ -12,9 +12,9 @@
MEMORY
{
- iram_seg (RWX) : org = 0x40048000, len = 0x8000
- iram_loader_seg (RWX) : org = 0x40050000, len = 0x5000
- dram_seg (RW) : org = 0x3FFE5000, len = 0x8E00
+ iram_seg (RWX) : org = 0x40047000, len = 0x9000
+ iram_loader_seg (RWX) : org = 0x40050000, len = 0x6000
+ dram_seg (RW) : org = 0x3FFE6000, len = 0x9000
}
/* Default entry point: */
@@ -28,45 +28,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32s2.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_rom_regi2c_esp32s2.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp32s3/ld/bootloader.ld b/boot/espressif/port/esp32s3/ld/bootloader.ld
index 4fe9cd6..082081e 100644
--- a/boot/espressif/port/esp32s3/ld/bootloader.ld
+++ b/boot/espressif/port/esp32s3/ld/bootloader.ld
@@ -12,9 +12,9 @@
MEMORY
{
- iram_seg (RWX) : org = 0x403B2000, len = 0x8000
+ iram_seg (RWX) : org = 0x403B0000, len = 0xA000
iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000
- dram_seg (RW) : org = 0x3FCD8000, len = 0x9A00
+ dram_seg (RW) : org = 0x3FCD0000, len = 0x9A00
}
/* Default entry point: */
@@ -28,45 +28,10 @@
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash_config_esp32s3.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_init.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libhal.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libhal.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libhal.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libhal.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
- *libhal.a:esp_efuse_api_key.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libhal.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libhal.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libhal.a:app_cpu_start.*(.literal .text .literal.* .text.*)
+ *libhal.a:*.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
+ *main.*(.literal .text .literal.* .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
diff --git a/boot/espressif/port/esp_loader.c b/boot/espressif/port/esp_loader.c
index 04d92c6..9074665 100644
--- a/boot/espressif/port/esp_loader.c
+++ b/boot/espressif/port/esp_loader.c
@@ -74,10 +74,10 @@
FIH_PANIC;
}
- BOOT_LOG_INF("DRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", load_header.dram_flash_offset, load_header.dram_size, load_header.dram_dest_addr);
+ BOOT_LOG_INF("DRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", fap->fa_off + load_header.dram_flash_offset, load_header.dram_size, load_header.dram_dest_addr);
load_segment(fap, load_header.dram_flash_offset, load_header.dram_size, load_header.dram_dest_addr);
- BOOT_LOG_INF("IRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr);
+ BOOT_LOG_INF("IRAM segment: start=0x%x, size=0x%x, vaddr=0x%x", fap->fa_off + load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr);
load_segment(fap, load_header.iram_flash_offset, load_header.iram_size, load_header.iram_dest_addr);
BOOT_LOG_INF("start=0x%x", load_header.entry_addr);
diff --git a/boot/espressif/tools/utils.cmake b/boot/espressif/tools/utils.cmake
index 8e3b0c2..238b30e 100644
--- a/boot/espressif/tools/utils.cmake
+++ b/boot/espressif/tools/utils.cmake
@@ -23,7 +23,7 @@
OR ("${CONFIG_VALUE}" STREQUAL "Y"))
set(CONFIG_VALUE 1)
endif()
- add_definitions(-D${CONFIG_NAME}=${CONFIG_VALUE})
+ add_compile_definitions(${CONFIG_NAME}=${CONFIG_VALUE})
set(${CONFIG_NAME} ${CONFIG_VALUE} PARENT_SCOPE)
endif()
endif()
diff --git a/docs/readme-espressif.md b/docs/readme-espressif.md
index 30102e5..cc2fa8b 100644
--- a/docs/readme-espressif.md
+++ b/docs/readme-espressif.md
@@ -13,7 +13,7 @@
| Zephyr | Supported | Supported | Supported | Supported | In progress | In progress | In progress |
| NuttX | Supported | Supported | Supported | Supported | In progress | In progress | In progress |
-Notice that any customization in the memory layout from the OS application must be done aware of the bootloader own memory layout to avoid overlapping.
+Notice that any customization in the memory layout from the OS application must be done aware of the bootloader own memory layout to avoid overlapping. More information on the section [Memory map organization for OS compatibility](#memory-map-organization-for-os-compatibility).
## [Installing requirements and dependencies](#installing-requirements-and-dependencies)
@@ -674,3 +674,380 @@
*Serial recovery mode uploads the image to the PRIMARY_SLOT, therefore if the upload process gets interrupted the image may be corrupted and unable to boot*
---
+
+## [Memory map organization for OS compatibility](#memory-map-organization-for-os-compatibility)
+
+When adding support for this MCUboot port to an OS or even customizing an already supported application memory layout, it is mandatory for the OS linker script to avoid overlaping on `iram_loader_seg` and `dram_seg` bootloader RAM regions. Although part of the RAM becomes initially unavailable, it is reclaimable by the OS after boot as heap.
+
+Therefore, the application must be designed aware of the bootloader memory usage.
+
+---
+***Note***
+
+*Mostly of the Espressif chips have a separation on the address space for the same physical memory ammount: IRAM (accessed by the instruction bus) and DRAM (accessed by the data bus), which means that they need to be accessed by different addresses ranges depending on type, but refer to the same region. More information on the [Espressif TRMs](https://www.espressif.com/en/support/documents/technical-documents?keys=&field_download_document_type_tid%5B%5D=963).*
+
+---
+
+The following diagrams illustrate a memory organization from the bootloader point of view (notice that the addresses and sizes may vary depending on the chip), they reflect the linker script `boot/espressif/port/<TARGET>/ld/bootloader.ld`:
+
+### ESP32
+
+#### ESP32 standard
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40070000 / --------- - SRAM0 START
+ * | ^ |
+ * | | PRO CPU Cache | *NOT CLAIMABLE BY OS RAM
+ * | v |
+ * +--------+--------------+------+ 0x40078000 / ----------
+ * | ^ |
+ * | | | *NOT CLAIMABLE BY OS RAM
+ * | | iram_loader_seg | *Region usable as iram_loader_seg during boot
+ * | | (APP CPU Cache) | as APP CPU is not initialized yet
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40080000 / ----------
+ * | ^ |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | v |
+ * +------------------------------+ 0x40090000 / ----------
+ * | ^ |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40099000 / ----------
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +------------------------------+ 0x4009FFFF / ---------- - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +------------------------------+ 0x400A0000 / 0x3FFFFFFF - SRAM1 START
+ * | ^ |
+ * | | | *** SHOULD NOT BE OVERLAPPED ***
+ * | | dram_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x400AB900 / 0x3FFF4700
+ * | ^ |
+ * | | |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x400BFFFF / 0x3FFE0000 - SRAM1 END
+ Note: On ESP32 the SRAM1 addresses are accessed in reverse order comparing Instruction bus (IRAM) and Data bus (DRAM), but refer to the same location. See the TRM for more information.
+
+ SRAM2
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ ---------- / 0x3FFAE000 - SRAM2 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ ---------- / 0x3FFDFFFF - SRAM2 END
+```
+
+#### ESP32 Multi Processor Boot
+
+This is the linker script mapping when the `CONFIG_ESP_MULTI_PROCESSOR_BOOT` is enabled ([Multi boot](#multi-boot)) since APP CPU Cache region cannot be used for `iram_loader_seg` region as there would be conflict when the bootloader starts the APP CPU before jump to the main application.
+
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40070000 / --------- - SRAM0 START
+ * | ^ |
+ * | | |
+ * | | Cache | *Used by PRO CPU and APP CPU as Cache
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40080000 / ----------
+ * | ^ |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | v |
+ * +------------------------------+ 0x40090000 / ----------
+ * | ^ |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40099000 / ----------
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +------------------------------+ 0x4009FFFF / ---------- - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +------------------------------+ 0x400A0000 / 0x3FFFFFFF - SRAM1 START
+ * | ^ |
+ * | | | *** SHOULD NOT BE OVERLAPPED ***
+ * | | dram_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x400AB900 / 0x3FFF4700
+ * | ^ |
+ * | | | *** SHOULD NOT BE OVERLAPPED ***
+ * | | iram_loader_seg | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x400B1E00 / 0x3FFEE200
+ * | ^ |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x400BFFFF / 0x3FFE0000 - SRAM1 END
+ Note: On ESP32 the SRAM1 addresses are accessed in reverse order comparing Instruction bus (IRAM) and Data bus (DRAM), but refer to the same location. See the TRM for more information.
+
+ SRAM2
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ ---------- / 0x3FFAE000 - SRAM2 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ ---------- / 0x3FFDFFFF - SRAM2 END
+```
+
+### ESP32-S2
+
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40020000 / 0x3FFB0000 - SRAM0 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ 0x40027FFF / 0x3FFB7FFF - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40028000 / 0x3FFB8000 - SRAM1 START
+ * | ^ |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40047000 / 0x3FFD7000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40050000 / 0x3FFE0000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40056000 / 0x3FFE6000
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x4006FFFF / 0x3FFFFFFF - SRAM1 END
+```
+
+### ESP32-S3
+
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40370000 / ---------- - SRAM0 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ 0x40377FFF / ---------- - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40378000 / 0x3FC88000 - SRAM1 START
+ * | ^ |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x403B0000 / 0x3FCC0000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403BA000 / 0x3FCCA000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403C0000 / 0x3FCD0000
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x403DFFFF / 0x3FCEFFFF - SRAM1 END
+
+ SRAM2
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ ---------- / 0x3FCF0000 - SRAM2 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ ---------- / 0x3FCFFFFF - SRAM2 END
+```
+
+### ESP32-C2
+
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x4037C000 / ---------- - SRAM0 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ 0x4037FFFF / ---------- - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40380000 / 0x3FCA0000 - SRAM1 START
+ * | ^ |
+ * | | |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x403A1370 / 0x3FCC1370
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403A9B70 / 0x3FCC9B70
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403B0B70 / 0x3FCD0B70
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x403BFFFF / 0x3FCDFFFF - SRAM1 END
+```
+
+### ESP32-C3
+
+```
+ SRAM0
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x4037C000 / ---------- - SRAM0 START
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * +--------+--------------+------+ 0x4037FFFF / ---------- - SRAM0 END
+
+ SRAM1
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40380000 / 0x3FC80000 - SRAM1 START
+ * | ^ |
+ * | | |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x403C7000 / 0x3FCC7000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403D0000 / 0x3FCD0000
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x403D5000 / 0x3FCD5000
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x403DFFFF / 0x3FCDFFFF - SRAM1 END
+```
+
+### ESP32-C6
+
+```
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40800000 / 0x40800000 - HP SRAM START
+ * | ^ |
+ * | | |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x40860610 / 0x40860610
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40869610 / 0x40869610
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40870610 / 0x40870610
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x4087FFFF / 0x4087FFFF - HP SRAM END
+```
+
+### ESP32-H2
+
+```
+ IRAM ADDR / DRAM ADDR
+ * +--------+--------------+------+ 0x40800000 / 0x40800000 - HP SRAM START
+ * | ^ |
+ * | | |
+ * | | |
+ * | | FREE | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +--------+--------------+------+ 0x408317D0 / 0x408317D0
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_seg | *CLAIMABLE BY OS RAM
+ * | | |
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40839FD0 / 0x40839FD0
+ * | ^ |
+ * | | |
+ * | | |
+ * | | iram_loader_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | | |
+ * | v |
+ * +------------------------------+ 0x40840FD0 / 0x40840FD0
+ * | ^ |
+ * | | |
+ * | | dram_seg | *** SHOULD NOT BE OVERLAPPED ***
+ * | | | *** OS CAN RECLAIM IT AFTER BOOT LATER AS HEAP ***
+ * | v |
+ * +--------+--------------+------+ 0x4084FFFF / 0x4084FFFF - HP SRAM END
+```