cypress: Rework makefiles, reorganise source, add 062_1M and 062_512k support
Signed-off-by: Roman Okhrimenko <roman.okhrimenko@cypress.com>
Signed-off-by: Roman Okhrimenko <roman.okhrimenko@infineon.com>
diff --git a/boot/cypress/BlinkyApp/BlinkyApp.mk b/boot/cypress/BlinkyApp/BlinkyApp.mk
index c60f27e..5ff2080 100644
--- a/boot/cypress/BlinkyApp/BlinkyApp.mk
+++ b/boot/cypress/BlinkyApp/BlinkyApp.mk
@@ -23,6 +23,8 @@
# limitations under the License.
################################################################################
+include host.mk
+
# Cypress' MCUBoot Application supports GCC ARM only at this moment
# Set defaults to:
# - compiler GCC
@@ -31,6 +33,9 @@
COMPILER ?= GCC_ARM
IMG_TYPE ?= BOOT
+# For which core this application is built
+CORE ?= CM4
+
# image type can be BOOT or UPGRADE
IMG_TYPES = BOOT UPGRADE
@@ -42,11 +47,11 @@
$(error Only GCC ARM is supported at this moment)
endif
-CUR_APP_PATH = $(CURDIR)/$(APP_NAME)
+CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
-include $(CUR_APP_PATH)/platforms.mk
-include $(CUR_APP_PATH)/libs.mk
-include $(CUR_APP_PATH)/toolchains.mk
+include $(PRJ_DIR)/platforms.mk
+include $(PRJ_DIR)/common_libs.mk
+include $(PRJ_DIR)/toolchains.mk
# Application-specific DEFINES
ifeq ($(IMG_TYPE), BOOT)
@@ -59,10 +64,20 @@
ifeq ($(PLATFORM), PSOC_062_2M)
DEFINES_APP += -DRAM_START=0x08040000
DEFINES_APP += -DRAM_SIZE=0x10000
- DEFINES_APP += -DUSER_APP_START=0x10018000
- SLOT_SIZE ?= 0x10000
+else ifeq ($(PLATFORM), PSOC_062_1M)
+ DEFINES_APP += -DRAM_START=0x08020000
+ DEFINES_APP += -DRAM_SIZE=0x10000
+else ifeq ($(PLATFORM), PSOC_062_512K)
+ DEFINES_APP += -DRAM_START=0x08020000
+ DEFINES_APP += -DRAM_SIZE=0x10000
endif
+
+DEFINES_APP += -DRAM_SIZE=0x10000
+DEFINES_APP += -DUSER_APP_START=0x10018000
+SLOT_SIZE ?= 0x10000
+
+
# Collect Test Application sources
SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c)
# Collect all the sources
@@ -80,6 +95,7 @@
endif
ASM_FILES_APP :=
+ASM_FILES_APP += $(ASM_FILES_STARTUP)
# We still need this for MCUBoot apps signing
IMGTOOL_PATH ?= ../../scripts/imgtool.py
diff --git a/boot/cypress/BlinkyApp/libs.mk b/boot/cypress/BlinkyApp/libs.mk
index 9f1846c..7994d13 100644
--- a/boot/cypress/BlinkyApp/libs.mk
+++ b/boot/cypress/BlinkyApp/libs.mk
@@ -28,10 +28,7 @@
################################################################################
PDL_VERSION = 121
#
-CUR_LIBS_PATH = $(CURDIR)/libs
-
-# Collect source files for PDL
-SOURCES_PDL := $(wildcard $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/*.c)
+CUR_LIBS_PATH = $(PRJ_DIR)/libs
# Collect source files for Retarget-io
SOURCES_RETARGET_IO := $(wildcard $(CUR_LIBS_PATH)/retarget-io/*.c)
@@ -42,19 +39,10 @@
SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/triggers/*.c)
SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/pin_packages/*.c)
-# PDL related include directories
-INCLUDE_DIRS_PDL := $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/include
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include/ip
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/cmsis/include
-
# Retarget-io related include directories
INCLUDE_DIRS_RETARGET_IO := $(CUR_LIBS_PATH)/retarget-io
INCLUDE_DIRS_WATCHDOG := $(CUR_LIBS_PATH)/watchdog
-# core-libs related include directories
-INCLUDE_DIRS_CORE_LIB := $(CUR_LIBS_PATH)/core-lib/include
-
# Collect dirrectories containing headers for PSOC6 HAL
INCLUDE_DIRS_HAL := $(CUR_LIBS_PATH)/psoc6hal/include
INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
@@ -62,32 +50,11 @@
INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/triggers
# Collected source files for libraries
-SOURCES_LIBS := $(SOURCES_PDL)
-SOURCES_LIBS += $(SOURCES_PLATFORM)
SOURCES_LIBS += $(SOURCES_RETARGET_IO)
SOURCES_LIBS += $(SOURCES_WATCHDOG)
SOURCES_LIBS += $(SOURCES_HAL)
# Collected include directories for libraries
-INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_RETARGET_IO))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
-
-ASM_FILES_PDL :=
-ifeq ($(COMPILER), GCC_ARM)
-ASM_FILES_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-ASM_FILES_LIBS := $(ASM_FILES_PDL)
-ASM_FILES_LIBS += $(ASM_FILES_PLATFORM)
-
-# Add define for PDL version
-DEFINES_PDL += -DPDL_VERSION=$(PDL_VERSION)
-
-DEFINES_LIBS := $(DEFINES_PLATFORM)
-DEFINES_LIBS += $(DEFINES_PDL)
diff --git a/boot/cypress/BlinkyApp/main.c b/boot/cypress/BlinkyApp/main.c
index e08fdd0..97e1c84 100644
--- a/boot/cypress/BlinkyApp/main.c
+++ b/boot/cypress/BlinkyApp/main.c
@@ -38,6 +38,12 @@
#warning "Check if User LED is correct for your target board."
#define LED_PORT GPIO_PRT13
#define LED_PIN 7U
+#elif defined(PSOC_062_1M)
+#define LED_PORT GPIO_PRT13
+#define LED_PIN 7U
+#elif defined(PSOC_062_512K)
+#define LED_PORT GPIO_PRT11
+#define LED_PIN 1U
#endif
#define LED_NUM 5U
diff --git a/boot/cypress/BlinkyApp/platforms.mk b/boot/cypress/BlinkyApp/platforms.mk
deleted file mode 100644
index 2f4faf9..0000000
--- a/boot/cypress/BlinkyApp/platforms.mk
+++ /dev/null
@@ -1,109 +0,0 @@
-################################################################################
-# \file targets.mk
-# \version 1.0
-#
-# \brief
-# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications.
-#
-################################################################################
-# \copyright
-# Copyright 2018-2019 Cypress Semiconductor Corporation
-# SPDX-License-Identifier: Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-################################################################################
-
-# Target PLATFORM BlinkyApp is built for. PSOC_064_2M is set as default
-# Supported:
-# - PSOC_064_2M
-# - PSOC_064_1M
-# - PSOC_064_512K
-# - PSOC_062_2M
-
-# default TARGET
-PLATFORM ?= PSOC_064_2M
-#
-SB_PLATFORMS := PSOC_064_2M PSOC_064_1M PSOC_064_512K
-PLATFORMS := PSOC_062_2M $(SB_PLATFORMS)
-
-# For which core this application is built
-CORE := CM4
-
-# Set paths for related folders
-CUR_LIBS_PATH := $(CURDIR)/libs
-PLATFORMS_PATH := $(CURDIR)/platforms
-PLATFORM_PATH := $(PLATFORMS_PATH)/$(PLATFORM)
-
-# Target dependent definitions
-ifeq ($(PLATFORM), PSOC_064_2M)
-DEVICE ?= CYB0644ABZI-S2D44
-PLATFORM_SUFFIX := 02
-else ifeq ($(PLATFORM), PSOC_064_1M)
-DEVICE ?= CYB06447BZI-BLD53
-PLATFORM_SUFFIX := 01
-else ifeq ($(PLATFORM), PSOC_064_512K)
-DEVICE ?= CYB06445LQI-S3D42
-PLATFORM_SUFFIX := 03
-else ifeq ($(PLATFORM), PSOC_062_2M)
-DEVICE ?= CY8C624ABZI-D44
-PLATFORM_SUFFIX := 02
-endif
-
-# Check if path to cysecuretools is set in case Secure Boot target
-ifneq ($(filter $(PLATFORM), $(SB_PLATFORMS)),)
-ifeq ($(CY_SEC_TOOLS_PATH), )
-$(error Variable CY_SEC_TOOLS_PATH - path to cysecuretools package not set. \
- Use `python -m pip show cysecuretools` to determine intallation folder.` \
- Then set it in Makefile to continue work.)
-endif
-endif
-
-# Collect C source files for PLATFORM
-SOURCES_PLATFORM += $(wildcard $(PLATFORMS_PATH)/*.c)
-SOURCES_PLATFORM += $(wildcard $(PLATFORM_PATH)/$(CORE)/*.c)
-# Exclude system file for cm4
-SOURCES_PLATFORM := $(filter-out %/system_psoc6_cm0plus.c, $(SOURCES_PLATFORM))
-
-# Collect dirrectories containing headers for PLATFORM
-INCLUDE_DIRS_PLATFORM := $(PLATFORMS_PATH)
-INCLUDE_DIRS_PLATFORM += $(PLATFORM_PATH)/$(CORE)
-
-# Collect Assembler files for PLATFORM
-STARTUP_FILE := $(PLATFORM_PATH)/$(CORE)/$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_cm4
-
-ifeq ($(COMPILER), GCC_ARM)
- ASM_FILES_PLATFORM := $(STARTUP_FILE).S
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-# Add device name from PLATFORM makefile to defines
-DEFINES += $(DEVICE)
-
-# Get defines from PLATFORM makefile and convert it to regular -DMY_NAME style
-ifneq ($(DEFINES),)
- DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES)))
-endif
-
-DEFINES_PLATFORM += $(addprefix -D, $(PLATFORM))
-
-ifneq ($(COMPILER), GCC_ARM)
-$(error Only GCC ARM is supported at this moment)
-endif
-ifeq ($(MAKEINFO) , 1)
-$(info ==============================================================================)
-$(info = PLATFORM files =)
-$(info ==============================================================================)
-$(info $(SOURCES_PLATFORM))
-$(info $(ASM_FILES_PLATFORM))
-endif
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.ld b/boot/cypress/MCUBootApp/MCUBootApp.ld
index c620479..c78c598 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp.ld
@@ -63,7 +63,8 @@
* Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
* where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'.
*/
- ram (rwx) : ORIGIN = 0x08020000, LENGTH = 0x20000
+ public_ram (rw) : ORIGIN = 0x08000000, LENGTH = 0x800
+ ram (rwx) : ORIGIN = 0x08000800, LENGTH = 0x1F800
flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x18000
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
@@ -233,6 +234,15 @@
__ram_vectors_end__ = .;
} > ram
+ /* Unprotected public RAM */
+ .cy_sharedmem (NOLOAD):
+ {
+ . = ALIGN(4);
+ __public_ram_start__ = .;
+ KEEP(*(.cy_sharedmem))
+ . = ALIGN(4);
+ __public_ram_end__ = .;
+ } > public_ram
.data __ram_vectors_end__ : AT (__etext)
{
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.mk b/boot/cypress/MCUBootApp/MCUBootApp.mk
index 7a15ce5..44da2fb 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.mk
+++ b/boot/cypress/MCUBootApp/MCUBootApp.mk
@@ -23,6 +23,8 @@
# limitations under the License.
################################################################################
+include host.mk
+
# Cypress' MCUBoot Application supports GCC ARM only at this moment
# Set default compiler to GCC if not specified from command line
COMPILER ?= GCC_ARM
@@ -32,15 +34,18 @@
MCUBOOT_IMAGE_NUMBER ?= 1
ENC_IMG ?= 0
+# For which core this application is built
+CORE ?= CM0P
+
ifneq ($(COMPILER), GCC_ARM)
$(error Only GCC ARM is supported at this moment)
endif
-CUR_APP_PATH = $(CURDIR)/$(APP_NAME)
+CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
-include $(CUR_APP_PATH)/platforms.mk
-include $(CUR_APP_PATH)/libs.mk
-include $(CUR_APP_PATH)/toolchains.mk
+include $(PRJ_DIR)/platforms.mk
+include $(PRJ_DIR)/common_libs.mk
+include $(PRJ_DIR)/toolchains.mk
# default slot size is 0x10000, 512bytes per row/sector, so 128 sectors
MAX_IMG_SECTORS ?= 128
@@ -91,6 +96,7 @@
INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH)/os)
ASM_FILES_APP :=
+ASM_FILES_APP += $(ASM_FILES_STARTUP)
# Output folder
OUT := $(APP_NAME)/out
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
index 196bbd6..a58d584 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
@@ -129,7 +129,8 @@
* defining BOOT_LOG_LEVEL before #including `bootutil_log.h`
*/
#define MCUBOOT_HAVE_LOGGING 1
-
+/* Define this to support native mcuboot logging system */
+#define CONFIG_MCUBOOT 1
/*
* Assertions
*/
diff --git a/boot/cypress/MCUBootApp/libs.mk b/boot/cypress/MCUBootApp/libs.mk
index 3dc7027..3fe8220 100644
--- a/boot/cypress/MCUBootApp/libs.mk
+++ b/boot/cypress/MCUBootApp/libs.mk
@@ -28,79 +28,69 @@
################################################################################
PDL_VERSION = 121
-CUR_LIBS_PATH = $(CURDIR)/libs
-MBEDTLS_PATH = $(CURDIR)/../../ext
+THIS_APP_PATH = $(PRJ_DIR)/libs
+MBEDTLS_PATH = $(PRJ_DIR)/../../ext
-# Collect source files for PDL
-SOURCES_PDL := $(wildcard $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/*.c)
-SOURCES_WATCHDOG := $(wildcard $(CUR_LIBS_PATH)/watchdog/*.c)
+# Add platform folder to build
+SOURCES_PLATFORM += $(wildcard $(PRJ_DIR)/platforms/*.c)
+SOURCES_WATCHDOG := $(wildcard $(THIS_APP_PATH)/watchdog/*.c)
-# PDL related include directories
-INCLUDE_DIRS_PDL := $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/include
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include/ip
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include
-INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/cmsis/include
+# Add retartget IO implementation using pdl
+SOURCES_RETARGET_IO_PDL += $(wildcard $(THIS_APP_PATH)/retarget_io_pdl/*.c)
-# core-libs related include directories
-INCLUDE_DIRS_CORE_LIB := $(CUR_LIBS_PATH)/core-lib/include
-INCLUDE_DIRS_WATCHDOG := $(CUR_LIBS_PATH)/watchdog
+# Collect dirrectories containing headers for PLATFORM
+INCLUDE_RETARGET_IO_PDL += $(THIS_APP_PATH)/retarget_io_pdl
+
+# PSOC6HAL source files
+SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_crypto_common.c
+SOURCES_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_hwmgr.c
+
+# MbedTLS source files
+SOURCES_MBEDTLS := $(wildcard $(MBEDTLS_PATH)/mbedtls/library/*.c)
+SOURCES_MBEDTLS += $(wildcard $(MBEDTLS_PATH)/mbedtls/crypto/library/*.c)
# Collected source files for libraries
-SOURCES_LIBS := $(SOURCES_PDL)
+SOURCES_LIBS += $(SOURCES_HAL)
+SOURCES_LIBS += $(SOURCES_MBEDTLS)
SOURCES_LIBS += $(SOURCES_WATCHDOG)
SOURCES_LIBS += $(SOURCES_PLATFORM)
+SOURCES_LIBS += $(SOURCES_RETARGET_IO_PDL)
-# Collected include directories for libraries
-INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
+# Include platforms folder
+INCLUDE_DIRS_PLATFORM := $(PRJ_DIR)/platforms
-################################################################################
-# mbedTLS settings
-################################################################################
+# needed for Crypto HW Acceleration and headers inclusion, do not use for peripherals
+# peripherals should be accessed
+INCLUDE_DIRS_HAL := $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
+INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/include
+INCLUDE_DIRS_HAL += $(THIS_APP_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
+
# MbedTLS related include directories
INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include
INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/include/mbedtls
INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/crypto/include
INCLUDE_DIRS_MBEDTLS += $(MBEDTLS_PATH)/mbedtls/crypto/include/mbedtls
-#
+
+# Watchdog related includes
+INCLUDE_DIRS_WATCHDOG := $(THIS_APP_PATH)/watchdog
+
+# Collected include directories for libraries
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS))
-# Collect source files for MbedTLS
-SOURCES_MBEDTLS := $(wildcard $(MBEDTLS_PATH)/mbedtls/library/*.c)
-SOURCES_MBEDTLS += $(wildcard $(MBEDTLS_PATH)/mbedtls/crypto/library/*.c)
-# Collected source files for libraries
-SOURCES_LIBS += $(SOURCES_MBEDTLS)
-## mbedTLS settings
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_RETARGET_IO_PDL))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
################################################################################
-# mbedTLS acceleration settings
+# mbedTLS hardware acceleration settings
################################################################################
ifeq ($(USE_CRYPTO_HW), 1)
# cy-mbedtls-acceleration related include directories
-INCLUDE_DIRS_MBEDTLS_MXCRYPTO := $(CUR_LIBS_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO
+INCLUDE_DIRS_MBEDTLS_MXCRYPTO := $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO
# Collect source files for MbedTLS acceleration
-SOURCES_MBEDTLS_MXCRYPTO := $(wildcard $(CUR_LIBS_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO/*.c)
+SOURCES_MBEDTLS_MXCRYPTO := $(wildcard $(THIS_APP_PATH)/cy-mbedtls-acceleration/mbedtls_MXCRYPTO/*.c)
#
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS_MXCRYPTO))
# Collected source files for libraries
SOURCES_LIBS += $(SOURCES_MBEDTLS_MXCRYPTO)
endif
-## mbedTLS acceleration settings
-
-ASM_FILES_PDL :=
-ifeq ($(COMPILER), GCC_ARM)
-ASM_FILES_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-ASM_FILES_LIBS := $(ASM_FILES_PDL)
-ASM_FILES_LIBS += $(ASM_FILES_PLATFORM)
-
-# Add define for PDL version
-DEFINES_PDL += -DPDL_VERSION=$(PDL_VERSION)
-
-DEFINES_LIBS := $(DEFINES_PLATFORM)
-DEFINES_LIBS += $(DEFINES_PDL)
diff --git a/boot/cypress/MCUBootApp/main.c b/boot/cypress/MCUBootApp/main.c
index 6c28ba0..6f987a6 100644
--- a/boot/cypress/MCUBootApp/main.c
+++ b/boot/cypress/MCUBootApp/main.c
@@ -84,10 +84,25 @@
bool boot_succeeded = false;
fih_int fih_rc = FIH_FAILURE;
- init_cycfg_clocks();
+ SystemInit();
+ //init_cycfg_clocks();
init_cycfg_peripherals();
init_cycfg_pins();
+ /* Certain PSoC 6 devices enable CM4 by default at startup. It must be
+ * either disabled or enabled & running a valid application for flash write
+ * to work from CM0+. Since flash write may happen in boot_go() for updating
+ * the image before this bootloader app can enable CM4 in do_boot(), we need
+ * to keep CM4 disabled. Note that debugging of CM4 is not supported when it
+ * is disabled.
+ */
+ #if defined(CY_DEVICE_PSOC6ABLE2)
+ if (CY_SYS_CM4_STATUS_ENABLED == Cy_SysGetCM4Status())
+ {
+ Cy_SysDisableCM4();
+ }
+ #endif /* #if defined(CY_DEVICE_PSOC6ABLE2) */
+
/* enable interrupts */
__enable_irq();
diff --git a/boot/cypress/MCUBootApp/platforms.mk b/boot/cypress/MCUBootApp/platforms.mk
deleted file mode 100644
index d454a90..0000000
--- a/boot/cypress/MCUBootApp/platforms.mk
+++ /dev/null
@@ -1,84 +0,0 @@
-################################################################################
-# \file targets.mk
-# \version 1.0
-#
-# \brief
-# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications.
-#
-################################################################################
-# \copyright
-# Copyright 2018-2019 Cypress Semiconductor Corporation
-# SPDX-License-Identifier: Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-################################################################################
-
-# Target platform MCUBootApp is built for. PSOC_062_2M is set by default# Supported:
-# - PSOC_062_2M
-
-# default PLATFORM
-PLATFORM ?= PSOC_062_2M
-#
-PLATFORMS := PSOC_062_2M
-
-# For which core this application is built
-CORE := CM0P
-
-# Set paths for related folders
-PLATFORM_PATH := $(CURDIR)/platforms
-
-# MCU device selection, based on target device.
-# Default chips are used for supported platforms
-# This can be redefined in case of other chip usage
-ifeq ($(PLATFORM), PSOC_062_2M)
-DEVICE ?= CY8C624ABZI-D44
-PLATFORM_SUFFIX := 02
-endif
-
-# Collect C source files for PLATFORM
-SOURCES_PLATFORM += $(wildcard $(PLATFORM_PATH)/*.c)
-SOURCES_PLATFORM := $(filter-out %/system_psoc6_cm4.c, $(SOURCES_PLATFORM))
-SOURCES_PLATFORM += $(wildcard $(PLATFORM_PATH)/retarget_io_pdl/*.c)
-
-# Collect dirrectories containing headers for PLATFORM
-INCLUDE_DIRS_PLATFORM := $(PLATFORM_PATH)
-INCLUDE_DIRS_PLATFORM += $(PLATFORM_PATH)/retarget_io_pdl
-# Collect Assembler files for PLATFORM
-# Include _01_, _02_ or _03_ PLATFORM_SUFFIX depending on device family.
-STARTUP_FILE := $(PLATFORM_PATH)/$(PLATFORM)/$(CORE)/$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_cm0plus
-
-ifeq ($(COMPILER), GCC_ARM)
- ASM_FILES_PLATFORM := $(STARTUP_FILE).S
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-# Add device name to defines
-DEFINES += $(DEVICE)
-DEFINES += $(PLATFORM)
-
-# Convert defines it to regular -DMY_NAME style
-ifneq ($(DEFINES),)
- DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES)))
-endif
-
-ifeq ($(COMPILER), GCC_ARM)
-LINKER_SCRIPT ?= $(PLATFORM_PATH)/$(PLATFORM)/$(CORE)/$(COMPILER)/*_cm0plus.ld
-else
-$(error Only GCC ARM is supported at this moment)
-endif
-
-ifeq ($(MAKEINFO) , 1)
-$(info $(SOURCES_PLATFORM))
-$(info $(ASM_FILES_PLATFORM))
-endif
diff --git a/boot/cypress/MCUBootApp/toolchains.mk b/boot/cypress/MCUBootApp/toolchains.mk
deleted file mode 100644
index 562ce73..0000000
--- a/boot/cypress/MCUBootApp/toolchains.mk
+++ /dev/null
@@ -1,141 +0,0 @@
-################################################################################
-# \file toolchains.mk
-# \version 1.0
-#
-# \brief
-# Makefile to describe supported toolchains for Cypress MCUBoot based applications.
-#
-################################################################################
-# \copyright
-# Copyright 2018-2019 Cypress Semiconductor Corporation
-# SPDX-License-Identifier: Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-################################################################################
-
-# Compilers
-GCC_ARM := 1
-IAR := 2
-ARM := 3
-OTHER := 4
-
-ifeq ($(MAKEINFO), 1)
-$(info $(COMPILER))
-endif
-# Detect host OS to make resolving compiler pathes easier
-UNAME_S := $(shell uname -s)
-ifeq ($(UNAME_S), Darwin)
- HOST_OS = osx
-else
- ifeq ($(UNAME_S), Linux)
- HOST_OS = linux
- else
- HOST_OS = win
- endif
-endif
-
-# Path to the compiler installation
-# NOTE: Absolute pathes for now for the sake of development
-ifeq ($(HOST_OS), win)
- ifeq ($(COMPILER), GCC_ARM)
- TOOLCHAIN_PATH ?= c:/Users/$(USERNAME)/ModusToolbox/tools_2.1/gcc-7.2.1
- MY_TOOLCHAIN_PATH:=$(subst \,/,$(TOOLCHAIN_PATH))
- TOOLCHAIN_PATH := $(MY_TOOLCHAIN_PATH)
- GCC_PATH := $(TOOLCHAIN_PATH)
- # executables
- CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
- LD := $(CC)
-
- else ifeq ($(COMPILER), IAR)
- IAR_PATH := C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0/arm
- # executables
- CC := "$(IAR_PATH)/bin/iccarm.exe"
- AS := "$(IAR_PATH)/bin/iasmarm.exe"
- LD := "$(IAR_PATH)/bin/ilinkarm.exe"
- endif
-
-else ifeq ($(HOST_OS), osx)
- TOOLCHAIN_PATH ?= /opt/gcc-arm-none-eabi
- GCC_PATH := $(TOOLCHAIN_PATH)
-
- CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
- LD := $(CC)
-
-else ifeq ($(HOST_OS), linux)
- TOOLCHAIN_PATH ?= /usr/bin/gcc-arm-none-eabi/bin/arm-none-eabi-gcc
- GCC_PATH := $(TOOLCHAIN_PATH)
- # executables
- CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
- LD := $(CC)
-endif
-
-PDL_ELFTOOL := "hal/tools/$(HOST_OS)/elf/cymcuelftool"
-
-# Set executable names for compilers
-ifeq ($(COMPILER), GCC_ARM)
- CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
- LD := $(CC)
-else
- CC := "$(IAR_PATH)/bin/iccarm.exe"
- AS := "$(IAR_PATH)/bin/iasmarm.exe"
- LD := "$(IAR_PATH)/bin/ilinkarm.exe"
-endif
-
-OBJDUMP := "$(GCC_PATH)/bin/arm-none-eabi-objdump"
-OBJCOPY := "$(GCC_PATH)/bin/arm-none-eabi-objcopy"
-
-# Set flags for toolchain executables
-
-ifeq ($(COMPILER), GCC_ARM)
- # set build-in compiler flags
- CFLAGS_COMMON := -mcpu=cortex-m0plus -mthumb -mfloat-abi=soft -fno-stack-protector -ffunction-sections -fdata-sections -ffat-lto-objects -fstrict-aliasing -g -Wall -Wextra
- ifeq ($(BUILDCFG), Debug)
- CFLAGS_COMMON += -Og -g3
- else ifeq ($(BUILDCFG), Release)
- CFLAGS_COMMON += -Os -g
- else
-$(error BUILDCFG : '$(BUILDCFG)' is not supported)
- endif
- # add defines and includes
- CFLAGS := $(CFLAGS_COMMON) $(INCLUDES)
- CC_DEPEND = -MD -MP -MF
-
- LDFLAGS_COMMON := -mcpu=cortex-m0plus -mthumb -specs=nano.specs -ffunction-sections -fdata-sections -Wl,--gc-sections -L "$(GCC_PATH)/lib/gcc/arm-none-eabi/7.2.1/thumb/v6-m" -ffat-lto-objects -g --enable-objc-gc
- ifeq ($(BUILDCFG), Debug)
- LDFLAGS_COMMON += -Og
- else ifeq ($(BUILDCFG), Release)
- LDFLAGS_COMMON += -Os
- else
-$(error BUILDCFG : '$(BUILDCFG)' is not supported)
- endif
- LDFLAGS_NANO := -L "$(GCC_PATH)/arm-none-eabi/lib/thumb/v6-m"
- # TODO: check .map name
- LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_NANO)
-
-else ifeq ($(COMPILER), IAR)
-
- CFLAGS := --debug --endian=little --cpu=Cortex-M0+ -e --fpu=None --dlib_config "$(IAR_PATH)\INC\c\DLib_Config_Normal.h"
- CFLAGS += -Ohz --silent
-# CFLAGS += $(DEFINES) $(INCLUDES)
- CFLAGS += $(INCLUDES)
- CC_DEPEND = --dependencies
-
- AS_FLAGS := -s+ "-M<>" -w+ -r --cpu Cortex-M0+ --fpu None -S
-
- LINKER_SCRIPT := $(CHIP_SERIES).icf
-
- #options to extend stack analize: --log call_graph --log_file $(OUT)/stack_usage_$(SUFFIX).txt
- LDFLAGS_STACK_USAGE := --stack_usage_control $(STACK_CONTROL_FILE) --diag_suppress=Ls015 --diag_suppress=Ls016
- LDFLAGS_COMMON := --vfe --text_out locale --silent --inline --merge_duplicate_sections
- LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_STACK_USAGE) --config $(LINKER_SCRIPT) --map $(OUT_APP)/$(APP_NAME).map --entry Cy_FB_ResetHandler --no_exceptions
-endif
diff --git a/boot/cypress/Makefile b/boot/cypress/Makefile
index c2edca6..78ac445 100644
--- a/boot/cypress/Makefile
+++ b/boot/cypress/Makefile
@@ -7,7 +7,7 @@
#
################################################################################
# \copyright
-# Copyright 2019 Cypress Semiconductor Corporation
+# Copyright 2018-2021 Cypress Semiconductor Corporation
# SPDX-License-Identifier: Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -60,6 +60,7 @@
ifneq ($(filter $(APP_NAME), $(APPS)),)
include ./$(APP_NAME)/$(APP_NAME).mk
+include ./$(APP_NAME)/libs.mk
else
$(error Not supported application: '$(APP_NAME)')
endif
diff --git a/boot/cypress/common_libs.mk b/boot/cypress/common_libs.mk
new file mode 100644
index 0000000..f5d11f8
--- /dev/null
+++ b/boot/cypress/common_libs.mk
@@ -0,0 +1,89 @@
+################################################################################
+# \file common_libs.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe libraries needed for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2021 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+include host.mk
+
+################################################################################
+# PDL library
+################################################################################
+PSOC6_LIBS_PATH = $(PRJ_DIR)/libs
+
+ifeq ($(CORE),CM0P)
+CORE_SIFFX=m0plus
+else
+CORE_SIFFX=m4
+endif
+
+# Collect source files for PDL
+SOURCES_PDL := $(wildcard $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/source/*.c)
+SOURCES_PDL += $(wildcard $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/*.c)
+
+# PDL startup related files
+SOURCES_PDL_STARTUP := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_$(CORE)/system_psoc6_c$(CORE_SIFFX).c
+
+# PDL related include directories
+INCLUDE_DIRS_PDL := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/include
+INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip
+INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include
+INCLUDE_DIRS_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/cmsis/include
+
+# PDL startup related files
+INCLUDE_DIRS_PDL_STARTUP := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB
+
+# core-libs related include directories
+INCLUDE_DIRS_CORE_LIB := $(PSOC6_LIBS_PATH)/core-lib/include
+
+STARTUP_FILE := $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_$(CORE)/TOOLCHAIN_$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_c$(CORE_SIFFX)
+
+ifeq ($(COMPILER), GCC_ARM)
+ ASM_FILES_STARTUP := $(STARTUP_FILE).S
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+
+# Collected source files for libraries
+SOURCES_LIBS := $(SOURCES_PDL)
+SOURCES_LIBS += $(SOURCES_PDL_STARTUP)
+
+# Collected include directories for libraries
+INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PDL_STARTUP))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB))
+
+ASM_FILES_PDL :=
+ifeq ($(COMPILER), GCC_ARM)
+ASM_FILES_PDL += $(PSOC6_LIBS_PATH)/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+ASM_FILES_LIBS := $(ASM_FILES_PDL)
+
+# Add define for PDL version
+DEFINES_PDL += -DPDL_VERSION=$(PDL_VERSION)
+
+DEFINES_LIBS := $(DEFINES_PLATFORM)
+DEFINES_LIBS += $(DEFINES_PDL)
diff --git a/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c b/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c
index 1f9c51a..e1f6c27 100644
--- a/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c
+++ b/boot/cypress/cy_flash_pal/flash_qspi/flash_qspi.c
@@ -99,9 +99,10 @@
#if (defined(PSOC_064_2M) || \
defined(PSOC_064_1M) || \
- defined(PSOC_062_2M))
+ defined(PSOC_062_2M) || \
+ defined(PSOC_062_1M))
#define CY_BOOTLOADER_SMIF_SS_CFG_NUM 4
-#elif defined(PSOC_064_512K)
+#elif defined(PSOC_064_512K) || defined(PSOC_062_512K)
#define CY_BOOTLOADER_SMIF_SS_CFG_NUM 3
#else
#error "Platform device name is unsupported."
diff --git a/boot/cypress/host.mk b/boot/cypress/host.mk
new file mode 100644
index 0000000..6b6851e
--- /dev/null
+++ b/boot/cypress/host.mk
@@ -0,0 +1,48 @@
+################################################################################
+# \file host.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe host environment for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2021 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+# Detect host OS to make resolving compiler pathes easier
+UNAME_S := $(shell uname -s)
+ifeq ($(UNAME_S), Darwin)
+ HOST_OS = osx
+else
+ ifeq ($(UNAME_S), Linux)
+ HOST_OS = linux
+ else
+ HOST_OS = win
+ endif
+endif
+
+ifeq ($(HOST_OS), win)
+ define get_os_path
+$(shell cygpath -m $(1))
+ endef
+else
+ define get_os_path
+$(1)
+ endef
+endif
+
+PRJ_DIR=$(call get_os_path, $(CURDIR))
diff --git a/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c b/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c
new file mode 100644
index 0000000..0472f3e
--- /dev/null
+++ b/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.c
@@ -0,0 +1,270 @@
+/***************************************************************************//**
+* \file cy_retarget_io.c
+*
+* \brief
+* Provides APIs for retargeting stdio to UART hardware contained on the Cypress
+* kits.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#include "cy_retarget_io_pdl.h"
+
+#include "cycfg_peripherals.h"
+
+#include "cy_sysint.h"
+#include "cy_scb_uart.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Tracks the previous character sent to output stream */
+#ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+static char cy_retarget_io_stdout_prev_char = 0;
+#endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+
+cy_stc_scb_uart_context_t CYBSP_UART_context;
+
+static uint8_t cy_retarget_io_getchar(void);
+static void cy_retarget_io_putchar(char c);
+
+#if defined(__ARMCC_VERSION) /* ARM-MDK */
+ /***************************************************************************
+ * Function Name: fputc
+ ***************************************************************************/
+ __attribute__((weak)) int fputc(int ch, FILE *f)
+ {
+ (void)f;
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if ((char)ch == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = (char)ch;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar(ch);
+ return (ch);
+ }
+#elif defined (__ICCARM__) /* IAR */
+ #include <yfuns.h>
+
+ /***************************************************************************
+ * Function Name: __write
+ ***************************************************************************/
+ __weak size_t __write(int handle, const unsigned char * buffer, size_t size)
+ {
+ size_t nChars = 0;
+ /* This template only writes to "standard out", for all other file
+ * handles it returns failure. */
+ if (handle != _LLIO_STDOUT)
+ {
+ return (_LLIO_ERROR);
+ }
+ if (buffer != NULL)
+ {
+ for (/* Empty */; nChars < size; ++nChars)
+ {
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if (*buffer == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = *buffer;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar(*buffer);
+ ++buffer;
+ }
+ }
+ return (nChars);
+ }
+#else /* (__GNUC__) GCC */
+ /* Add an explicit reference to the floating point printf library to allow
+ the usage of floating point conversion specifier. */
+ __asm (".global _printf_float");
+ /***************************************************************************
+ * Function Name: _write
+ ***************************************************************************/
+ __attribute__((weak)) int _write (int fd, const char *ptr, int len)
+ {
+ int nChars = 0;
+ (void)fd;
+ if (ptr != NULL)
+ {
+ for (/* Empty */; nChars < len; ++nChars)
+ {
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if (*ptr == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = *ptr;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar((uint32_t)*ptr);
+ ++ptr;
+ }
+ }
+ return (nChars);
+ }
+#endif
+
+
+#if defined(__ARMCC_VERSION) /* ARM-MDK */
+ /***************************************************************************
+ * Function Name: fgetc
+ ***************************************************************************/
+ __attribute__((weak)) int fgetc(FILE *f)
+ {
+ (void)f;
+ return (cy_retarget_io_getchar());
+ }
+#elif defined (__ICCARM__) /* IAR */
+ __weak size_t __read(int handle, unsigned char * buffer, size_t size)
+ {
+ /* This template only reads from "standard in", for all other file
+ handles it returns failure. */
+ if ((handle != _LLIO_STDIN) || (buffer == NULL))
+ {
+ return (_LLIO_ERROR);
+ }
+ else
+ {
+ *buffer = cy_retarget_io_getchar();
+ return (1);
+ }
+ }
+#else /* (__GNUC__) GCC */
+ /* Add an explicit reference to the floating point scanf library to allow
+ the usage of floating point conversion specifier. */
+ __asm (".global _scanf_float");
+ __attribute__((weak)) int _read (int fd, char *ptr, int len)
+ {
+ int nChars = 0;
+ (void)fd;
+ if (ptr != NULL)
+ {
+ for(/* Empty */;nChars < len;++ptr)
+ {
+ *ptr = (char)cy_retarget_io_getchar();
+ ++nChars;
+ if((*ptr == '\n') || (*ptr == '\r'))
+ {
+ break;
+ }
+ }
+ }
+ return (nChars);
+ }
+#endif
+
+static uint8_t cy_retarget_io_getchar(void)
+{
+ uint32_t read_value = Cy_SCB_UART_Get(CYBSP_UART_HW);
+ while (read_value == CY_SCB_UART_RX_NO_DATA)
+ {
+ read_value = Cy_SCB_UART_Get(CYBSP_UART_HW);
+ }
+
+ return (uint8_t)read_value;
+}
+
+static void cy_retarget_io_putchar(char c)
+{
+ uint32_t count = 0;
+ while (count == 0)
+ {
+ count = Cy_SCB_UART_Put(CYBSP_UART_HW, c);
+ }
+}
+
+static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate)
+{
+ cy_rslt_t result = CY_RSLT_TYPE_ERROR;
+
+ uint8_t oversample_value = 8u;
+ uint8_t frac_bits = 0u;
+ uint32_t divider;
+
+ Cy_SCB_UART_Disable(base, NULL);
+
+ result = (cy_rslt_t) Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_16_BIT, 0);
+
+ divider = ((Cy_SysClk_ClkPeriGetFrequency() * (1 << frac_bits)) + ((baudrate * oversample_value) / 2)) / (baudrate * oversample_value) - 1;
+
+ if (result == CY_RSLT_SUCCESS)
+ {
+ result = (cy_rslt_t) Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 0u, divider);
+ }
+
+ if (result == CY_RSLT_SUCCESS)
+ {
+ result = Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0u);
+ }
+
+ Cy_SCB_UART_Enable(base);
+
+ return result;
+}
+
+cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate)
+{
+ cy_rslt_t result = CY_RSLT_TYPE_ERROR;
+
+ result = (cy_rslt_t)Cy_SCB_UART_Init(CYBSP_UART_HW, &CYBSP_UART_config, &CYBSP_UART_context);
+
+ if (result == CY_RSLT_SUCCESS)
+ {
+ result = cy_retarget_io_pdl_setbaud(CYBSP_UART_HW, baudrate);
+ }
+
+ if (result == CY_RSLT_SUCCESS)
+ {
+ Cy_SCB_UART_Enable(CYBSP_UART_HW);
+ }
+
+ return result;
+}
+
+/**
+ * @brief Wait while UART completes transfer. Try for tries_count times -
+ * once each 10 millisecons.
+ */
+void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count)
+{
+ while(tries_count > 0)
+ {
+ if (!Cy_SCB_UART_IsTxComplete(base)) {
+ Cy_SysLib_DelayCycles(10 * cy_delayFreqKhz);
+ tries_count -= 1;
+ } else {
+ return;
+ }
+ }
+}
+
+void cy_retarget_io_pdl_deinit()
+{
+ Cy_SCB_UART_DeInit(CYBSP_UART_HW);
+}
+
+#if defined(__cplusplus)
+}
+#endif
diff --git a/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h b/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h
new file mode 100644
index 0000000..f0c8733
--- /dev/null
+++ b/boot/cypress/libs/retarget_io_pdl/cy_retarget_io_pdl.h
@@ -0,0 +1,62 @@
+/***************************************************************************//**
+* \file cy_retarget_io.h
+*
+* \brief
+* Provides APIs for transmitting messages to or from the board via standard
+* printf/scanf functions. Messages are transmitted over a UART connection which
+* is generally connected to a host machine. Transmission is done at 115200 baud
+* using the tx and rx pins provided by the user of this library. The UART
+* instance is made available via cy_retarget_io_uart_obj in case any changes
+* to the default configuration are desired.
+* NOTE: If the application is built using newlib-nano, by default, floating
+* point format strings (%f) are not supported. To enable this support you must
+* add '-u _printf_float' to the linker command line.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#pragma once
+
+#include <stdio.h>
+#include "cy_result.h"
+#include "cy_pdl.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/** UART baud rate */
+#define CY_RETARGET_IO_BAUDRATE (115200)
+
+/** Defining this macro enables conversion of line feed (LF) into carriage
+ * return followed by line feed (CR & LF) on the output direction (STDOUT). You
+ * can define this macro through the DEFINES variable in the application
+ * Makefile.
+ */
+#define CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+
+cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate);
+
+void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count);
+
+void cy_retarget_io_pdl_deinit(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/boot/cypress/platforms.mk b/boot/cypress/platforms.mk
new file mode 100644
index 0000000..39fd34a
--- /dev/null
+++ b/boot/cypress/platforms.mk
@@ -0,0 +1,78 @@
+################################################################################
+# \file platforms.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+include host.mk
+
+# Target platform is built for. PSOC_062_2M is set by default
+# Supported:
+# - PSOC_062_2M
+# - PSOC_062_1M
+# - PSOC_062_512K
+
+# default PLATFORM
+PLATFORM ?= PSOC_062_2M
+
+# supported platforms
+PLATFORMS := PSOC_062_2M PSOC_062_1M PSOC_062_512K
+
+ifneq ($(filter $(PLATFORM), $(PLATFORMS)),)
+else
+$(error Not supported platform: '$(PLATFORM)')
+endif
+
+# For which core this application is built
+CORE ?= CM0P
+
+# MCU device selection, based on target device.
+# Default chips are used for supported platforms
+# This can be redefined in case of other chip usage
+ifeq ($(PLATFORM), PSOC_062_2M)
+# base kit CY8CPROTO-062-4343W
+DEVICE ?= CY8C624ABZI-D44
+PLATFORM_SUFFIX := 02
+else ifeq ($(PLATFORM), PSOC_062_1M)
+# base kit CY8CKIT-062-WIFI-BT
+DEVICE ?= CY8C6247BZI-D54
+PLATFORM_SUFFIX := 01
+else ifeq ($(PLATFORM), PSOC_062_512K)
+# base kit CY8CPROTO-062S3-4343W
+DEVICE ?= CY8C6245LQI-S3D72
+PLATFORM_SUFFIX := 03
+endif
+
+# Add device name to defines
+DEFINES += $(DEVICE)
+DEFINES += $(PLATFORM)
+
+# Convert defines to regular -DMY_NAME style
+ifneq ($(DEFINES),)
+ DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES)))
+endif
+
+ifeq ($(MAKEINFO) , 1)
+$(info $(PLATFORM_SUFFIX))
+$(info $(DEVICE))
+$(info $(DEFINES_PLATFORM))
+endif
diff --git a/boot/cypress/platforms/system_psoc6.h b/boot/cypress/platforms/system_psoc6.h
deleted file mode 100644
index ee2bb38..0000000
--- a/boot/cypress/platforms/system_psoc6.h
+++ /dev/null
@@ -1,657 +0,0 @@
-/***************************************************************************//**
-* \file system_psoc6.h
-* \version 2.70
-*
-* \brief Device system header file.
-*
-********************************************************************************
-* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
-* SPDX-License-Identifier: Apache-2.0
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*******************************************************************************/
-
-
-#ifndef _SYSTEM_PSOC6_H_
-#define _SYSTEM_PSOC6_H_
-
-/**
-* \addtogroup group_system_config
-* \{
-* Provides device startup, system configuration, and linker script files.
-* The system startup provides the followings features:
-* - See \ref group_system_config_device_initialization for the:
-* * \ref group_system_config_dual_core_device_initialization
-* * \ref group_system_config_single_core_device_initialization
-* - \ref group_system_config_device_memory_definition
-* - \ref group_system_config_heap_stack_config
-* - \ref group_system_config_merge_apps
-* - \ref group_system_config_default_handlers
-* - \ref group_system_config_device_vector_table
-* - \ref group_system_config_cm4_functions
-*
-* \section group_system_config_configuration Configuration Considerations
-*
-* \subsection group_system_config_device_memory_definition Device Memory Definition
-* The flash and RAM allocation for each CPU is defined by the linker scripts.
-* For dual-core devices, the physical flash and RAM memory is shared between the CPU cores.
-* 2 KB of RAM (allocated at the end of RAM) are reserved for system use.
-* For Single-Core devices the system reserves additional 80 bytes of RAM.
-* Using the reserved memory area for other purposes will lead to unexpected behavior.
-*
-* \note The linker files provided with the PDL are generic and handle all common
-* use cases. Your project may not use every section defined in the linker files.
-* In that case you may see warnings during the build process. To eliminate build
-* warnings in your project, you can simply comment out or remove the relevant
-* code in the linker file.
-*
-* <b>ARM GCC</b>\n
-* The flash and RAM sections for the CPU are defined in the linker files:
-* 'xx_yy.ld', where 'xx' is the device group, and 'yy' is the target CPU; for example,
-* 'cy8c6xx7_cm0plus.ld' and 'cy8c6xx7_cm4_dual.ld'.
-* \note If the start of the Cortex-M4 application image is changed, the value
-* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
-* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the
-* Cy_SysEnableCM4() function call.
-*
-* Change the flash and RAM sizes by editing the macros value in the
-* linker files for both CPUs:
-* - 'xx_cm0plus.ld', where 'xx' is the device group:
-* \code
-* flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x00080000
-* ram (rwx) : ORIGIN = 0x08000000, LENGTH = 0x00024000
-* \endcode
-* - 'xx_cm4_dual.ld', where 'xx' is the device group:
-* \code
-* flash (rx) : ORIGIN = 0x10080000, LENGTH = 0x00080000
-* ram (rwx) : ORIGIN = 0x08024000, LENGTH = 0x00023800
-* \endcode
-*
-* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the rom ORIGIN's
-* value in the 'xx_cm4_dual.ld' file, where 'xx' is the device group. Do this
-* by either:
-* - Passing the following commands to the compiler:\n
-* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
-* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where 'xx' is device family:\n
-* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
-*
-* <b>ARM MDK</b>\n
-* The flash and RAM sections for the CPU are defined in the linker files:
-* 'xx_yy.scat', where 'xx' is the device group, and 'yy' is the target CPU; for example,
-* 'cy8c6xx7_cm0plus.scat' and 'cy8c6xx7_cm4_dual.scat'.
-* \note If the start of the Cortex-M4 application image is changed, the value
-* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
-* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the \ref
-* Cy_SysEnableCM4() function call.
-*
-* \note The linker files provided with the PDL are generic and handle all common
-* use cases. Your project may not use every section defined in the linker files.
-* In that case you may see the warnings during the build process:
-* L6314W (no section matches pattern) and/or L6329W
-* (pattern only matches removed unused sections). In your project, you can
-* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
-* the linker. You can also comment out or remove the relevant code in the linker
-* file.
-*
-* Change the flash and RAM sizes by editing the macros value in the
-* linker files for both CPUs:
-* - 'xx_cm0plus.scat', where 'xx' is the device group:
-* \code
-* #define FLASH_START 0x10000000
-* #define FLASH_SIZE 0x00080000
-* #define RAM_START 0x08000000
-* #define RAM_SIZE 0x00024000
-* \endcode
-* - 'xx_cm4_dual.scat', where 'xx' is the device group:
-* \code
-* #define FLASH_START 0x10080000
-* #define FLASH_SIZE 0x00080000
-* #define RAM_START 0x08024000
-* #define RAM_SIZE 0x00023800
-* \endcode
-*
-* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the FLASH_START
-* value in the 'xx_cm4_dual.scat' file,
-* where 'xx' is the device group. Do this by either:
-* - Passing the following commands to the compiler:\n
-* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
-* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where
-* 'xx' is device family:\n
-* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
-*
-* <b>IAR</b>\n
-* The flash and RAM sections for the CPU are defined in the linker files:
-* 'xx_yy.icf', where 'xx' is the device group, and 'yy' is the target CPU; for example,
-* 'cy8c6xx7_cm0plus.icf' and 'cy8c6xx7_cm4_dual.icf'.
-* \note If the start of the Cortex-M4 application image is changed, the value
-* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
-* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the \ref
-* Cy_SysEnableCM4() function call.
-*
-* Change the flash and RAM sizes by editing the macros value in the
-* linker files for both CPUs:
-* - 'xx_cm0plus.icf', where 'xx' is the device group:
-* \code
-* define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
-* define symbol __ICFEDIT_region_IROM1_end__ = 0x10080000;
-* define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
-* define symbol __ICFEDIT_region_IRAM1_end__ = 0x08024000;
-* \endcode
-* - 'xx_cm4_dual.icf', where 'xx' is the device group:
-* \code
-* define symbol __ICFEDIT_region_IROM1_start__ = 0x10080000;
-* define symbol __ICFEDIT_region_IROM1_end__ = 0x10100000;
-* define symbol __ICFEDIT_region_IRAM1_start__ = 0x08024000;
-* define symbol __ICFEDIT_region_IRAM1_end__ = 0x08047800;
-* \endcode
-*
-* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the
-* __ICFEDIT_region_IROM1_start__ value in the 'xx_cm4_dual.icf' file, where 'xx'
-* is the device group. Do this by either:
-* - Passing the following commands to the compiler:\n
-* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
-* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where
-* 'xx' is device family:\n
-* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
-*
-* \subsection group_system_config_device_initialization Device Initialization
-* After a power-on-reset (POR), the boot process is handled by the boot code
-* from the on-chip ROM that is always executed by the Cortex-M0+ core. The boot
-* code passes the control to the Cortex-M0+ startup code located in flash.
-*
-* \subsubsection group_system_config_dual_core_device_initialization Dual-Core Devices
-* The Cortex-M0+ startup code performs the device initialization by a call to
-* SystemInit() and then calls the main() function. The Cortex-M4 core is disabled
-* by default. Enable the core using the \ref Cy_SysEnableCM4() function.
-* See \ref group_system_config_cm4_functions for more details.
-* \note Startup code executes SystemInit() function for the both Cortex-M0+ and Cortex-M4 cores.
-* The function has a separate implementation on each core.
-* Both function implementations unlock and disable the WDT.
-* Therefore enable the WDT after both cores have been initialized.
-*
-* \subsubsection group_system_config_single_core_device_initialization Single-Core Devices
-* The Cortex-M0+ core is not user-accessible on these devices. In this case the
-* Flash Boot handles setup of the CM0+ core and starts the Cortex-M4 core.
-*
-* \subsection group_system_config_heap_stack_config Heap and Stack Configuration
-* There are two ways to adjust heap and stack configurations:
-* -# Editing source code files
-* -# Specifying via command line
-*
-* By default, the stack size is set to 0x00001000 and the heap size is set to 0x00000400.
-*
-* \subsubsection group_system_config_heap_stack_config_gcc ARM GCC
-* - <b>Editing source code files</b>\n
-* The heap and stack sizes are defined in the assembler startup files
-* (e.g. startup_psoc6_01_cm0plus.S and startup_psoc6_01_cm4.S).
-* Change the heap and stack sizes by modifying the following lines:\n
-* \code .equ Stack_Size, 0x00001000 \endcode
-* \code .equ Heap_Size, 0x00000400 \endcode
-*
-* - <b>Specifying via command line</b>\n
-* Change the heap and stack sizes passing the following commands to the compiler:\n
-* \code -D __STACK_SIZE=0x000000400 \endcode
-* \code -D __HEAP_SIZE=0x000000100 \endcode
-*
-* \subsubsection group_system_config_heap_stack_config_mdk ARM MDK
-* - <b>Editing source code files</b>\n
-* The heap and stack sizes are defined in the assembler startup files
-* (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
-* Change the heap and stack sizes by modifying the following lines:\n
-* \code Stack_Size EQU 0x00001000 \endcode
-* \code Heap_Size EQU 0x00000400 \endcode
-*
-* - <b>Specifying via command line</b>\n
-* Change the heap and stack sizes passing the following commands to the assembler:\n
-* \code "--predefine=___STACK_SIZE SETA 0x000000400" \endcode
-* \code "--predefine=__HEAP_SIZE SETA 0x000000100" \endcode
-*
-* \subsubsection group_system_config_heap_stack_config_iar IAR
-* - <b>Editing source code files</b>\n
-* The heap and stack sizes are defined in the linker scatter files: 'xx_yy.icf',
-* where 'xx' is the device family, and 'yy' is the target CPU; for example,
-* cy8c6xx7_cm0plus.icf and cy8c6xx7_cm4_dual.icf.
-* Change the heap and stack sizes by modifying the following lines:\n
-* \code Stack_Size EQU 0x00001000 \endcode
-* \code Heap_Size EQU 0x00000400 \endcode
-*
-* - <b>Specifying via command line</b>\n
-* Change the heap and stack sizes passing the following commands to the
-* linker (including quotation marks):\n
-* \code --define_symbol __STACK_SIZE=0x000000400 \endcode
-* \code --define_symbol __HEAP_SIZE=0x000000100 \endcode
-*
-* \subsection group_system_config_merge_apps Merging CM0+ and CM4 Executables
-* The CM0+ project and linker script build the CM0+ application image. Similarly,
-* the CM4 linker script builds the CM4 application image. Each specifies
-* locations, sizes, and contents of sections in memory. See
-* \ref group_system_config_device_memory_definition for the symbols and default
-* values.
-*
-* The cymcuelftool is invoked by a post-build command. The precise project
-* setting is IDE-specific.
-*
-* The cymcuelftool combines the two executables. The tool examines the
-* executables to ensure that memory regions either do not overlap, or contain
-* identical bytes (shared). If there are no problems, it creates a new ELF file
-* with the merged image, without changing any of the addresses or data.
-*
-* \subsection group_system_config_default_handlers Default Interrupt Handlers Definition
-* The default interrupt handler functions are defined as weak functions to a dummy
-* handler in the startup file. The naming convention for the interrupt handler names
-* is \<interrupt_name\>_IRQHandler. A default interrupt handler can be overwritten in
-* user code by defining the handler function using the same name. For example:
-* \code
-* void scb_0_interrupt_IRQHandler(void)
-*{
-* ...
-*}
-* \endcode
-*
-* \subsection group_system_config_device_vector_table Vectors Table Copy from Flash to RAM
-* This process uses memory sections defined in the linker script. The startup
-* code actually defines the contents of the vector table and performs the copy.
-* \subsubsection group_system_config_device_vector_table_gcc ARM GCC
-* The linker script file is 'xx_yy.ld', where 'xx' is the device family, and
-* 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.ld and cy8c6xx7_cm4_dual.ld.
-* It defines sections and locations in memory.\n
-* Copy interrupt vectors from flash to RAM: \n
-* From: \code LONG (__Vectors) \endcode
-* To: \code LONG (__ram_vectors_start__) \endcode
-* Size: \code LONG (__Vectors_End - __Vectors) \endcode
-* The vector table address (and the vector table itself) are defined in the
-* assembler startup files (e.g. startup_psoc6_01_cm0plus.S and startup_psoc6_01_cm4.S).
-* The code in these files copies the vector table from Flash to RAM.
-* \subsubsection group_system_config_device_vector_table_mdk ARM MDK
-* The linker script file is 'xx_yy.scat', where 'xx' is the device family,
-* and 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.scat and
-* cy8c6xx7_cm4_dual.scat. The linker script specifies that the vector table
-* (RESET_RAM) shall be first in the RAM section.\n
-* RESET_RAM represents the vector table. It is defined in the assembler startup
-* files (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
-* The code in these files copies the vector table from Flash to RAM.
-*
-* \subsubsection group_system_config_device_vector_table_iar IAR
-* The linker script file is 'xx_yy.icf', where 'xx' is the device family, and
-* 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.icf and cy8c6xx7_cm4_dual.icf.
-* This file defines the .intvec_ram section and its location.
-* \code place at start of IRAM1_region { readwrite section .intvec_ram}; \endcode
-* The vector table address (and the vector table itself) are defined in the
-* assembler startup files (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
-* The code in these files copies the vector table from Flash to RAM.
-*
-* \section group_system_config_more_information More Information
-* Refer to the <a href="..\..\pdl_user_guide.pdf">PDL User Guide</a> for the
-* more details.
-*
-* \section group_system_config_MISRA MISRA Compliance
-*
-* <table class="doxtable">
-* <tr>
-* <th>MISRA Rule</th>
-* <th>Rule Class (Required/Advisory)</th>
-* <th>Rule Description</th>
-* <th>Description of Deviation(s)</th>
-* </tr>
-* <tr>
-* <td>2.3</td>
-* <td>R</td>
-* <td>The character sequence // shall not be used within a comment.</td>
-* <td>The comments provide a useful WEB link to the documentation.</td>
-* </tr>
-* </table>
-*
-* \section group_system_config_changelog Changelog
-* <table class="doxtable">
-* <tr>
-* <th>Version</th>
-* <th>Changes</th>
-* <th>Reason for Change</th>
-* </tr>
-* <tr>
-* <td rowspan="4">2.70</td>
-* <td>Updated \ref SystemCoreClockUpdate() implementation - The SysClk API is reused.</td>
-* <td>Code optimization.</td>
-* </tr>
-* <tr>
-* <td>Updated \ref SystemInit() implementation - The IPC7 structure is initialized for both cores.</td>
-* <td>Provided support for SysPM driver updates.</td>
-* </tr>
-* <tr>
-* <td>Updated the linker scripts.</td>
-* <td>Reserved FLASH area for the MCU boot headers.</td>
-* </tr>
-* <tr>
-* <td>Added System Pipe initialization for all devices. </td>
-* <td>Improved PDL usability according to user experience.</td>
-* </tr>
-* <tr>
-* <td>2.60</td>
-* <td>Updated linker scripts.</td>
-* <td>Provided support for new devices, updated usage of CM0p prebuilt image.</td>
-* </tr>
-* <tr>
-* <td>2.50</td>
-* <td>Updated assembler files, C files, linker scripts.</td>
-* <td>Dynamic allocated HEAP size for Arm Compiler 6, IAR 8.</td>
-* </tr>
-* <tr>
-* <td>2.40</td>
-* <td>Updated assembler files, C files, linker scripts.</td>
-* <td>Added Arm Compiler 6 support.</td>
-* </tr>
-* <tr>
-* <td rowspan="2">2.30</td>
-* <td>Added assembler files, linker scripts for Mbed OS.</td>
-* <td>Added Arm Mbed OS embedded operating system support.</td>
-* </tr>
-* <tr>
-* <td>Updated linker scripts to extend the Flash and Ram memories size available for the CM4 core.</td>
-* <td>Enhanced PDL usability.</td>
-* </tr>
-* <tr>
-* <td>2.20</td>
-* <td>Moved the Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit() functions implementation from IPC to Startup.</td>
-* <td>Changed the IPC driver configuration method from compile time to run time.</td>
-* </tr>
-* <tr>
-* <td rowspan="2"> 2.10</td>
-* <td>Added constructor attribute to SystemInit() function declaration for ARM MDK compiler. \n
-* Removed $Sub$$main symbol for ARM MDK compiler.
-* </td>
-* <td>uVision Debugger support.</td>
-* </tr>
-* <tr>
-* <td>Updated description of the Startup behavior for Single-Core Devices. \n
-* Added note about WDT disabling by SystemInit() function.
-* </td>
-* <td>Documentation improvement.</td>
-* </tr>
-* <tr>
-* <td rowspan="4"> 2.0</td>
-* <td>Added restoring of FLL registers to the default state in SystemInit() API for single core devices.
-* Single core device support.
-* </td>
-* <td></td>
-* </tr>
-* <tr>
-* <td>Added Normal Access Restrictions, Public Key, TOC part2 and TOC part2 copy to Supervisory flash linker memory regions. \n
-* Renamed 'wflash' memory region to 'em_eeprom'.
-* </td>
-* <td>Linker scripts usability improvement.</td>
-* </tr>
-* <tr>
-* <td>Added Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit(), Cy_Flash_Init() functions call to SystemInit() API.</td>
-* <td>Reserved system resources for internal operations.</td>
-* </tr>
-* <tr>
-* <td>Added clearing and releasing of IPC structure #7 (reserved for the Deep-Sleep operations) to SystemInit() API.</td>
-* <td>To avoid deadlocks in case of SW or WDT reset during Deep-Sleep entering.</td>
-* </tr>
-* <tr>
-* <td>1.0</td>
-* <td>Initial version</td>
-* <td></td>
-* </tr>
-* </table>
-*
-*
-* \defgroup group_system_config_macro Macro
-* \{
-* \defgroup group_system_config_system_macro System
-* \defgroup group_system_config_cm4_status_macro Cortex-M4 Status
-* \defgroup group_system_config_user_settings_macro User Settings
-* \}
-* \defgroup group_system_config_functions Functions
-* \{
-* \defgroup group_system_config_system_functions System
-* \defgroup group_system_config_cm4_functions Cortex-M4 Control
-* \}
-* \defgroup group_system_config_globals Global Variables
-*
-* \}
-*/
-
-/**
-* \addtogroup group_system_config_system_functions
-* \{
-* \details
-* The following system functions implement CMSIS Core functions.
-* Refer to the [CMSIS documentation]
-* (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
-* for more details.
-* \}
-*/
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/*******************************************************************************
-* Include files
-*******************************************************************************/
-#include <stdint.h>
-
-
-/*******************************************************************************
-* Global preprocessor symbols/macros ('define')
-*******************************************************************************/
-#if ((defined(__GNUC__) && (__ARM_ARCH == 6) && (__ARM_ARCH_6M__ == 1)) || \
- (defined (__ICCARM__) && (__CORE__ == __ARM6M__)) || \
- (defined(__ARMCC_VERSION) && (__TARGET_ARCH_THUMB == 3)))
- #define CY_SYSTEM_CPU_CM0P 1UL
-#else
- #define CY_SYSTEM_CPU_CM0P 0UL
-#endif
-
-
-/*******************************************************************************
-*
-* START OF USER SETTINGS HERE
-* ===========================
-*
-* All lines with '<<<' can be set by user.
-*
-*******************************************************************************/
-
-/**
-* \addtogroup group_system_config_user_settings_macro
-* \{
-*/
-
-
-/***************************************************************************//**
-* \brief Start address of the Cortex-M4 application ([address]UL)
-* <i>(USER SETTING)</i>
-*******************************************************************************/
-#if !defined (CY_CORTEX_M4_APPL_ADDR)
- #define CY_CORTEX_M4_APPL_ADDR (CY_FLASH_BASE + 0x2000U) /* <<< 8 kB of flash is reserved for the Cortex-M0+ application */
-#endif /* (CY_CORTEX_M4_APPL_ADDR) */
-
-
-/***************************************************************************//**
-* \brief IPC Semaphores allocation ([value]UL).
-* <i>(USER SETTING)</i>
-*******************************************************************************/
-#define CY_IPC_SEMA_COUNT (128UL) /* <<< This will allow 128 (4*32) semaphores */
-
-
-/***************************************************************************//**
-* \brief IPC Pipe definitions ([value]UL).
-* <i>(USER SETTING)</i>
-*******************************************************************************/
-#define CY_IPC_MAX_ENDPOINTS (8UL) /* <<< 8 endpoints */
-
-
-/*******************************************************************************
-*
-* END OF USER SETTINGS HERE
-* =========================
-*
-*******************************************************************************/
-
-/** \} group_system_config_user_settings_macro */
-
-
-/**
-* \addtogroup group_system_config_system_macro
-* \{
-*/
-
-#if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN)
- /** The Cortex-M0+ startup driver identifier */
- #define CY_STARTUP_M0P_ID ((uint32_t)((uint32_t)((0x0EU) & 0x3FFFU) << 18U))
-#endif /* (CY_SYSTEM_CPU_CM0P == 1UL) */
-
-#if (CY_SYSTEM_CPU_CM0P != 1UL) || defined(CY_DOXYGEN)
- /** The Cortex-M4 startup driver identifier */
- #define CY_STARTUP_M4_ID ((uint32_t)((uint32_t)((0x0FU) & 0x3FFFU) << 18U))
-#endif /* (CY_SYSTEM_CPU_CM0P != 1UL) */
-
-/** \} group_system_config_system_macro */
-
-
-/**
-* \addtogroup group_system_config_system_functions
-* \{
-*/
-#if defined(__ARMCC_VERSION)
- extern void SystemInit(void) __attribute__((constructor));
-#else
- extern void SystemInit(void);
-#endif /* (__ARMCC_VERSION) */
-
-extern void SystemCoreClockUpdate(void);
-/** \} group_system_config_system_functions */
-
-
-/**
-* \addtogroup group_system_config_cm4_functions
-* \{
-*/
-extern uint32_t Cy_SysGetCM4Status(void);
-extern void Cy_SysEnableCM4(uint32_t vectorTableOffset);
-extern void Cy_SysDisableCM4(void);
-extern void Cy_SysRetainCM4(void);
-extern void Cy_SysResetCM4(void);
-/** \} group_system_config_cm4_functions */
-
-
-/** \cond */
-extern void Default_Handler (void);
-
-void Cy_SysIpcPipeIsrCm0(void);
-void Cy_SysIpcPipeIsrCm4(void);
-
-extern void Cy_SystemInit(void);
-extern void Cy_SystemInitFpuEnable(void);
-
-extern uint32_t cy_delayFreqKhz;
-extern uint8_t cy_delayFreqMhz;
-extern uint32_t cy_delay32kMs;
-/** \endcond */
-
-
-#if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN)
-/**
-* \addtogroup group_system_config_cm4_status_macro
-* \{
-*/
-#define CY_SYS_CM4_STATUS_ENABLED (3U) /**< The Cortex-M4 core is enabled: power on, clock on, no isolate, no reset and no retain. */
-#define CY_SYS_CM4_STATUS_DISABLED (0U) /**< The Cortex-M4 core is disabled: power off, clock off, isolate, reset and no retain. */
-#define CY_SYS_CM4_STATUS_RETAINED (2U) /**< The Cortex-M4 core is retained. power off, clock off, isolate, no reset and retain. */
-#define CY_SYS_CM4_STATUS_RESET (1U) /**< The Cortex-M4 core is in the Reset mode: clock off, no isolated, no retain and reset. */
-/** \} group_system_config_cm4_status_macro */
-
-#endif /* (CY_SYSTEM_CPU_CM0P == 1UL) */
-
-
-/*******************************************************************************
-* IPC Configuration
-* =========================
-*******************************************************************************/
-/* IPC CY_PIPE default configuration */
-#define CY_SYS_CYPIPE_CLIENT_CNT (8UL)
-
-#define CY_SYS_INTR_CYPIPE_MUX_EP0 (1UL) /* IPC CYPRESS PIPE */
-#define CY_SYS_INTR_CYPIPE_PRIOR_EP0 (1UL) /* Notifier Priority */
-#define CY_SYS_INTR_CYPIPE_PRIOR_EP1 (1UL) /* Notifier Priority */
-
-#define CY_SYS_CYPIPE_CHAN_MASK_EP0 (0x0001UL << CY_IPC_CHAN_CYPIPE_EP0)
-#define CY_SYS_CYPIPE_CHAN_MASK_EP1 (0x0001UL << CY_IPC_CHAN_CYPIPE_EP1)
-
-
-/******************************************************************************/
-/*
- * The System pipe configuration defines the IPC channel number, interrupt
- * number, and the pipe interrupt mask for the endpoint.
- *
- * The format of the endPoint configuration
- * Bits[31:16] Interrupt Mask
- * Bits[15:8 ] IPC interrupt
- * Bits[ 7:0 ] IPC channel
- */
-
-/* System Pipe addresses */
-/* CyPipe defines */
-
-#define CY_SYS_CYPIPE_INTR_MASK ( CY_SYS_CYPIPE_CHAN_MASK_EP0 | CY_SYS_CYPIPE_CHAN_MASK_EP1 )
-
-#define CY_SYS_CYPIPE_CONFIG_EP0 ( (CY_SYS_CYPIPE_INTR_MASK << CY_IPC_PIPE_CFG_IMASK_Pos) \
- | (CY_IPC_INTR_CYPIPE_EP0 << CY_IPC_PIPE_CFG_INTR_Pos) \
- | CY_IPC_CHAN_CYPIPE_EP0)
-#define CY_SYS_CYPIPE_CONFIG_EP1 ( (CY_SYS_CYPIPE_INTR_MASK << CY_IPC_PIPE_CFG_IMASK_Pos) \
- | (CY_IPC_INTR_CYPIPE_EP1 << CY_IPC_PIPE_CFG_INTR_Pos) \
- | CY_IPC_CHAN_CYPIPE_EP1)
-
-/******************************************************************************/
-
-
-/** \addtogroup group_system_config_globals
-* \{
-*/
-
-extern uint32_t SystemCoreClock;
-extern uint32_t cy_BleEcoClockFreqHz;
-extern uint32_t cy_Hfclk0FreqHz;
-extern uint32_t cy_PeriClkFreqHz;
-
-/** \} group_system_config_globals */
-
-
-
-/** \cond INTERNAL */
-/*******************************************************************************
-* Backward compatibility macros. The following code is DEPRECATED and must
-* not be used in new projects
-*******************************************************************************/
-
-/* BWC defines for functions related to enter/exit critical section */
-#define Cy_SaveIRQ Cy_SysLib_EnterCriticalSection
-#define Cy_RestoreIRQ Cy_SysLib_ExitCriticalSection
-#define CY_SYS_INTR_CYPIPE_EP0 (CY_IPC_INTR_CYPIPE_EP0)
-#define CY_SYS_INTR_CYPIPE_EP1 (CY_IPC_INTR_CYPIPE_EP1)
-#define cy_delayFreqHz (SystemCoreClock)
-
-/** \endcond */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _SYSTEM_PSOC6_H_ */
-
-
-/* [] END OF FILE */
diff --git a/boot/cypress/platforms/system_psoc6_cm0plus.c b/boot/cypress/platforms/system_psoc6_cm0plus.c
deleted file mode 100644
index 18cc197..0000000
--- a/boot/cypress/platforms/system_psoc6_cm0plus.c
+++ /dev/null
@@ -1,526 +0,0 @@
-/***************************************************************************//**
-* \file system_psoc6_cm0plus.c
-* \version 2.70
-*
-* The device system-source file.
-*
-********************************************************************************
-* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
-* SPDX-License-Identifier: Apache-2.0
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*******************************************************************************/
-
-#include <stdbool.h>
-#include "system_psoc6.h"
-#include "cy_device.h"
-#include "cy_device_headers.h"
-#include "cy_syslib.h"
-#include "cy_sysclk.h"
-#include "cy_wdt.h"
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
- #include "cy_ipc_sema.h"
- #include "cy_ipc_pipe.h"
- #include "cy_ipc_drv.h"
-
- #if defined(CY_DEVICE_PSOC6ABLE2)
- #include "cy_flash.h"
- #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
-#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
-
-
-/*******************************************************************************
-* SystemCoreClockUpdate()
-*******************************************************************************/
-
-/** Default HFClk frequency in Hz */
-#define CY_CLK_HFCLK0_FREQ_HZ_DEFAULT (8000000UL)
-
-/** Default PeriClk frequency in Hz */
-#define CY_CLK_PERICLK_FREQ_HZ_DEFAULT (4000000UL)
-
-/** Default SlowClk system core frequency in Hz */
-#define CY_CLK_SYSTEM_FREQ_HZ_DEFAULT (4000000UL)
-
-
-/**
-* Holds the SlowClk (Cortex-M0+) or FastClk (Cortex-M4) system core clock,
-* which is the system clock frequency supplied to the SysTick timer and the
-* processor core clock.
-* This variable implements CMSIS Core global variable.
-* Refer to the [CMSIS documentation]
-* (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
-* for more details.
-* This variable can be used by debuggers to query the frequency
-* of the debug timer or to configure the trace clock speed.
-*
-* \attention Compilers must be configured to avoid removing this variable in case
-* the application program is not using it. Debugging systems require the variable
-* to be physically present in memory so that it can be examined to configure the debugger. */
-uint32_t SystemCoreClock = CY_CLK_SYSTEM_FREQ_HZ_DEFAULT;
-
-/** Holds the HFClk0 clock frequency. Updated by \ref SystemCoreClockUpdate(). */
-uint32_t cy_Hfclk0FreqHz = CY_CLK_HFCLK0_FREQ_HZ_DEFAULT;
-
-/** Holds the PeriClk clock frequency. Updated by \ref SystemCoreClockUpdate(). */
-uint32_t cy_PeriClkFreqHz = CY_CLK_PERICLK_FREQ_HZ_DEFAULT;
-
-/** Holds the Alternate high frequency clock in Hz. Updated by \ref Cy_BLE_EcoConfigure(). */
-uint32_t cy_BleEcoClockFreqHz = 0UL;
-
-
-/*******************************************************************************
-* SystemInit()
-*******************************************************************************/
-
-/* CLK_FLL_CONFIG default values */
-#define CY_FB_CLK_FLL_CONFIG_VALUE (0x01000000u)
-#define CY_FB_CLK_FLL_CONFIG2_VALUE (0x00020001u)
-#define CY_FB_CLK_FLL_CONFIG3_VALUE (0x00002800u)
-#define CY_FB_CLK_FLL_CONFIG4_VALUE (0x000000FFu)
-
-
-/*******************************************************************************
-* SystemCoreClockUpdate (void)
-*******************************************************************************/
-
-/* Do not use these definitions directly in your application */
-#define CY_DELAY_MS_OVERFLOW_THRESHOLD (0x8000u)
-#define CY_DELAY_1K_THRESHOLD (1000u)
-#define CY_DELAY_1M_THRESHOLD (1000000u)
-
-uint32_t cy_delayFreqKhz = CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1K_THRESHOLD);
-
-uint8_t cy_delayFreqMhz = (uint8_t)CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1M_THRESHOLD);
-
-uint32_t cy_delay32kMs = CY_DELAY_MS_OVERFLOW_THRESHOLD *
- CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1K_THRESHOLD);
-
-
-/*******************************************************************************
-* Cy_SysEnableCM4(), Cy_SysRetainCM4(), and Cy_SysResetCM4()
-*******************************************************************************/
-#define CY_SYS_CM4_PWR_CTL_KEY_OPEN (0x05FAUL)
-#define CY_SYS_CM4_PWR_CTL_KEY_CLOSE (0xFA05UL)
-#define CY_SYS_CM4_VECTOR_TABLE_VALID_ADDR (0x000003FFUL)
-
-
-/*******************************************************************************
-* Function Name: SystemInit
-****************************************************************************//**
-*
-* Initializes the system:
-* - Restores FLL registers to the default state.
-* - Unlocks and disables WDT.
-* - Calls Cy_PDL_Init() function to define the driver library.
-* - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
-* - Calls \ref SystemCoreClockUpdate().
-*
-*******************************************************************************/
-void SystemInit(void)
-{
- Cy_PDL_Init(CY_DEVICE_CFG);
-
- /* Restore FLL registers to the default state as they are not restored by the ROM code */
- uint32_t copy = SRSS->CLK_FLL_CONFIG;
- copy &= ~SRSS_CLK_FLL_CONFIG_FLL_ENABLE_Msk;
- SRSS->CLK_FLL_CONFIG = copy;
-
- copy = SRSS->CLK_ROOT_SELECT[0u];
- copy &= ~SRSS_CLK_ROOT_SELECT_ROOT_DIV_Msk; /* Set ROOT_DIV = 0*/
- SRSS->CLK_ROOT_SELECT[0u] = copy;
-
- SRSS->CLK_FLL_CONFIG = CY_FB_CLK_FLL_CONFIG_VALUE;
- SRSS->CLK_FLL_CONFIG2 = CY_FB_CLK_FLL_CONFIG2_VALUE;
- SRSS->CLK_FLL_CONFIG3 = CY_FB_CLK_FLL_CONFIG3_VALUE;
- SRSS->CLK_FLL_CONFIG4 = CY_FB_CLK_FLL_CONFIG4_VALUE;
-
- /* Unlock and disable WDT */
- Cy_WDT_Unlock();
- Cy_WDT_Disable();
-
- Cy_SystemInit();
- SystemCoreClockUpdate();
-
- /* Clear data register of IPC structure #7, reserved for the Deep-Sleep operations. */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0UL;
-
- /* Release IPC structure #7 to avoid deadlocks in case of SW or WDT reset during Deep-Sleep entering. */
- REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0UL;
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
- /* Allocate and initialize semaphores for the system operations. */
- CY_SECTION(".cy_sharedmem")
- static uint32_t ipcSemaArray[CY_IPC_SEMA_COUNT / CY_IPC_SEMA_PER_WORD];
-
- (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, CY_IPC_SEMA_COUNT, ipcSemaArray);
-
-
- /********************************************************************************
- *
- * Initializes the system pipes. The system pipes are used by BLE and Flash.
- *
- * If the default startup file is not used, or SystemInit() is not called in your
- * project, call the following three functions prior to executing any flash or
- * EmEEPROM write or erase operation:
- * -# Cy_IPC_Sema_Init()
- * -# Cy_IPC_Pipe_Config()
- * -# Cy_IPC_Pipe_Init()
- * -# Cy_Flash_Init()
- *
- *******************************************************************************/
-
- /* Create an array of endpoint structures */
- static cy_stc_ipc_pipe_ep_t systemIpcPipeEpArray[CY_IPC_MAX_ENDPOINTS];
-
- Cy_IPC_Pipe_Config(systemIpcPipeEpArray);
-
- static cy_ipc_pipe_callback_ptr_t systemIpcPipeSysCbArray[CY_SYS_CYPIPE_CLIENT_CNT];
-
- static const cy_stc_ipc_pipe_config_t systemIpcPipeConfigCm0 =
- {
- /* .ep0ConfigData */
- {
- /* .ipcNotifierNumber */ CY_IPC_INTR_CYPIPE_EP0,
- /* .ipcNotifierPriority */ CY_SYS_INTR_CYPIPE_PRIOR_EP0,
- /* .ipcNotifierMuxNumber */ CY_SYS_INTR_CYPIPE_MUX_EP0,
- /* .epAddress */ CY_IPC_EP_CYPIPE_CM0_ADDR,
- /* .epConfig */ CY_SYS_CYPIPE_CONFIG_EP0
- },
- /* .ep1ConfigData */
- {
- /* .ipcNotifierNumber */ CY_IPC_INTR_CYPIPE_EP1,
- /* .ipcNotifierPriority */ CY_SYS_INTR_CYPIPE_PRIOR_EP1,
- /* .ipcNotifierMuxNumber */ 0u,
- /* .epAddress */ CY_IPC_EP_CYPIPE_CM4_ADDR,
- /* .epConfig */ CY_SYS_CYPIPE_CONFIG_EP1
- },
- /* .endpointClientsCount */ CY_SYS_CYPIPE_CLIENT_CNT,
- /* .endpointsCallbacksArray */ systemIpcPipeSysCbArray,
- /* .userPipeIsrHandler */ &Cy_SysIpcPipeIsrCm0
- };
-
- Cy_IPC_Pipe_Init(&systemIpcPipeConfigCm0);
-
-#if defined(CY_DEVICE_PSOC6ABLE2)
- Cy_Flash_Init();
-#endif /* defined(CY_DEVICE_PSOC6ABLE2) */
-
-#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SystemInit
-****************************************************************************//**
-*
-* The function is called during device startup. Once project compiled as part of
-* the PSoC Creator project, the Cy_SystemInit() function is generated by the
-* PSoC Creator.
-*
-* The function generated by PSoC Creator performs all of the necessary device
-* configuration based on the design settings. This includes settings from the
-* Design Wide Resources (DWR) such as Clocks and Pins as well as any component
-* configuration that is necessary.
-*
-*******************************************************************************/
-__WEAK void Cy_SystemInit(void)
-{
- /* Empty weak function. The actual implementation to be in the PSoC Creator
- * generated strong function.
- */
-}
-
-
-/*******************************************************************************
-* Function Name: SystemCoreClockUpdate
-****************************************************************************//**
-*
-* Gets core clock frequency and updates \ref SystemCoreClock.
-*
-* Updates global variables used by the \ref Cy_SysLib_Delay(), \ref
-* Cy_SysLib_DelayUs(), and \ref Cy_SysLib_DelayCycles().
-*
-*******************************************************************************/
-void SystemCoreClockUpdate (void)
-{
- uint32 locHf0Clock = Cy_SysClk_ClkHfGetFrequency(0UL);
-
- if (0UL != locHf0Clock)
- {
- cy_Hfclk0FreqHz = locHf0Clock;
- cy_PeriClkFreqHz = locHf0Clock / (1UL + (uint32_t)Cy_SysClk_ClkPeriGetDivider());
- SystemCoreClock = cy_PeriClkFreqHz / (1UL + (uint32_t)Cy_SysClk_ClkSlowGetDivider());
-
- /* Sets clock frequency for Delay API */
- cy_delayFreqMhz = (uint8_t)CY_SYSLIB_DIV_ROUNDUP(SystemCoreClock, CY_DELAY_1M_THRESHOLD);
- cy_delayFreqKhz = CY_SYSLIB_DIV_ROUNDUP(SystemCoreClock, CY_DELAY_1K_THRESHOLD);
- cy_delay32kMs = CY_DELAY_MS_OVERFLOW_THRESHOLD * cy_delayFreqKhz;
- }
-}
-
-
-#if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN)
-/*******************************************************************************
-* Function Name: Cy_SysGetCM4Status
-****************************************************************************//**
-*
-* Returns the Cortex-M4 core power mode.
-*
-* \return \ref group_system_config_cm4_status_macro
-*
-*******************************************************************************/
-uint32_t Cy_SysGetCM4Status(void)
-{
- uint32_t regValue;
-
- /* Get current power mode */
- regValue = CPUSS->CM4_PWR_CTL & CPUSS_CM4_PWR_CTL_PWR_MODE_Msk;
-
- return (regValue);
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SysEnableCM4
-****************************************************************************//**
-*
-* Sets vector table base address and enables the Cortex-M4 core.
-*
-* \note If the CPU is already enabled, it is reset and then enabled.
-*
-* \param vectorTableOffset The offset of the vector table base address from
-* memory address 0x00000000. The offset should be multiple to 1024 bytes.
-*
-*******************************************************************************/
-void Cy_SysEnableCM4(uint32_t vectorTableOffset)
-{
- uint32_t regValue;
- uint32_t interruptState;
- uint32_t cpuState;
-
- CY_ASSERT_L2((vectorTableOffset & CY_SYS_CM4_VECTOR_TABLE_VALID_ADDR) == 0UL);
-
- interruptState = Cy_SysLib_EnterCriticalSection();
-
- cpuState = Cy_SysGetCM4Status();
- if (CY_SYS_CM4_STATUS_ENABLED == cpuState)
- {
- Cy_SysResetCM4();
- }
-
- CPUSS->CM4_VECTOR_TABLE_BASE = vectorTableOffset;
-
- regValue = CPUSS->CM4_PWR_CTL & ~(CPUSS_CM4_PWR_CTL_VECTKEYSTAT_Msk | CPUSS_CM4_PWR_CTL_PWR_MODE_Msk);
- regValue |= _VAL2FLD(CPUSS_CM4_PWR_CTL_VECTKEYSTAT, CY_SYS_CM4_PWR_CTL_KEY_OPEN);
- regValue |= CY_SYS_CM4_STATUS_ENABLED;
- CPUSS->CM4_PWR_CTL = regValue;
-
- while((CPUSS->CM4_STATUS & CPUSS_CM4_STATUS_PWR_DONE_Msk) == 0UL)
- {
- /* Wait for the power mode to take effect */
- }
-
- Cy_SysLib_ExitCriticalSection(interruptState);
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SysDisableCM4
-****************************************************************************//**
-*
-* Disables the Cortex-M4 core and waits for the mode to take the effect.
-*
-* \warning Do not call the function while the Cortex-M4 is executing because
-* such a call may corrupt/abort a pending bus-transaction by the CPU and cause
-* unexpected behavior in the system including a deadlock. Call the function
-* while the Cortex-M4 core is in the Sleep or Deep Sleep low-power mode. Use
-* the \ref group_syspm Power Management (syspm) API to put the CPU into the
-* low-power modes. Use the \ref Cy_SysPm_ReadStatus() to get a status of the
-* CPU.
-*
-*******************************************************************************/
-void Cy_SysDisableCM4(void)
-{
- uint32_t interruptState;
- uint32_t regValue;
-
- interruptState = Cy_SysLib_EnterCriticalSection();
-
- regValue = CPUSS->CM4_PWR_CTL & ~(CPUSS_CM4_PWR_CTL_VECTKEYSTAT_Msk | CPUSS_CM4_PWR_CTL_PWR_MODE_Msk);
- regValue |= _VAL2FLD(CPUSS_CM4_PWR_CTL_VECTKEYSTAT, CY_SYS_CM4_PWR_CTL_KEY_OPEN);
- regValue |= CY_SYS_CM4_STATUS_DISABLED;
- CPUSS->CM4_PWR_CTL = regValue;
-
- while((CPUSS->CM4_STATUS & CPUSS_CM4_STATUS_PWR_DONE_Msk) == 0UL)
- {
- /* Wait for the power mode to take effect */
- }
-
- Cy_SysLib_ExitCriticalSection(interruptState);
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SysRetainCM4
-****************************************************************************//**
-*
-* Retains the Cortex-M4 core and exists without waiting for the mode to take
-* effect.
-*
-* \note The retained mode can be entered only from the enabled mode.
-*
-* \warning Do not call the function while the Cortex-M4 is executing because
-* such a call may corrupt/abort a pending bus-transaction by the CPU and cause
-* unexpected behavior in the system including a deadlock. Call the function
-* while the Cortex-M4 core is in the Sleep or Deep Sleep low-power mode. Use
-* the \ref group_syspm Power Management (syspm) API to put the CPU into the
-* low-power modes. Use the \ref Cy_SysPm_ReadStatus() to get a status of the CPU.
-*
-*******************************************************************************/
-void Cy_SysRetainCM4(void)
-{
- uint32_t interruptState;
- uint32_t regValue;
-
- interruptState = Cy_SysLib_EnterCriticalSection();
-
- regValue = CPUSS->CM4_PWR_CTL & ~(CPUSS_CM4_PWR_CTL_VECTKEYSTAT_Msk | CPUSS_CM4_PWR_CTL_PWR_MODE_Msk);
- regValue |= _VAL2FLD(CPUSS_CM4_PWR_CTL_VECTKEYSTAT, CY_SYS_CM4_PWR_CTL_KEY_OPEN);
- regValue |= CY_SYS_CM4_STATUS_RETAINED;
- CPUSS->CM4_PWR_CTL = regValue;
-
- Cy_SysLib_ExitCriticalSection(interruptState);
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SysResetCM4
-****************************************************************************//**
-*
-* Resets the Cortex-M4 core and waits for the mode to take the effect.
-*
-* \note The reset mode can not be entered from the retained mode.
-*
-* \warning Do not call the function while the Cortex-M4 is executing because
-* such a call may corrupt/abort a pending bus-transaction by the CPU and cause
-* unexpected behavior in the system including a deadlock. Call the function
-* while the Cortex-M4 core is in the Sleep or Deep Sleep low-power mode. Use
-* the \ref group_syspm Power Management (syspm) API to put the CPU into the
-* low-power modes. Use the \ref Cy_SysPm_ReadStatus() to get a status of the CPU.
-*
-*******************************************************************************/
-void Cy_SysResetCM4(void)
-{
- uint32_t interruptState;
- uint32_t regValue;
-
- interruptState = Cy_SysLib_EnterCriticalSection();
-
- regValue = CPUSS->CM4_PWR_CTL & ~(CPUSS_CM4_PWR_CTL_VECTKEYSTAT_Msk | CPUSS_CM4_PWR_CTL_PWR_MODE_Msk);
- regValue |= _VAL2FLD(CPUSS_CM4_PWR_CTL_VECTKEYSTAT, CY_SYS_CM4_PWR_CTL_KEY_OPEN);
- regValue |= CY_SYS_CM4_STATUS_RESET;
- CPUSS->CM4_PWR_CTL = regValue;
-
- while((CPUSS->CM4_STATUS & CPUSS_CM4_STATUS_PWR_DONE_Msk) == 0UL)
- {
- /* Wait for the power mode to take effect */
- }
-
- Cy_SysLib_ExitCriticalSection(interruptState);
-}
-#endif /* #if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN) */
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
-/*******************************************************************************
-* Function Name: Cy_SysIpcPipeIsrCm0
-****************************************************************************//**
-*
-* This is the interrupt service routine for the system pipe.
-*
-*******************************************************************************/
-void Cy_SysIpcPipeIsrCm0(void)
-{
- Cy_IPC_Pipe_ExecuteCallback(CY_IPC_EP_CYPIPE_CM0_ADDR);
-}
-#endif
-
-
-/*******************************************************************************
-* Function Name: Cy_MemorySymbols
-****************************************************************************//**
-*
-* The intention of the function is to declare boundaries of the memories for the
-* MDK compilers. For the rest of the supported compilers, this is done using
-* linker configuration files. The following symbols used by the cymcuelftool.
-*
-*******************************************************************************/
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-__asm void Cy_MemorySymbols(void)
-{
- /* Flash */
- EXPORT __cy_memory_0_start
- EXPORT __cy_memory_0_length
- EXPORT __cy_memory_0_row_size
-
- /* Working Flash */
- EXPORT __cy_memory_1_start
- EXPORT __cy_memory_1_length
- EXPORT __cy_memory_1_row_size
-
- /* Supervisory Flash */
- EXPORT __cy_memory_2_start
- EXPORT __cy_memory_2_length
- EXPORT __cy_memory_2_row_size
-
- /* XIP */
- EXPORT __cy_memory_3_start
- EXPORT __cy_memory_3_length
- EXPORT __cy_memory_3_row_size
-
- /* eFuse */
- EXPORT __cy_memory_4_start
- EXPORT __cy_memory_4_length
- EXPORT __cy_memory_4_row_size
-
- /* Flash */
-__cy_memory_0_start EQU __cpp(CY_FLASH_BASE)
-__cy_memory_0_length EQU __cpp(CY_FLASH_SIZE)
-__cy_memory_0_row_size EQU 0x200
-
- /* Flash region for EEPROM emulation */
-__cy_memory_1_start EQU __cpp(CY_EM_EEPROM_BASE)
-__cy_memory_1_length EQU __cpp(CY_EM_EEPROM_SIZE)
-__cy_memory_1_row_size EQU 0x200
-
- /* Supervisory Flash */
-__cy_memory_2_start EQU __cpp(CY_SFLASH_BASE)
-__cy_memory_2_length EQU __cpp(CY_SFLASH_SIZE)
-__cy_memory_2_row_size EQU 0x200
-
- /* XIP */
-__cy_memory_3_start EQU __cpp(CY_XIP_BASE)
-__cy_memory_3_length EQU __cpp(CY_XIP_SIZE)
-__cy_memory_3_row_size EQU 0x200
-
- /* eFuse */
-__cy_memory_4_start EQU __cpp(0x90700000)
-__cy_memory_4_length EQU __cpp(0x100000)
-__cy_memory_4_row_size EQU __cpp(1)
-}
-#endif /* defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050) */
-
-
-/* [] END OF FILE */
diff --git a/boot/cypress/platforms/system_psoc6_cm4.c b/boot/cypress/platforms/system_psoc6_cm4.c
deleted file mode 100644
index 7800d6b..0000000
--- a/boot/cypress/platforms/system_psoc6_cm4.c
+++ /dev/null
@@ -1,390 +0,0 @@
-/***************************************************************************//**
-* \file system_psoc6_cm4.c
-* \version 2.70
-*
-* The device system-source file.
-*
-********************************************************************************
-* \copyright
-* Copyright 2016-2019 Cypress Semiconductor Corporation
-* SPDX-License-Identifier: Apache-2.0
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*******************************************************************************/
-
-#include <stdbool.h>
-#include "system_psoc6.h"
-#include "cy_device.h"
-#include "cy_device_headers.h"
-#include "cy_syslib.h"
-#include "cy_sysclk.h"
-#include "cy_wdt.h"
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
- #include "cy_ipc_sema.h"
- #include "cy_ipc_pipe.h"
- #include "cy_ipc_drv.h"
-
- #if defined(CY_DEVICE_PSOC6ABLE2)
- #include "cy_flash.h"
- #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
-#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
-
-
-/*******************************************************************************
-* SystemCoreClockUpdate()
-*******************************************************************************/
-
-/** Default HFClk frequency in Hz */
-#define CY_CLK_HFCLK0_FREQ_HZ_DEFAULT (8000000UL)
-
-/** Default PeriClk frequency in Hz */
-#define CY_CLK_PERICLK_FREQ_HZ_DEFAULT (4000000UL)
-
-/** Default FastClk system core frequency in Hz */
-#define CY_CLK_SYSTEM_FREQ_HZ_DEFAULT (8000000UL)
-
-
-/**
-* Holds the SlowClk (Cortex-M0+) or FastClk (Cortex-M4) system core clock,
-* which is the system clock frequency supplied to the SysTick timer and the
-* processor core clock.
-* This variable implements CMSIS Core global variable.
-* Refer to the [CMSIS documentation]
-* (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
-* for more details.
-* This variable can be used by debuggers to query the frequency
-* of the debug timer or to configure the trace clock speed.
-*
-* \attention Compilers must be configured to avoid removing this variable in case
-* the application program is not using it. Debugging systems require the variable
-* to be physically present in memory so that it can be examined to configure the debugger. */
-uint32_t SystemCoreClock = CY_CLK_SYSTEM_FREQ_HZ_DEFAULT;
-
-/** Holds the HFClk0 clock frequency. Updated by \ref SystemCoreClockUpdate(). */
-uint32_t cy_Hfclk0FreqHz = CY_CLK_HFCLK0_FREQ_HZ_DEFAULT;
-
-/** Holds the PeriClk clock frequency. Updated by \ref SystemCoreClockUpdate(). */
-uint32_t cy_PeriClkFreqHz = CY_CLK_PERICLK_FREQ_HZ_DEFAULT;
-
-/** Holds the Alternate high frequency clock in Hz. Updated by \ref Cy_BLE_EcoConfigure(). */
-uint32_t cy_BleEcoClockFreqHz = 0UL;
-
-/* SCB->CPACR */
-#define SCB_CPACR_CP10_CP11_ENABLE (0xFUL << 20u)
-
-
-/*******************************************************************************
-* SystemInit()
-*******************************************************************************/
-
-/* CLK_FLL_CONFIG default values */
-#define CY_FB_CLK_FLL_CONFIG_VALUE (0x01000000u)
-#define CY_FB_CLK_FLL_CONFIG2_VALUE (0x00020001u)
-#define CY_FB_CLK_FLL_CONFIG3_VALUE (0x00002800u)
-#define CY_FB_CLK_FLL_CONFIG4_VALUE (0x000000FFu)
-
-/* IPC_STRUCT7->DATA configuration */
-#define CY_STARTUP_CM0_DP_STATE (0x2uL)
-#define CY_STARTUP_IPC7_DP_OFFSET (0x28u)
-
-
-/*******************************************************************************
-* SystemCoreClockUpdate (void)
-*******************************************************************************/
-
-/* Do not use these definitions directly in your application */
-#define CY_DELAY_MS_OVERFLOW_THRESHOLD (0x8000u)
-#define CY_DELAY_1K_THRESHOLD (1000u)
-#define CY_DELAY_1M_THRESHOLD (1000000u)
-
-uint32_t cy_delayFreqKhz = CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1K_THRESHOLD);
-
-uint8_t cy_delayFreqMhz = (uint8_t)CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1M_THRESHOLD);
-
-uint32_t cy_delay32kMs = CY_DELAY_MS_OVERFLOW_THRESHOLD *
- CY_SYSLIB_DIV_ROUNDUP(CY_CLK_SYSTEM_FREQ_HZ_DEFAULT, CY_DELAY_1K_THRESHOLD);
-
-
-/*******************************************************************************
-* Function Name: SystemInit
-****************************************************************************//**
-* \cond
-* Initializes the system:
-* - Restores FLL registers to the default state for single core devices.
-* - Unlocks and disables WDT.
-* - Calls Cy_PDL_Init() function to define the driver library.
-* - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
-* - Calls \ref SystemCoreClockUpdate().
-* \endcond
-*******************************************************************************/
-void SystemInit(void)
-{
- Cy_PDL_Init(CY_DEVICE_CFG);
-
-#ifdef __CM0P_PRESENT
- #if (__CM0P_PRESENT == 0)
- /* Restore FLL registers to the default state as they are not restored by the ROM code */
- uint32_t copy = SRSS->CLK_FLL_CONFIG;
- copy &= ~SRSS_CLK_FLL_CONFIG_FLL_ENABLE_Msk;
- SRSS->CLK_FLL_CONFIG = copy;
-
- copy = SRSS->CLK_ROOT_SELECT[0u];
- copy &= ~SRSS_CLK_ROOT_SELECT_ROOT_DIV_Msk; /* Set ROOT_DIV = 0*/
- SRSS->CLK_ROOT_SELECT[0u] = copy;
-
- SRSS->CLK_FLL_CONFIG = CY_FB_CLK_FLL_CONFIG_VALUE;
- SRSS->CLK_FLL_CONFIG2 = CY_FB_CLK_FLL_CONFIG2_VALUE;
- SRSS->CLK_FLL_CONFIG3 = CY_FB_CLK_FLL_CONFIG3_VALUE;
- SRSS->CLK_FLL_CONFIG4 = CY_FB_CLK_FLL_CONFIG4_VALUE;
-
- /* Unlock and disable WDT */
- Cy_WDT_Unlock();
- Cy_WDT_Disable();
- #endif /* (__CM0P_PRESENT == 0) */
-#endif /* __CM0P_PRESENT */
-
- Cy_SystemInit();
- SystemCoreClockUpdate();
-
-#ifdef __CM0P_PRESENT
- #if (__CM0P_PRESENT == 0)
- /* Configure data register (as CM0p in deep sleep state) of IPC structure #7, reserved for the Deep-Sleep operations. */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = (CY_STARTUP_CM0_DP_STATE <<
- CY_STARTUP_IPC7_DP_OFFSET);
-
- /* Release IPC structure #7 to avoid deadlocks in case of SW or WDT reset during Deep-Sleep entering. */
- REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0UL;
- #endif /* (__CM0P_PRESENT == 0) */
-#endif /* __CM0P_PRESENT */
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
-
-#ifdef __CM0P_PRESENT
- #if (__CM0P_PRESENT == 0)
- /* Allocate and initialize semaphores for the system operations. */
- static uint32_t ipcSemaArray[CY_IPC_SEMA_COUNT / CY_IPC_SEMA_PER_WORD];
- (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, CY_IPC_SEMA_COUNT, ipcSemaArray);
- #else
- (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, 0ul, NULL);
- #endif /* (__CM0P_PRESENT) */
-#else
- (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, 0ul, NULL);
-#endif /* __CM0P_PRESENT */
-
-
- /********************************************************************************
- *
- * Initializes the system pipes. The system pipes are used by BLE and Flash.
- *
- * If the default startup file is not used, or SystemInit() is not called in your
- * project, call the following three functions prior to executing any flash or
- * EmEEPROM write or erase operation:
- * -# Cy_IPC_Sema_Init()
- * -# Cy_IPC_Pipe_Config()
- * -# Cy_IPC_Pipe_Init()
- * -# Cy_Flash_Init()
- *
- *******************************************************************************/
- /* Create an array of endpoint structures */
- static cy_stc_ipc_pipe_ep_t systemIpcPipeEpArray[CY_IPC_MAX_ENDPOINTS];
-
- Cy_IPC_Pipe_Config(systemIpcPipeEpArray);
-
- static cy_ipc_pipe_callback_ptr_t systemIpcPipeSysCbArray[CY_SYS_CYPIPE_CLIENT_CNT];
-
- static const cy_stc_ipc_pipe_config_t systemIpcPipeConfigCm4 =
- {
- /* .ep0ConfigData */
- {
- /* .ipcNotifierNumber */ CY_IPC_INTR_CYPIPE_EP0,
- /* .ipcNotifierPriority */ CY_SYS_INTR_CYPIPE_PRIOR_EP0,
- /* .ipcNotifierMuxNumber */ CY_SYS_INTR_CYPIPE_MUX_EP0,
- /* .epAddress */ CY_IPC_EP_CYPIPE_CM0_ADDR,
- /* .epConfig */ CY_SYS_CYPIPE_CONFIG_EP0
- },
- /* .ep1ConfigData */
- {
- /* .ipcNotifierNumber */ CY_IPC_INTR_CYPIPE_EP1,
- /* .ipcNotifierPriority */ CY_SYS_INTR_CYPIPE_PRIOR_EP1,
- /* .ipcNotifierMuxNumber */ 0u,
- /* .epAddress */ CY_IPC_EP_CYPIPE_CM4_ADDR,
- /* .epConfig */ CY_SYS_CYPIPE_CONFIG_EP1
- },
- /* .endpointClientsCount */ CY_SYS_CYPIPE_CLIENT_CNT,
- /* .endpointsCallbacksArray */ systemIpcPipeSysCbArray,
- /* .userPipeIsrHandler */ &Cy_SysIpcPipeIsrCm4
- };
-
- Cy_IPC_Pipe_Init(&systemIpcPipeConfigCm4);
-
-#if defined(CY_DEVICE_PSOC6ABLE2)
- Cy_Flash_Init();
-#endif /* defined(CY_DEVICE_PSOC6ABLE2) */
-
-#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SystemInit
-****************************************************************************//**
-*
-* The function is called during device startup. Once project compiled as part of
-* the PSoC Creator project, the Cy_SystemInit() function is generated by the
-* PSoC Creator.
-*
-* The function generated by PSoC Creator performs all of the necessary device
-* configuration based on the design settings. This includes settings from the
-* Design Wide Resources (DWR) such as Clocks and Pins as well as any component
-* configuration that is necessary.
-*
-*******************************************************************************/
-__WEAK void Cy_SystemInit(void)
-{
- /* Empty weak function. The actual implementation to be in the PSoC Creator
- * generated strong function.
- */
-}
-
-
-/*******************************************************************************
-* Function Name: SystemCoreClockUpdate
-****************************************************************************//**
-*
-* Gets core clock frequency and updates \ref SystemCoreClock, \ref
-* cy_Hfclk0FreqHz, and \ref cy_PeriClkFreqHz.
-*
-* Updates global variables used by the \ref Cy_SysLib_Delay(), \ref
-* Cy_SysLib_DelayUs(), and \ref Cy_SysLib_DelayCycles().
-*
-*******************************************************************************/
-void SystemCoreClockUpdate (void)
-{
- uint32 locHf0Clock = Cy_SysClk_ClkHfGetFrequency(0UL);
-
- if (0UL != locHf0Clock)
- {
- cy_Hfclk0FreqHz = locHf0Clock;
- cy_PeriClkFreqHz = locHf0Clock / (1UL + (uint32_t)Cy_SysClk_ClkPeriGetDivider());
- SystemCoreClock = locHf0Clock / (1UL + (uint32_t)Cy_SysClk_ClkFastGetDivider());
-
- /* Sets clock frequency for Delay API */
- cy_delayFreqMhz = (uint8_t)CY_SYSLIB_DIV_ROUNDUP(SystemCoreClock, CY_DELAY_1M_THRESHOLD);
- cy_delayFreqKhz = CY_SYSLIB_DIV_ROUNDUP(SystemCoreClock, CY_DELAY_1K_THRESHOLD);
- cy_delay32kMs = CY_DELAY_MS_OVERFLOW_THRESHOLD * cy_delayFreqKhz;
- }
-}
-
-
-/*******************************************************************************
-* Function Name: Cy_SystemInitFpuEnable
-****************************************************************************//**
-*
-* Enables the FPU if it is used. The function is called from the startup file.
-*
-*******************************************************************************/
-void Cy_SystemInitFpuEnable(void)
-{
- #if defined (__FPU_USED) && (__FPU_USED == 1U)
- uint32_t interruptState;
- interruptState = Cy_SysLib_EnterCriticalSection();
- SCB->CPACR |= SCB_CPACR_CP10_CP11_ENABLE;
- __DSB();
- __ISB();
- Cy_SysLib_ExitCriticalSection(interruptState);
- #endif /* (__FPU_USED) && (__FPU_USED == 1U) */
-}
-
-
-#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
-/*******************************************************************************
-* Function Name: Cy_SysIpcPipeIsrCm4
-****************************************************************************//**
-*
-* This is the interrupt service routine for the system pipe.
-*
-*******************************************************************************/
-void Cy_SysIpcPipeIsrCm4(void)
-{
- Cy_IPC_Pipe_ExecuteCallback(CY_IPC_EP_CYPIPE_CM4_ADDR);
-}
-#endif
-
-
-/*******************************************************************************
-* Function Name: Cy_MemorySymbols
-****************************************************************************//**
-*
-* The intention of the function is to declare boundaries of the memories for the
-* MDK compilers. For the rest of the supported compilers, this is done using
-* linker configuration files. The following symbols used by the cymcuelftool.
-*
-*******************************************************************************/
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-__asm void Cy_MemorySymbols(void)
-{
- /* Flash */
- EXPORT __cy_memory_0_start
- EXPORT __cy_memory_0_length
- EXPORT __cy_memory_0_row_size
-
- /* Working Flash */
- EXPORT __cy_memory_1_start
- EXPORT __cy_memory_1_length
- EXPORT __cy_memory_1_row_size
-
- /* Supervisory Flash */
- EXPORT __cy_memory_2_start
- EXPORT __cy_memory_2_length
- EXPORT __cy_memory_2_row_size
-
- /* XIP */
- EXPORT __cy_memory_3_start
- EXPORT __cy_memory_3_length
- EXPORT __cy_memory_3_row_size
-
- /* eFuse */
- EXPORT __cy_memory_4_start
- EXPORT __cy_memory_4_length
- EXPORT __cy_memory_4_row_size
-
- /* Flash */
-__cy_memory_0_start EQU __cpp(CY_FLASH_BASE)
-__cy_memory_0_length EQU __cpp(CY_FLASH_SIZE)
-__cy_memory_0_row_size EQU 0x200
-
- /* Flash region for EEPROM emulation */
-__cy_memory_1_start EQU __cpp(CY_EM_EEPROM_BASE)
-__cy_memory_1_length EQU __cpp(CY_EM_EEPROM_SIZE)
-__cy_memory_1_row_size EQU 0x200
-
- /* Supervisory Flash */
-__cy_memory_2_start EQU __cpp(CY_SFLASH_BASE)
-__cy_memory_2_length EQU __cpp(CY_SFLASH_SIZE)
-__cy_memory_2_row_size EQU 0x200
-
- /* XIP */
-__cy_memory_3_start EQU __cpp(CY_XIP_BASE)
-__cy_memory_3_length EQU __cpp(CY_XIP_SIZE)
-__cy_memory_3_row_size EQU 0x200
-
- /* eFuse */
-__cy_memory_4_start EQU __cpp(0x90700000)
-__cy_memory_4_length EQU __cpp(0x100000)
-__cy_memory_4_row_size EQU __cpp(1)
-}
-#endif /* defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050) */
-
-
-/* [] END OF FILE */
diff --git a/boot/cypress/BlinkyApp/toolchains.mk b/boot/cypress/toolchains.mk
similarity index 62%
rename from boot/cypress/BlinkyApp/toolchains.mk
rename to boot/cypress/toolchains.mk
index 55c62d5..11c1413 100644
--- a/boot/cypress/BlinkyApp/toolchains.mk
+++ b/boot/cypress/toolchains.mk
@@ -23,6 +23,8 @@
# limitations under the License.
################################################################################
+include common_libs.mk
+
# Compilers
GCC_ARM := 1
IAR := 2
@@ -48,20 +50,13 @@
# NOTE: Absolute pathes for now for the sake of development
ifeq ($(HOST_OS), win)
ifeq ($(COMPILER), GCC_ARM)
- TOOLCHAIN_PATH ?= c:/Users/$(USERNAME)/ModusToolbox/tools_2.1/gcc-7.2.1
+ TOOLCHAIN_PATH ?= c:/Users/$(USERNAME)/ModusToolbox/tools_2.2/gcc
MY_TOOLCHAIN_PATH:=$(subst \,/,$(TOOLCHAIN_PATH))
TOOLCHAIN_PATH := $(MY_TOOLCHAIN_PATH)
GCC_PATH := $(TOOLCHAIN_PATH)
# executables
CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
LD := $(CC)
-
- else ifeq ($(COMPILER), IAR)
- IAR_PATH := C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0/arm
- # executables
- CC := "$(IAR_PATH)/bin/iccarm.exe"
- AS := "$(IAR_PATH)/bin/iasmarm.exe"
- LD := "$(IAR_PATH)/bin/ilinkarm.exe"
endif
else ifeq ($(HOST_OS), osx)
@@ -72,7 +67,7 @@
LD := $(CC)
else ifeq ($(HOST_OS), linux)
- TOOLCHAIN_PATH ?= /usr/bin/gcc-arm-none-eabi/bin/arm-none-eabi-gcc
+ TOOLCHAIN_PATH ?= /opt/gcc-arm-none-eabi
GCC_PATH := $(TOOLCHAIN_PATH)
# executables
CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
@@ -87,42 +82,26 @@
# Set flags for toolchain executables
ifeq ($(COMPILER), GCC_ARM)
# set build-in compiler flags
- CFLAGS_COMMON := -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -fno-stack-protector -ffunction-sections -fdata-sections -ffat-lto-objects -fstrict-aliasing -g -Wall -Wextra
+ CFLAGS_COMMON := -mcpu=cortex-$(CORE_SIFFX) -mthumb -mfloat-abi=soft -fno-stack-protector -ffunction-sections -fdata-sections -ffat-lto-objects -fstrict-aliasing -g -Wall -Wextra
ifeq ($(BUILDCFG), Debug)
CFLAGS_COMMON += -Og -g3
else ifeq ($(BUILDCFG), Release)
CFLAGS_COMMON += -Os -g
else
- $(error BUILDCFG : '$(BUILDCFG)' is not supported)
+$(error BUILDCFG : '$(BUILDCFG)' is not supported)
endif
# add defines and includes
CFLAGS := $(CFLAGS_COMMON) $(INCLUDES)
CC_DEPEND = -MD -MP -MF
- LDFLAGS_COMMON := -mcpu=cortex-m4 -mthumb -specs=nano.specs -ffunction-sections -fdata-sections -Wl,--gc-sections -L "$(GCC_PATH)/lib/gcc/arm-none-eabi/7.2.1/thumb/v6-m" -ffat-lto-objects -g --enable-objc-gc
+ LDFLAGS_COMMON := -mcpu=cortex-$(CORE_SIFFX) -mthumb -specs=nano.specs -ffunction-sections -fdata-sections -Wl,--gc-sections -L "$(GCC_PATH)/lib/gcc/arm-none-eabi/7.2.1/thumb/v6-m" -ffat-lto-objects -g --enable-objc-gc
ifeq ($(BUILDCFG), Debug)
LDFLAGS_COMMON += -Og
else ifeq ($(BUILDCFG), Release)
LDFLAGS_COMMON += -Os
else
- $(error BUILDCFG : '$(BUILDCFG)' is not supported)
+$(error BUILDCFG : '$(BUILDCFG)' is not supported)
endif
LDFLAGS_NANO := -L "$(GCC_PATH)/arm-none-eabi/lib/thumb/v6-m"
LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_NANO)
-
-else ifeq ($(COMPILER), IAR)
-
- CFLAGS := --debug --endian=little --cpu=Cortex-M4 -e --fpu=None --dlib_config "$(IAR_PATH)\INC\c\DLib_Config_Normal.h"
- CFLAGS += -Ohz --silent
- CFLAGS += $(INCLUDES)
- CC_DEPEND = --dependencies
-
- AS_FLAGS := -s+ "-M<>" -w+ -r --cpu Cortex-M4 --fpu None -S
-
- LINKER_SCRIPT := $(CHIP_SERIES).icf
-
- #options to extend stack analize: --log call_graph --log_file $(OUT)/stack_usage_$(SUFFIX).txt
- LDFLAGS_STACK_USAGE := --stack_usage_control $(STACK_CONTROL_FILE) --diag_suppress=Ls015 --diag_suppress=Ls016
- LDFLAGS_COMMON := --vfe --text_out locale --silent --inline --merge_duplicate_sections
- LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_STACK_USAGE) --config $(LINKER_SCRIPT) --map $(OUT_TARGET)/$(APP_NAME).map --entry Cy_FB_ResetHandler --no_exceptions
endif