commit 6945bb6cb4d1feda4bdb0a8504c3da76f5ffd3e8
author Roland Mikhel <roland.mikhel@arm.com> Tue Apr 11 15:57:49 2023 +0200
committer Dávid Vincze <david.vincze@arm.com> Thu Jun 29 13:21:30 2023 +0200
tree 148eef33082a7c5acab873260b57ff3fa3197d36
parent 820e9ccef5d1e4bc4d8fa439381c7e14b73dc691

sim: Add new ram-load test cases

Adds new test cases to various ram-load related logic.

Signed-off-by: Roland Mikhel <roland.mikhel@arm.com>
Change-Id: I3a0ca951b2c720be4e6fe2ed0e5d1830fcfb240c

sim/src/lib.rs

diff --git a/sim/src/lib.rs b/sim/src/lib.rs
index df1919e..fe43e46 100644
--- a/sim/src/lib.rs
+++ b/sim/src/lib.rs
@@ -1,6 +1,6 @@
 // Copyright (c) 2017-2019 Linaro LTD
 // Copyright (c) 2017-2019 JUUL Labs
-// Copyright (c) 2019 Arm Limited
+// Copyright (c) 2019-2023 Arm Limited
 //
 // SPDX-License-Identifier: Apache-2.0
 
@@ -30,6 +30,7 @@
     image::{
         ImagesBuilder,
         Images,
+        ImageManipulation,
         show_sizes,
     },
 };
@@ -201,7 +202,7 @@
 
         failed |= bad_secondary_slot_image.run_signfail_upgrade();
 
-        let images = run.clone().make_no_upgrade_image(&NO_DEPS);
+        let images = run.clone().make_no_upgrade_image(&NO_DEPS, ImageManipulation::None);
         failed |= images.run_norevert_newimage();
 
         let images = run.make_image(&NO_DEPS, true);