diff --git a/sim/src/caps.rs b/sim/src/caps.rs
index 32feba5..e7240d1 100644
--- a/sim/src/caps.rs
+++ b/sim/src/caps.rs
@@ -1,6 +1,6 @@
 // Copyright (c) 2017-2021 Linaro LTD
 // Copyright (c) 2019 JUUL Labs
-// Copyright (c) 2019-2021 Arm Limited
+// Copyright (c) 2019-2023 Arm Limited
 //
 // SPDX-License-Identifier: Apache-2.0
 
@@ -11,23 +11,22 @@
 #[allow(unused)]
 pub enum Caps {
     RSA2048              = (1 << 0),
-    EcdsaP224            = (1 << 1),
-    EcdsaP256            = (1 << 2),
-    SwapUsingScratch     = (1 << 3),
-    OverwriteUpgrade     = (1 << 4),
-    EncRsa               = (1 << 5),
-    EncKw                = (1 << 6),
-    ValidatePrimarySlot  = (1 << 7),
-    RSA3072              = (1 << 8),
-    Ed25519              = (1 << 9),
-    EncEc256             = (1 << 10),
-    SwapUsingMove        = (1 << 11),
-    DowngradePrevention  = (1 << 12),
-    EncX25519            = (1 << 13),
-    Bootstrap            = (1 << 14),
-    Aes256               = (1 << 15),
-    RamLoad              = (1 << 16),
-    DirectXip            = (1 << 17),
+    EcdsaP256            = (1 << 1),
+    SwapUsingScratch     = (1 << 2),
+    OverwriteUpgrade     = (1 << 3),
+    EncRsa               = (1 << 4),
+    EncKw                = (1 << 5),
+    ValidatePrimarySlot  = (1 << 6),
+    RSA3072              = (1 << 7),
+    Ed25519              = (1 << 8),
+    EncEc256             = (1 << 9),
+    SwapUsingMove        = (1 << 10),
+    DowngradePrevention  = (1 << 11),
+    EncX25519            = (1 << 12),
+    Bootstrap            = (1 << 13),
+    Aes256               = (1 << 14),
+    RamLoad              = (1 << 15),
+    DirectXip            = (1 << 16),
 }
 
 impl Caps {
@@ -38,7 +37,7 @@
 
     /// Does this build have ECDSA of some type enabled for signatures.
     pub fn has_ecdsa() -> bool {
-        Caps::EcdsaP256.present() || Caps::EcdsaP224.present()
+        Caps::EcdsaP256.present()
     }
 
     /// Query for the number of images that have been configured into this
diff --git a/sim/src/image.rs b/sim/src/image.rs
index 568cf0a..424f646 100644
--- a/sim/src/image.rs
+++ b/sim/src/image.rs
@@ -1,6 +1,6 @@
 // Copyright (c) 2019-2021 Linaro LTD
 // Copyright (c) 2019-2020 JUUL Labs
-// Copyright (c) 2019-2021 Arm Limited
+// Copyright (c) 2019-2023 Arm Limited
 //
 // SPDX-License-Identifier: Apache-2.0
 
@@ -1853,9 +1853,6 @@
 /// Construct a TLV generator based on how MCUboot is currently configured.  The returned
 /// ManifestGen will generate the appropriate entries based on this configuration.
 fn make_tlv() -> TlvGen {
-    if Caps::EcdsaP224.present() {
-        panic!("Ecdsa P224 not supported in Simulator");
-    }
     let aes_key_size = if Caps::Aes256.present() { 256 } else { 128 };
 
     if Caps::EncKw.present() {
diff --git a/sim/src/tlv.rs b/sim/src/tlv.rs
index 61d56a2..fcd6b57 100644
--- a/sim/src/tlv.rs
+++ b/sim/src/tlv.rs
@@ -1,6 +1,6 @@
 // Copyright (c) 2017-2021 Linaro LTD
 // Copyright (c) 2017-2020 JUUL Labs
-// Copyright (c) 2021 Arm Limited
+// Copyright (c) 2021-2023 Arm Limited
 //
 // SPDX-License-Identifier: Apache-2.0
 
@@ -51,7 +51,6 @@
     KEYHASH = 0x01,
     SHA256 = 0x10,
     RSA2048 = 0x20,
-    ECDSA224 = 0x21,
     ECDSA256 = 0x22,
     RSA3072 = 0x23,
     ED25519 = 0x24,
@@ -451,8 +450,7 @@
             // signature verification can be validated.
             let mut corrupt_hash = self.gen_corrupted;
             for k in &[TlvKinds::RSA2048, TlvKinds::RSA3072,
-                TlvKinds::ECDSA224, TlvKinds::ECDSA256,
-                TlvKinds::ED25519]
+                TlvKinds::ECDSA256, TlvKinds::ED25519]
             {
                 if self.kinds.contains(k) {
                     corrupt_hash = false;