Add files to eliminate HAL dependency, build/compile pass
Signed-off-by: Bohdan Kovalchuk <bohd@cypress.com>
Signed-off-by: Roman Okhrimenko <roman.okhrimenko@cypress.com>
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.mk b/boot/cypress/MCUBootApp/MCUBootApp.mk
index 2cdb157..14cccf6 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.mk
+++ b/boot/cypress/MCUBootApp/MCUBootApp.mk
@@ -1,9 +1,9 @@
################################################################################
-# \file targets.mk
+# \file MCUBootApp.mk
# \version 1.0
#
# \brief
-# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications.
+# Makefile for Cypress MCUBoot-based application.
#
################################################################################
# \copyright
@@ -46,7 +46,6 @@
DEFINES_APP += -DCORE=$(CORE)
DEFINES_APP += -DMCUBOOT_IMAGE_NUMBER=$(MCUBOOT_IMAGE_NUMBER)
-
ifeq ($(USE_CRYPTO_HW), 1)
DEFINES_APP += -DMBEDTLS_USER_CONFIG_FILE="\"mcuboot_crypto_acc_config.h\""
endif
@@ -61,8 +60,9 @@
SOURCES_APP += $(SOURCES_APP_SRC)
SOURCES_APP += $(SOURCES_FLASH_PORT)
-INCLUDES_DIRS_MCUBOOT := $(addprefix -I, $(CURDIR)/../bootutil/include)
-INCLUDES_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/../bootutil/src)
+INCLUDE_DIRS_MCUBOOT := $(addprefix -I, $(CURDIR)/../bootutil/include)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/../bootutil/src)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(CURDIR)/..)
INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR))
INCLUDE_DIRS_APP += $(addprefix -I, $(CURDIR)/cy_flash_pal/include)
@@ -80,7 +80,7 @@
OUT_CFG := $(OUT_TARGET)/$(BUILDCFG)
-# Overwite path to linker script if custom is required, otherwise default from BSP is used
+# Overwite path to linker script if custom is required
ifeq ($(COMPILER), GCC_ARM)
LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/$(APP_NAME).ld)
else
diff --git a/boot/cypress/MCUBootApp/README.md b/boot/cypress/MCUBootApp/README.md
index 98ded66..9db4b4b 100644
--- a/boot/cypress/MCUBootApp/README.md
+++ b/boot/cypress/MCUBootApp/README.md
@@ -129,6 +129,32 @@
Root directory for build is **boot/cypress.**
+**Programming solution**
+
+There are couple ways of programming hex of MCUBootApp and BlinkyApp. Following instructions assume one of Cypress development kits, for example `CY8CPROTO_062_4343W`.
+
+1. Direct usage of OpenOCD.
+OpenOCD package is supplied with ModuToolbox IDE and can be found in installation folder under `./tools_2.1/openocd`.
+Open terminal application - and execute following command after substitution `PATH_TO_APPLICATION.hex` and `OPENOCD` paths.
+
+Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines.
+
+ export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
+
+ ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
+ -f ${OPENOCD}/scripts/interface/kitprog3.cfg \
+ -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \
+ -c "init; reset init; program PATH_TO_APPLICATION.hex" \
+ -c "resume; reset; exit"
+
+2. Using GUI tool `Cypress Programmer` - follow [link](https://www.cypress.com/products/psoc-programming-solutions) to download.
+ Connect board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check log to ensure programming success. Reset board.
+
+3. Using `DAPLINK`.
+ Connect board to your computer. Switch embeded Kitprog3 to `DAPLINK` mode by pressing `SW3 MODE` button until `LED2 STATUS` blinks fast and mass storage device appeared in OS. Drag and drop `hex` files you wish to program to `DAPLINK` drive in your OS.
+
+
+
**Currently supported platforms:**
* PSOC_062_2M
diff --git a/boot/cypress/MCUBootApp/cy_retarget_io_pdl.c b/boot/cypress/MCUBootApp/cy_retarget_io_pdl.c
new file mode 100644
index 0000000..2561ee5
--- /dev/null
+++ b/boot/cypress/MCUBootApp/cy_retarget_io_pdl.c
@@ -0,0 +1,244 @@
+/***************************************************************************//**
+* \file cy_retarget_io.c
+*
+* \brief
+* Provides APIs for retargeting stdio to UART hardware contained on the Cypress
+* kits.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#include "cy_retarget_io_pdl.h"
+
+#include "cycfg_peripherals.h"
+
+#include "cy_sysint.h"
+#include "cy_scb_uart.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Tracks the previous character sent to output stream */
+#ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+static char cy_retarget_io_stdout_prev_char = 0;
+#endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+
+cy_stc_scb_uart_context_t CYBSP_UART_context;
+
+static uint8_t cy_retarget_io_getchar(void);
+static void cy_retarget_io_putchar(char c);
+
+#if defined(__ARMCC_VERSION) /* ARM-MDK */
+ /***************************************************************************
+ * Function Name: fputc
+ ***************************************************************************/
+ __attribute__((weak)) int fputc(int ch, FILE *f)
+ {
+ (void)f;
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if ((char)ch == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = (char)ch;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar(ch);
+ return (ch);
+ }
+#elif defined (__ICCARM__) /* IAR */
+ #include <yfuns.h>
+
+ /***************************************************************************
+ * Function Name: __write
+ ***************************************************************************/
+ __weak size_t __write(int handle, const unsigned char * buffer, size_t size)
+ {
+ size_t nChars = 0;
+ /* This template only writes to "standard out", for all other file
+ * handles it returns failure. */
+ if (handle != _LLIO_STDOUT)
+ {
+ return (_LLIO_ERROR);
+ }
+ if (buffer != NULL)
+ {
+ for (/* Empty */; nChars < size; ++nChars)
+ {
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if (*buffer == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = *buffer;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar(*buffer);
+ ++buffer;
+ }
+ }
+ return (nChars);
+ }
+#else /* (__GNUC__) GCC */
+ /* Add an explicit reference to the floating point printf library to allow
+ the usage of floating point conversion specifier. */
+ __asm (".global _printf_float");
+ /***************************************************************************
+ * Function Name: _write
+ ***************************************************************************/
+ __attribute__((weak)) int _write (int fd, const char *ptr, int len)
+ {
+ int nChars = 0;
+ (void)fd;
+ if (ptr != NULL)
+ {
+ for (/* Empty */; nChars < len; ++nChars)
+ {
+ #ifdef CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+ if (*ptr == '\n' && cy_retarget_io_stdout_prev_char != '\r')
+ {
+ cy_retarget_io_putchar('\r');
+ }
+
+ cy_retarget_io_stdout_prev_char = *ptr;
+ #endif /* CY_RETARGET_IO_CONVERT_LF_TO_CRLF */
+ cy_retarget_io_putchar((uint32_t)*ptr);
+ ++ptr;
+ }
+ }
+ return (nChars);
+ }
+#endif
+
+
+#if defined(__ARMCC_VERSION) /* ARM-MDK */
+ /***************************************************************************
+ * Function Name: fgetc
+ ***************************************************************************/
+ __attribute__((weak)) int fgetc(FILE *f)
+ {
+ (void)f;
+ return (cy_retarget_io_getchar());
+ }
+#elif defined (__ICCARM__) /* IAR */
+ __weak size_t __read(int handle, unsigned char * buffer, size_t size)
+ {
+ /* This template only reads from "standard in", for all other file
+ handles it returns failure. */
+ if ((handle != _LLIO_STDIN) || (buffer == NULL))
+ {
+ return (_LLIO_ERROR);
+ }
+ else
+ {
+ *buffer = cy_retarget_io_getchar();
+ return (1);
+ }
+ }
+#else /* (__GNUC__) GCC */
+ /* Add an explicit reference to the floating point scanf library to allow
+ the usage of floating point conversion specifier. */
+ __asm (".global _scanf_float");
+ __attribute__((weak)) int _read (int fd, char *ptr, int len)
+ {
+ int nChars = 0;
+ (void)fd;
+ if (ptr != NULL)
+ {
+ for(/* Empty */;nChars < len;++ptr)
+ {
+ *ptr = (char)cy_retarget_io_getchar();
+ ++nChars;
+ if((*ptr == '\n') || (*ptr == '\r'))
+ {
+ break;
+ }
+ }
+ }
+ return (nChars);
+ }
+#endif
+
+static uint8_t cy_retarget_io_getchar(void)
+{
+ uint32_t read_value = Cy_SCB_UART_Get(CYBSP_UART_HW);
+ while (read_value == CY_SCB_UART_RX_NO_DATA)
+ {
+ read_value = Cy_SCB_UART_Get(CYBSP_UART_HW);
+ }
+
+ return (uint8_t)read_value;
+}
+
+static void cy_retarget_io_putchar(char c)
+{
+ uint32_t count = 0;
+ while (count == 0)
+ {
+ count = Cy_SCB_UART_Put(CYBSP_UART_HW, c);
+ }
+}
+
+static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate)
+{
+ cy_rslt_t status;
+
+ uint8_t oversample_value = 8u;
+ uint8_t frac_bits = 0u;
+ uint32_t divider;
+
+ Cy_SCB_UART_Disable(base, NULL);
+
+ Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_16_BIT, 0);
+
+ divider = ((Cy_SysClk_ClkPeriGetFrequency() * (1 << frac_bits)) + ((baudrate * oversample_value) / 2)) / (baudrate * oversample_value) - 1;
+
+ status = (cy_rslt_t) Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 0u, divider);
+
+ Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0u);
+
+ Cy_SCB_UART_Enable(base);
+
+ return status;
+}
+
+cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate)
+{
+ cy_rslt_t result;
+
+ /* Configure and enable UART */
+ (void)Cy_SCB_UART_Init(CYBSP_UART_HW, &CYBSP_UART_config, &CYBSP_UART_context);
+
+ cy_retarget_io_pdl_setbaud(CYBSP_UART_HW, baudrate);
+
+ Cy_SCB_UART_Enable(CYBSP_UART_HW);
+
+ result = CY_RSLT_SUCCESS;
+
+ return result;
+}
+
+void cy_retarget_io_pdl_deinit()
+{
+ Cy_SCB_UART_DeInit(CYBSP_UART_HW);
+}
+
+#if defined(__cplusplus)
+}
+#endif
diff --git a/boot/cypress/MCUBootApp/cy_retarget_io_pdl.h b/boot/cypress/MCUBootApp/cy_retarget_io_pdl.h
new file mode 100644
index 0000000..a12da22
--- /dev/null
+++ b/boot/cypress/MCUBootApp/cy_retarget_io_pdl.h
@@ -0,0 +1,60 @@
+/***************************************************************************//**
+* \file cy_retarget_io.h
+*
+* \brief
+* Provides APIs for transmitting messages to or from the board via standard
+* printf/scanf functions. Messages are transmitted over a UART connection which
+* is generally connected to a host machine. Transmission is done at 115200 baud
+* using the tx and rx pins provided by the user of this library. The UART
+* instance is made available via cy_retarget_io_uart_obj in case any changes
+* to the default configuration are desired.
+* NOTE: If the application is built using newlib-nano, by default, floating
+* point format strings (%f) are not supported. To enable this support you must
+* add '-u _printf_float' to the linker command line.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#pragma once
+
+#include <stdio.h>
+#include "cy_result.h"
+#include "cy_pdl.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/** UART baud rate */
+#define CY_RETARGET_IO_BAUDRATE (115200)
+
+/** Defining this macro enables conversion of line feed (LF) into carriage
+ * return followed by line feed (CR & LF) on the output direction (STDOUT). You
+ * can define this macro through the DEFINES variable in the application
+ * Makefile.
+ */
+#define CY_RETARGET_IO_CONVERT_LF_TO_CRLF
+
+cy_rslt_t cy_retarget_io_pdl_init(uint32_t baudrate);
+
+void cy_retarget_io_pdl_deinit(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/boot/cypress/MCUBootApp/cy_security_cnt.c b/boot/cypress/MCUBootApp/cy_security_cnt.c
new file mode 100644
index 0000000..9ccb3be
--- /dev/null
+++ b/boot/cypress/MCUBootApp/cy_security_cnt.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2020 Arm Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "bootutil/security_cnt.h"
+#include <stdint.h>
+
+int32_t
+boot_nv_security_counter_init(void)
+{
+ /* Do nothing. */
+ return 0;
+}
+
+int32_t
+boot_nv_security_counter_get(uint32_t image_id, uint32_t *security_cnt)
+{
+ (void)image_id;
+ *security_cnt = 30;
+
+ return 0;
+}
+
+int32_t
+boot_nv_security_counter_update(uint32_t image_id, uint32_t img_security_cnt)
+{
+ (void)image_id;
+ (void)img_security_cnt;
+
+ /* Do nothing. */
+ return 0;
+}
diff --git a/boot/cypress/MCUBootApp/libs.mk b/boot/cypress/MCUBootApp/libs.mk
index 96011b1..227cda6 100644
--- a/boot/cypress/MCUBootApp/libs.mk
+++ b/boot/cypress/MCUBootApp/libs.mk
@@ -27,38 +27,39 @@
# PDL library
################################################################################
PDL_VERSION = 121
-#
+
CUR_LIBS_PATH = $(CURDIR)/libs
MBEDTLS_PATH = $(CURDIR)/../../ext
# Collect source files for PDL
SOURCES_PDL := $(wildcard $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/*.c)
-# Collect source files for Retarget-io
-SOURCES_RETARGET_IO := $(wildcard $(CUR_LIBS_PATH)/retarget-io/*.c)
-
# PDL related include directories
INCLUDE_DIRS_PDL := $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/include
INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include/ip
INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include
INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/cmsis/include
-# Retarget-io related include directories
-INCLUDE_DIRS_RETARGET_IO := $(CUR_LIBS_PATH)/retarget-io
-
# core-libs related include directories
INCLUDE_DIRS_CORE_LIB := $(CUR_LIBS_PATH)/core-lib/include
+SOURCES_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_crypto_common.c
+SOURCES_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/cyhal_hwmgr.c
+
# Collected source files for libraries
SOURCES_LIBS := $(SOURCES_PDL)
SOURCES_LIBS += $(SOURCES_PLATFORM)
-SOURCES_LIBS += $(SOURCES_RETARGET_IO)
SOURCES_LIBS += $(SOURCES_HAL)
+# needed for Crypto HW Acceleration and headers inclusion, do not use for peripherals
+# peripherals should be accessed
+INCLUDE_DIRS_HAL := $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
+INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/include
+INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
+
# Collected include directories for libraries
INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_RETARGET_IO))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
diff --git a/boot/cypress/MCUBootApp/main.c b/boot/cypress/MCUBootApp/main.c
index 47f494a..e908d07 100644
--- a/boot/cypress/MCUBootApp/main.c
+++ b/boot/cypress/MCUBootApp/main.c
@@ -17,11 +17,9 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
-
/* Cypress pdl headers */
#include "cy_pdl.h"
-#include "cyhal.h"
-#include "cy_retarget_io.h"
+#include "cy_retarget_io_pdl.h"
#include "cy_result.h"
#include "sysflash/sysflash.h"
@@ -34,9 +32,9 @@
#include "bootutil/bootutil_log.h"
/* Define pins for UART debug output */
-
-#define CY_DEBUG_UART_TX (P5_1)
-#define CY_DEBUG_UART_RX (P5_0)
+#define CYBSP_UART_ENABLED 1U
+#define CYBSP_UART_HW SCB5
+#define CYBSP_UART_IRQ scb_5_interrupt_IRQn
static void do_boot(struct boot_rsp *rsp)
{
@@ -47,8 +45,6 @@
BOOT_LOG_INF("Starting User Application on CM4 (wait)...");
Cy_SysLib_Delay(100);
- cy_retarget_io_deinit();
-
Cy_SysEnableCM4(app_addr);
while (1)
@@ -59,14 +55,16 @@
int main(void)
{
- cy_rslt_t rc = !CY_RSLT_SUCCESS;
struct boot_rsp rsp ;
+ init_cycfg_clocks();
+ init_cycfg_peripherals();
+ init_cycfg_pins();
/* enable interrupts */
__enable_irq();
- /* Initialize retarget-io to use the debug UART port */
- cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE);
+ /* Initialize retarget-io to use the debug UART port (CYBSP_UART_HW) */
+ cy_retarget_io_pdl_init(115200u);
BOOT_LOG_INF("MCUBoot Bootloader Started");
diff --git a/boot/cypress/MCUBootApp/platforms.mk b/boot/cypress/MCUBootApp/platforms.mk
index fdd5a81..d4a70c5 100644
--- a/boot/cypress/MCUBootApp/platforms.mk
+++ b/boot/cypress/MCUBootApp/platforms.mk
@@ -23,7 +23,7 @@
# limitations under the License.
################################################################################
-# Target platform MCUBootApp is built for. PSOC_064_2M is set by default# Supported:
+# Target platform MCUBootApp is built for. PSOC_062_2M is set by default# Supported:
# - PSOC_062_2M
# default PLATFORM
@@ -35,7 +35,6 @@
CORE := CM0P
# Set paths for related folders
-CUR_LIBS_PATH := $(CURDIR)/libs
PLATFORM_PATH := $(CURDIR)/platforms
# MCU device selection, based on target device.
@@ -46,25 +45,13 @@
PLATFORM_SUFFIX := 02
endif
-# Additional components supported by the target
-COMPONENTS+=COMPONENT_BSP_DESIGN_MODUS
-# Use CyHAL
-DEFINES:=CY_USING_HAL
-
-# Collect C source files for PLATFORM BSP
+# Collect C source files for PLATFORM
SOURCES_PLATFORM += $(wildcard $(PLATFORM_PATH)/*.c)
-SOURCES_PLATFORM += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/*.c)
-SOURCES_PLATFORM += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/triggers/*.c)
-SOURCES_PLATFORM += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/pin_packages/*.c)
-
SOURCES_PLATFORM := $(filter-out %/system_psoc6_cm4.c, $(SOURCES_PLATFORM))
-# Collect dirrectories containing headers for PLATFORM BSP
+# Collect dirrectories containing headers for PLATFORM
INCLUDE_DIRS_PLATFORM := $(PLATFORM_PATH)
-INCLUDE_DIRS_PLATFORM += $(CUR_LIBS_PATH)/psoc6hal/include
-INCLUDE_DIRS_PLATFORM += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
-INCLUDE_DIRS_PLATFORM += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
-# Collect Assembler files for PLATFORM BSP
+# Collect Assembler files for PLATFORM
# Include _01_, _02_ or _03_ PLATFORM_SUFFIX depending on device family.
STARTUP_FILE := $(PLATFORM_PATH)/$(PLATFORM)/$(CORE)/$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_cm0plus
@@ -74,12 +61,11 @@
$(error Only GCC ARM is supported at this moment)
endif
-# Add device name from BSP makefile to defines
+# Add device name to defines
DEFINES += $(DEVICE)
-DEFINES += $(COMPONENTS)
DEFINES += $(PLATFORM)
-# Get defines from BSP makefile and convert it to regular -DMY_NAME style
+# Convert defines it to regular -DMY_NAME style
ifneq ($(DEFINES),)
DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES)))
endif
@@ -91,12 +77,6 @@
endif
ifeq ($(MAKEINFO) , 1)
-$(info ==============================================================================)
-$(info = BSP files =)
-$(info ==============================================================================)
$(info $(SOURCES_PLATFORM))
$(info $(ASM_FILES_PLATFORM))
endif
-
-# TODO: include appropriate BSP linker(s)
-# TODO: include appropriate BSP precompiled
diff --git a/boot/cypress/Makefile b/boot/cypress/Makefile
index d49a954..b91f279 100644
--- a/boot/cypress/Makefile
+++ b/boot/cypress/Makefile
@@ -69,7 +69,7 @@
C_FILES += $(SOURCES_LIBS)
INCLUDE_DIRS := $(INCLUDE_DIRS_APP)
-INCLUDE_DIRS += $(INCLUDES_DIRS_MCUBOOT)
+INCLUDE_DIRS += $(INCLUDE_DIRS_MCUBOOT)
INCLUDE_DIRS += $(INCLUDE_DIRS_LIBS)
#INCLUDE_FILES := $(INCLUDE_FILES_APP)
diff --git a/boot/cypress/platforms/cycfg_peripherals.c b/boot/cypress/platforms/cycfg_peripherals.c
new file mode 100644
index 0000000..1c55938
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_peripherals.c
@@ -0,0 +1,73 @@
+/*******************************************************************************
+* File Name: cycfg_peripherals.c
+*
+* Description:
+* Peripheral Hardware Block configuration
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.3.1.1499
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#include "cycfg_peripherals.h"
+
+const cy_stc_scb_uart_config_t CYBSP_UART_config =
+{
+ .uartMode = CY_SCB_UART_STANDARD,
+ .enableMutliProcessorMode = false,
+ .smartCardRetryOnNack = false,
+ .irdaInvertRx = false,
+ .irdaEnableLowPowerReceiver = false,
+ .oversample = 8,
+ .enableMsbFirst = false,
+ .dataWidth = 8UL,
+ .parity = CY_SCB_UART_PARITY_NONE,
+ .stopBits = CY_SCB_UART_STOP_BITS_1,
+ .enableInputFilter = false,
+ .breakWidth = 11UL,
+ .dropOnFrameError = false,
+ .dropOnParityError = false,
+ .receiverAddress = 0x0UL,
+ .receiverAddressMask = 0x0UL,
+ .acceptAddrInFifo = false,
+ .enableCts = false,
+ .ctsPolarity = CY_SCB_UART_ACTIVE_LOW,
+ .rtsRxFifoLevel = 0UL,
+ .rtsPolarity = CY_SCB_UART_ACTIVE_LOW,
+ .rxFifoTriggerLevel = 0UL,
+ .rxFifoIntEnableMask = 0UL,
+ .txFifoTriggerLevel = 63UL,
+ .txFifoIntEnableMask = 0UL,
+};
+#if defined (CY_USING_HAL)
+ const cyhal_resource_inst_t CYBSP_UART_obj =
+ {
+ .type = CYHAL_RSC_SCB,
+ .block_num = 5U,
+ .channel_num = 0U,
+ };
+#endif //defined (CY_USING_HAL)
+
+
+void init_cycfg_peripherals(void)
+{
+ Cy_SysClk_PeriphAssignDivider(PCLK_SCB5_CLOCK, CY_SYSCLK_DIV_16_BIT, 0U);
+#if defined (CY_USING_HAL)
+ cyhal_hwmgr_reserve(&CYBSP_UART_obj);
+#endif //defined (CY_USING_HAL)
+}
diff --git a/boot/cypress/platforms/cycfg_peripherals.h b/boot/cypress/platforms/cycfg_peripherals.h
new file mode 100644
index 0000000..41a0383
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_peripherals.h
@@ -0,0 +1,57 @@
+/*******************************************************************************
+* File Name: cycfg_peripherals.h
+*
+* Description:
+* Peripheral Hardware Block configuration
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.3.1.1499
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#if !defined(CYCFG_PERIPHERALS_H)
+#define CYCFG_PERIPHERALS_H
+
+// #include "cycfg_notices.h"
+#include "cy_scb_uart.h"
+#include "cy_sysclk.h"
+#if defined (CY_USING_HAL)
+ #include "cyhal_hwmgr.h"
+#endif //defined (CY_USING_HAL)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define CYBSP_UART_ENABLED 1U
+#define CYBSP_UART_HW SCB5
+#define CYBSP_UART_IRQ scb_5_interrupt_IRQn
+
+extern const cy_stc_scb_uart_config_t CYBSP_UART_config;
+#if defined (CY_USING_HAL)
+ extern const cyhal_resource_inst_t CYBSP_UART_obj;
+#endif //defined (CY_USING_HAL)
+
+void init_cycfg_peripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+#endif /* CYCFG_PERIPHERALS_H */
diff --git a/boot/cypress/platforms/cycfg_pins.c b/boot/cypress/platforms/cycfg_pins.c
new file mode 100644
index 0000000..771d772
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_pins.c
@@ -0,0 +1,89 @@
+/*******************************************************************************
+* File Name: cycfg_pins.c
+*
+* Description:
+* Pin configuration
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.3.1.1499
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#include "cycfg_pins.h"
+
+const cy_stc_gpio_pin_config_t CYBSP_UART_RX_config =
+{
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_HIGHZ,
+ .hsiom = CYBSP_UART_RX_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined (CY_USING_HAL)
+ const cyhal_resource_inst_t CYBSP_UART_RX_obj =
+ {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_UART_RX_PORT_NUM,
+ .channel_num = CYBSP_UART_RX_PIN,
+ };
+#endif //defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_UART_TX_config =
+{
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
+ .hsiom = CYBSP_UART_TX_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined (CY_USING_HAL)
+ const cyhal_resource_inst_t CYBSP_UART_TX_obj =
+ {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_UART_TX_PORT_NUM,
+ .channel_num = CYBSP_UART_TX_PIN,
+ };
+#endif //defined (CY_USING_HAL)
+
+void init_cycfg_pins(void)
+{
+ Cy_GPIO_Pin_Init(CYBSP_UART_RX_PORT, CYBSP_UART_RX_PIN, &CYBSP_UART_RX_config);
+#if defined (CY_USING_HAL)
+ cyhal_hwmgr_reserve(&CYBSP_UART_RX_obj);
+#endif //defined (CY_USING_HAL)
+
+ Cy_GPIO_Pin_Init(CYBSP_UART_TX_PORT, CYBSP_UART_TX_PIN, &CYBSP_UART_TX_config);
+#if defined (CY_USING_HAL)
+ cyhal_hwmgr_reserve(&CYBSP_UART_TX_obj);
+#endif //defined (CY_USING_HAL)
+}
diff --git a/boot/cypress/platforms/cycfg_pins.h b/boot/cypress/platforms/cycfg_pins.h
new file mode 100644
index 0000000..c214826
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_pins.h
@@ -0,0 +1,113 @@
+/*******************************************************************************
+* File Name: cycfg_pins.h
+*
+* Description:
+* Pin configuration
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.3.1.1499
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#if !defined(CYCFG_PINS_H)
+#define CYCFG_PINS_H
+
+#include "cy_gpio.h"
+#if defined (CY_USING_HAL)
+ #include "cyhal_hwmgr.h"
+#endif //defined (CY_USING_HAL)
+#include "cycfg_routing.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define CYBSP_UART_RX_ENABLED 1U
+#define CYBSP_UART_RX_PORT GPIO_PRT5
+#define CYBSP_UART_RX_PORT_NUM 5U
+#define CYBSP_UART_RX_PIN 0U
+#define CYBSP_UART_RX_NUM 0U
+#define CYBSP_UART_RX_DRIVEMODE CY_GPIO_DM_HIGHZ
+#define CYBSP_UART_RX_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_5_pin_0_HSIOM
+ #define ioss_0_port_5_pin_0_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_UART_RX_HSIOM ioss_0_port_5_pin_0_HSIOM
+#define CYBSP_UART_RX_IRQ ioss_interrupts_gpio_5_IRQn
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_RX_HAL_PORT_PIN P5_0
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_RX_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_RX_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_NONE
+#endif //defined (CY_USING_HAL)
+#define CYBSP_UART_TX_ENABLED 1U
+#define CYBSP_UART_TX_PORT GPIO_PRT5
+#define CYBSP_UART_TX_PORT_NUM 5U
+#define CYBSP_UART_TX_PIN 1U
+#define CYBSP_UART_TX_NUM 1U
+#define CYBSP_UART_TX_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
+#define CYBSP_UART_TX_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_5_pin_1_HSIOM
+ #define ioss_0_port_5_pin_1_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_UART_TX_HSIOM ioss_0_port_5_pin_1_HSIOM
+#define CYBSP_UART_TX_IRQ ioss_interrupts_gpio_5_IRQn
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_TX_HAL_PORT_PIN P5_1
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_TX_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_TX_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
+#endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+ #define CYBSP_UART_TX_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG
+#endif //defined (CY_USING_HAL)
+
+extern const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config;
+#if defined (CY_USING_HAL)
+ extern const cyhal_resource_inst_t CYBSP_WCO_IN_obj;
+#endif //defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config;
+#if defined (CY_USING_HAL)
+ extern const cyhal_resource_inst_t CYBSP_WCO_OUT_obj;
+#endif //defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_UART_RX_config;
+#if defined (CY_USING_HAL)
+ extern const cyhal_resource_inst_t CYBSP_UART_RX_obj;
+#endif //defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_UART_TX_config;
+#if defined (CY_USING_HAL)
+ extern const cyhal_resource_inst_t CYBSP_UART_TX_obj;
+#endif //defined (CY_USING_HAL)
+
+void init_cycfg_pins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+#endif /* CYCFG_PINS_H */
diff --git a/boot/cypress/platforms/cycfg_routing.c b/boot/cypress/platforms/cycfg_routing.c
new file mode 100644
index 0000000..063e736
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_routing.c
@@ -0,0 +1,31 @@
+/*******************************************************************************
+* File Name: cycfg_routing.c
+*
+* Description:
+* Establishes all necessary connections between hardware elements.
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.4.0.1889
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#include "cycfg_routing.h"
+
+void init_cycfg_routing(void)
+{
+}
diff --git a/boot/cypress/platforms/cycfg_routing.h b/boot/cypress/platforms/cycfg_routing.h
new file mode 100644
index 0000000..bfb2998
--- /dev/null
+++ b/boot/cypress/platforms/cycfg_routing.h
@@ -0,0 +1,46 @@
+/*******************************************************************************
+* File Name: cycfg_routing.h
+*
+* Description:
+* Establishes all necessary connections between hardware elements.
+* This file was automatically generated and should not be modified.
+* Device Configurator: 2.0.0.1483
+* Device Support Library (../../../psoc6pdl): 1.4.0.1889
+*
+********************************************************************************
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
+#if !defined(CYCFG_ROUTING_H)
+#define CYCFG_ROUTING_H
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+void init_cycfg_routing(void);
+
+#define init_cycfg_connectivity() init_cycfg_routing()
+
+#define ioss_0_port_5_pin_0_HSIOM P5_0_SCB5_UART_RX
+#define ioss_0_port_5_pin_1_HSIOM P5_1_SCB5_UART_TX
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+#endif /* CYCFG_ROUTING_H */