| commit | 85904a80578e0c35e8e33f4cb7394d279f4eb1f2 | [log] [tgz] |
|---|---|---|
| author | David Brown <david.brown@linaro.org> | Fri Jan 11 13:45:12 2019 -0700 |
| committer | David Brown <davidb@davidb.org> | Sat Jan 12 14:35:54 2019 -0700 |
| tree | 6eff00c0917c5db07efab91d8f6145117af48f6c | |
| parent | 8d0afa737c207c1f67b96f6a9e0de65a54e39264 [diff] [blame] |
sim: Remove more cfg around validate-slot-0 Turn some more conditional compilation into runtime decisions based on how the code being tested is compiled. Signed-off-by: David Brown <david.brown@linaro.org>
diff --git a/sim/src/caps.rs b/sim/src/caps.rs index dec879b..499add0 100644 --- a/sim/src/caps.rs +++ b/sim/src/caps.rs
@@ -11,6 +11,7 @@ OverwriteUpgrade = (1 << 4), EncRsa = (1 << 5), EncKw = (1 << 6), + ValidateSlot0 = (1 << 7), } impl Caps {