diff --git a/boot/cypress/BlinkyApp/BlinkyApp.mk b/boot/cypress/BlinkyApp/BlinkyApp.mk
new file mode 100644
index 0000000..f22e1e6
--- /dev/null
+++ b/boot/cypress/BlinkyApp/BlinkyApp.mk
@@ -0,0 +1,112 @@
+################################################################################
+# \file BlinkyApp.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe demo application BlinkyApp for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+# Cypress' MCUBoot Application supports GCC ARM only at this moment
+# Set defaults to:
+#     - compiler GCC
+#     - build configuration to Debug
+#     - image type to BOOT
+COMPILER ?= GCC_ARM
+IMG_TYPE ?= BOOT
+
+# image type can be BOOT or UPGRADE
+IMG_TYPES = BOOT UPGRADE
+
+# CypressBootloader Image ID to use for signing, defualt is ID for multi image
+CYB_IMG_ID ?= 16
+
+ifneq ($(COMPILER), GCC_ARM)
+$(error Only GCC ARM is supported at this moment)
+endif
+
+CUR_APP_PATH = $(CURDIR)/$(APP_NAME)
+
+include $(CUR_APP_PATH)/platforms.mk
+include $(CUR_APP_PATH)/libs.mk
+include $(CUR_APP_PATH)/toolchains.mk
+
+# Application-specific DEFINES
+ifeq ($(IMG_TYPE), BOOT)
+	DEFINES_APP := -DBOOT_IMG
+else
+	DEFINES_APP := -DUPGRADE_IMG
+endif
+
+# Define start of application, RAM start and size, slot size
+ifeq ($(PLATFORM), PSOC_062_2M)
+	DEFINES_APP += -DRAM_START=0x08000000
+	DEFINES_APP += -DRAM_SIZE=0x20000
+	DEFINES_APP += -DUSER_APP_START=0x10018000
+	SLOT_SIZE ?= 0x10000
+endif
+
+# Collect Test Application sources
+SOURCES_APP_SRC := $(wildcard $(CUR_APP_PATH)/*.c)
+# Collect all the sources
+SOURCES_APP += $(SOURCES_APP_SRC)
+
+# Collect includes for BlinkyApp
+INCLUDE_DIRS_APP := $(addprefix -I, $(CURDIR))
+INCLUDE_DIRS_APP += $(addprefix -I, $(CUR_APP_PATH))
+
+# Overwite path to linker script if custom is required, otherwise default from BSP is used
+ifeq ($(COMPILER), GCC_ARM)
+LINKER_SCRIPT := $(subst /cygdrive/c,c:,$(CUR_APP_PATH)/linker/$(APP_NAME).ld)
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+ASM_FILES_APP :=
+
+# We still need this for MCUBoot apps signing
+IMGTOOL_PATH ?=	../../scripts/imgtool.py
+
+SIGN_ARGS := sign --header-size 1024 --pad-header --align 8 -v "2.0" -S $(SLOT_SIZE) -M 512 --overwrite-only -R 0 -k keys/$(SIGN_KEY_FILE).pem
+
+# Output folder
+OUT := $(APP_NAME)/out
+# Output folder to contain build artifacts
+OUT_TARGET := $(OUT)/$(PLATFORM)
+
+OUT_CFG := $(OUT_TARGET)/$(BUILDCFG)
+
+# Set build directory for BOOT and UPGRADE images
+ifeq ($(IMG_TYPE), UPGRADE)
+	SIGN_ARGS += --pad
+	UPGRADE_SUFFIX :=_upgrade
+	OUT_CFG := $(OUT_CFG)/upgrade
+else
+	OUT_CFG := $(OUT_CFG)/boot
+endif
+
+pre_build:
+	$(info [PRE_BUILD] - Generating linker script for application $(CUR_APP_PATH)/linker/$(APP_NAME).ld)
+	@$(CC) -E -x c $(CFLAGS) $(INCLUDE_DIRS) $(CUR_APP_PATH)/linker/$(APP_NAME)_template.ld | grep -v '^#' >$(CUR_APP_PATH)/linker/$(APP_NAME).ld
+
+# Post build action to execute after main build job
+post_build: $(OUT_CFG)/$(APP_NAME).hex
+	$(info [POST_BUILD] - Executing post build script for $(APP_NAME))
+	mv -f $(OUT_CFG)/$(APP_NAME).hex $(OUT_CFG)/$(APP_NAME)_unsigned.hex
+	$(PYTHON_PATH) $(IMGTOOL_PATH) $(SIGN_ARGS) $(OUT_CFG)/$(APP_NAME)_unsigned.hex $(OUT_CFG)/$(APP_NAME)$(UPGRADE_SUFFIX).hex
diff --git a/boot/cypress/BlinkyApp/Readme.md b/boot/cypress/BlinkyApp/Readme.md
new file mode 100644
index 0000000..2431481
--- /dev/null
+++ b/boot/cypress/BlinkyApp/Readme.md
@@ -0,0 +1,124 @@
+### Blinking LED test application for MCUBoot Bootloader.
+
+**Description:**
+
+Implements simple Blinky LED CM4 application to demonstrate MCUBoot Application and CypressBootloader operation in terms of BOOT and UPGRADE process.
+
+It is started by MCUBoot Application or CypressBootloader which is running on CM0p.
+
+Functionality:
+
+* Blinks RED led with 2 different rates, depending on type of image - BOOT or UPGRADE.
+* Prints debug info and version of itself to terminal at 115200 baud.
+* Can be built for BOOT slot or UPGRADE slot of bootloader.
+
+**Currently supported platforms:**
+
+* PSOC_062_2M
+
+**Pre-build action:**
+
+Pre-build action is implemented for defining start address and size of flash, as well as RAM start address and size for BlinkyApp.
+These values are set by specifing following macros: `-DUSER_APP_SIZE`, `-DUSER_APP_START`, `-DRAM_SIZE`, `-DRAM_START` in makefile.
+
+Pre-build action calls GCC preprocessor which intantiates defines for particular values in `BlinkyApp_template.ld`.
+
+Default values set for currently supported targets:
+* PSOC_062_2M in `BlinkyApp.mk` to `-DUSER_APP_START=0x10018000`
+
+**Building an application:**
+
+Root directory for build is **boot/cypress.**
+
+The following command will build regular HEX file of a BlinkyApp for BOOT slot:
+
+    make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT
+
+This have following defaults suggested:
+
+    BUILDCFG=Debug
+    IMG_TYPE=BOOT
+
+To build UPGRADE image use following command:
+
+    make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE HEADER_OFFSET=0x10000
+
+    Note: HEADER_OFFSET=%SLOT_SIZE%
+
+Example command-line for single-image:
+
+    make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT
+
+**Building Multi-Image**
+
+`BlinkyApp` can be built to use in multi-image bootloader configuration.
+
+To get appropriate artifacts to use with multi image MCUBootApp, makefile flag `HEADER_OFFSET=` can be used.
+
+Example usage:
+
+Considering default config:
+
+* first image BOOT (PRIMARY) slot start `0x10018000`
+* slot size `0x10000`
+* second image BOOT (PRIMARY) slot start `0x10038000`
+
+To get appropriate artifact for second image PRIMARY slot run this command:
+
+    make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=BOOT HEADER_OFFSET=0x20000
+
+*Note:* only 2 images are supported at the moment.
+
+**Post-Build:**
+
+Post build action is executed at compile time for `BlinkyApp`. In case of build for `PSOC_062_2M` platform it calls `imgtool` from `MCUBoot` scripts and adds signature to compiled image.
+
+Flags passed to `imgtool` for signature are defined in `SIGN_ARGS` variable in BlinkyApp.mk.
+
+**How to program an application:**
+
+Use any preferred tool for programming hex files.
+
+Hex file names to use for programming:
+
+`BlinkyApp` always produce build artifacts in 2 separate folders - `boot` and `upgrade`.
+
+`BlinkyApp` built to run with `MCUBootApp` produces files with name BlinkyApp.hex in `boot` directory and `BlinkyApp_upgrade.hex` in `upgrade` folder. These files are ready to be flashed to the board. 
+
+`BlinkyApp_unsigned.hex` hex file is also preserved in both cases for possible troubleshooting.
+
+Files to use for programming are:
+
+`BOOT` - boot/BlinkyApp.hex
+`UPGRADE` - upgrade/BlinkyApp_upgrade.hex
+
+**Flags:**
+- `BUILDCFG` - configuration **Release** or **Debug**
+- `MAKEINFO` - 0 (default) - less build info, 1 - verbose output of compilation.
+- `HEADER_OFFSET` - 0 (default) - no offset of output hex file, 0x%VALUE% - offset for output hex file. Value 0x10000 is slot size MCUBoot Bootloader in this example.
+- `IMG_TYPE` - `BOOT` (default) - build image for BOOT slot of MCUBoot Bootloader, `UPGRADE` - build image for UPGRADE slot of MCUBoot Bootloader.
+
+**NOTE**: In case of `UPGRADE` image `HEADER_OFFSET` should be set to MCUBoot Bootloader slot size.
+
+**Example terminal output:**
+
+When user application programmed in BOOT slot:
+
+    ===========================
+    [BlinkyApp] BlinkyApp v1.0 [CM4]
+    ===========================
+    [BlinkyApp] GPIO initialized
+    [BlinkyApp] UART initialized
+    [BlinkyApp] Retarget I/O set to 115200 baudrate
+    [BlinkyApp] Red led blinks with 1 sec period
+
+When user application programmed in UPRADE slot and upgrade procedure was successful:
+
+    ===========================
+    [BlinkyApp] BlinkyApp v2.0 [+]
+    ===========================
+
+    [BlinkyApp] GPIO initialized
+    [BlinkyApp] UART initialized
+    [BlinkyApp] Retarget I/O set to 115200 baudrate
+    [BlinkyApp] Red led blinks with 0.25 sec period
diff --git a/boot/cypress/BlinkyApp/libs.mk b/boot/cypress/BlinkyApp/libs.mk
new file mode 100644
index 0000000..0fbcf75
--- /dev/null
+++ b/boot/cypress/BlinkyApp/libs.mk
@@ -0,0 +1,89 @@
+################################################################################
+# \file libs.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe libraries needed for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+################################################################################
+# PDL library
+################################################################################
+PDL_VERSION = 121
+#
+CUR_LIBS_PATH = $(CURDIR)/libs
+
+# Collect source files for PDL
+SOURCES_PDL := $(wildcard $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/*.c)
+
+# Collect source files for Retarget-io
+SOURCES_RETARGET_IO := $(wildcard $(CUR_LIBS_PATH)/retarget-io/*.c)
+
+# Collect source files for HAL
+SOURCES_HAL := $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/*.c)
+SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/triggers/*.c)
+SOURCES_HAL += $(wildcard $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/source/pin_packages/*.c)
+
+# PDL related include directories
+INCLUDE_DIRS_PDL := $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/include
+INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include/ip
+INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/devices/include
+INCLUDE_DIRS_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/cmsis/include
+
+# Retarget-io related include directories
+INCLUDE_DIRS_RETARGET_IO := $(CUR_LIBS_PATH)/retarget-io
+
+# core-libs related include directories
+INCLUDE_DIRS_CORE_LIB := $(CUR_LIBS_PATH)/core-lib/include
+
+# Collect dirrectories containing headers for PSOC6 HAL
+INCLUDE_DIRS_HAL := $(CUR_LIBS_PATH)/psoc6hal/include
+INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include
+INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/pin_packages
+INCLUDE_DIRS_HAL += $(CUR_LIBS_PATH)/psoc6hal/COMPONENT_PSOC6HAL/include/triggers
+
+# Collected source files for libraries
+SOURCES_LIBS := $(SOURCES_PDL)
+SOURCES_LIBS += $(SOURCES_PLATFORM)
+SOURCES_LIBS += $(SOURCES_RETARGET_IO)
+SOURCES_LIBS += $(SOURCES_HAL)
+
+# Collected include directories for libraries
+INCLUDE_DIRS_LIBS := $(addprefix -I,$(INCLUDE_DIRS_PDL))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_PLATFORM))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_RETARGET_IO))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_CORE_LIB))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL))
+
+ASM_FILES_PDL :=
+ifeq ($(COMPILER), GCC_ARM)
+ASM_FILES_PDL += $(CUR_LIBS_PATH)/pdl/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+ASM_FILES_LIBS := $(ASM_FILES_PDL)
+ASM_FILES_LIBS += $(ASM_FILES_PLATFORM)
+
+# Add define for PDL version
+DEFINES_PDL += -DPDL_VERSION=$(PDL_VERSION)
+
+DEFINES_LIBS := $(DEFINES_PLATFORM)
+DEFINES_LIBS += $(DEFINES_PDL)
diff --git a/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld b/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
new file mode 100644
index 0000000..81fbc22
--- /dev/null
+++ b/boot/cypress/BlinkyApp/linker/BlinkyApp_template.ld
@@ -0,0 +1,425 @@
+/***************************************************************************//**
+* \file cy8c6xxa_cm4_dual.ld
+* \version 2.60
+*
+* Linker file for the GNU C compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point location is fixed and starts at 0x10000000. The valid
+* application image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+#include <main.h>
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+ENTRY(Reset_Handler)
+
+/* Size of the stack section at the end of CM4 SRAM */
+STACK_SIZE = 0x1000;
+
+/* The size of the MCU boot header area at the start of FLASH */
+BOOT_HEADER_SIZE = 0x400;
+
+/* Force symbol to be entered in the output file as an undefined symbol. Doing
+* this may, for example, trigger linking of additional modules from standard
+* libraries. You may list several symbols for each EXTERN, and you may use
+* EXTERN multiple times. This command has the same effect as the -u command-line
+* option.
+*/
+EXTERN(Reset_Handler)
+
+/* The MEMORY section below describes the location and size of blocks of memory in the target.
+* Use this section to specify the memory regions available for allocation.
+*/
+MEMORY
+{
+    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
+     * You can change the memory allocation by editing the 'ram' and 'flash' regions.
+     * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
+     * Using this memory region for other purposes will lead to unexpected behavior.
+     * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
+     * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
+     */
+    ram               (rwx)   : ORIGIN = RAM_START, LENGTH = RAM_SIZE
+    flash             (rx)    : ORIGIN = USER_APP_START, LENGTH = USER_APP_SIZE
+
+    /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
+     * You can assign sections to this memory region for only one of the cores.
+     * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
+     * Therefore, repurposing this memory region will prevent such middleware from operation.
+     */
+    em_eeprom         (rx)    : ORIGIN = 0x14000000, LENGTH = 0x8000       /*  32 KB */
+
+    /* The following regions define device specific memory regions and must not be changed. */
+    sflash_user_data  (rx)    : ORIGIN = 0x16000800, LENGTH = 0x800        /* Supervisory flash: User data */
+    sflash_nar        (rx)    : ORIGIN = 0x16001A00, LENGTH = 0x200        /* Supervisory flash: Normal Access Restrictions (NAR) */
+    sflash_public_key (rx)    : ORIGIN = 0x16005A00, LENGTH = 0xC00        /* Supervisory flash: Public Key */
+    sflash_toc_2      (rx)    : ORIGIN = 0x16007C00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 */
+    sflash_rtoc_2     (rx)    : ORIGIN = 0x16007E00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 Copy */
+    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
+    efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+
+
+SECTIONS
+{
+    /* Cortex-M4 application flash area */
+    .text ORIGIN(flash) + BOOT_HEADER_SIZE :
+    {
+        . = ALIGN(4);
+        __Vectors = . ;
+        KEEP(*(.vectors))
+        . = ALIGN(4);
+        __Vectors_End = .;
+        __Vectors_Size = __Vectors_End - __Vectors;
+        __end__ = .;
+
+        . = ALIGN(4);
+        *(.text*)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* Read-only code (constants). */
+        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+        KEEP(*(.eh_frame*))
+    } > flash
+
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > flash
+
+    __exidx_start = .;
+
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > flash
+    __exidx_end = .;
+
+
+    /* To copy multiple ROM to RAM sections,
+     * uncomment .copy.table section and,
+     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm4.S */
+    .copy.table :
+    {
+        . = ALIGN(4);
+        __copy_table_start__ = .;
+
+        /* Copy interrupt vectors from flash to RAM */
+        LONG (__Vectors)                                    /* From */
+        LONG (__ram_vectors_start__)                        /* To   */
+        LONG (__Vectors_End - __Vectors)                    /* Size */
+
+        /* Copy data section to RAM */
+        LONG (__etext)                                      /* From */
+        LONG (__data_start__)                               /* To   */
+        LONG (__data_end__ - __data_start__)                /* Size */
+
+        __copy_table_end__ = .;
+    } > flash
+
+
+    /* To clear multiple BSS sections,
+     * uncomment .zero.table section and,
+     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm4.S */
+    .zero.table :
+    {
+        . = ALIGN(4);
+        __zero_table_start__ = .;
+        LONG (__bss_start__)
+        LONG (__bss_end__ - __bss_start__)
+        __zero_table_end__ = .;
+    } > flash
+
+    __etext =  . ;
+
+
+    .ramVectors (NOLOAD) : ALIGN(8)
+    {
+        __ram_vectors_start__ = .;
+        KEEP(*(.ram_vectors))
+        __ram_vectors_end__   = .;
+    } > ram
+
+
+    .data __ram_vectors_end__ : AT (__etext)
+    {
+        __data_start__ = .;
+
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+        . = ALIGN(4);
+
+        KEEP(*(.cy_ramfunc*))
+        . = ALIGN(4);
+
+        __data_end__ = .;
+
+    } > ram
+
+
+    /* Place variables in the section that should not be initialized during the
+    *  device startup.
+    */
+    .noinit (NOLOAD) : ALIGN(8)
+    {
+      KEEP(*(.noinit))
+    } > ram
+
+
+    /* The uninitialized global or static variables are placed in this section.
+    *
+    * The NOLOAD attribute tells linker that .bss section does not consume
+    * any space in the image. The NOLOAD attribute changes the .bss type to
+    * NOBITS, and that  makes linker to A) not allocate section in memory, and
+    * A) put information to clear the section with all zeros during application
+    * loading.
+    *
+    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
+    * This  makes linker to A) allocate zeroed section in memory, and B) copy
+    * this section to RAM during application loading.
+    */
+    .bss (NOLOAD):
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > ram
+
+
+    .heap (NOLOAD):
+    {
+        __HeapBase = .;
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
+        __HeapLimit = .;
+    } > ram
+
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (NOLOAD):
+    {
+        KEEP(*(.stack*))
+    } > ram
+
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(ram) + LENGTH(ram);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+
+
+    /* Used for the digital signature of the secure application and the Bootloader SDK application.
+    * The size of the section depends on the required data size. */
+    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
+    {
+        KEEP(*(.cy_app_signature))
+    } > flash
+
+
+    /* Emulated EEPROM Flash area */
+    .cy_em_eeprom :
+    {
+        KEEP(*(.cy_em_eeprom))
+    } > em_eeprom
+
+
+    /* Supervisory Flash: User data */
+    .cy_sflash_user_data :
+    {
+        KEEP(*(.cy_sflash_user_data))
+    } > sflash_user_data
+
+
+    /* Supervisory Flash: Normal Access Restrictions (NAR) */
+    .cy_sflash_nar :
+    {
+        KEEP(*(.cy_sflash_nar))
+    } > sflash_nar
+
+
+    /* Supervisory Flash: Public Key */
+    .cy_sflash_public_key :
+    {
+        KEEP(*(.cy_sflash_public_key))
+    } > sflash_public_key
+
+
+    /* Supervisory Flash: Table of Content # 2 */
+    .cy_toc_part2 :
+    {
+        KEEP(*(.cy_toc_part2))
+    } > sflash_toc_2
+
+
+    /* Supervisory Flash: Table of Content # 2 Copy */
+    .cy_rtoc_part2 :
+    {
+        KEEP(*(.cy_rtoc_part2))
+    } > sflash_rtoc_2
+
+
+    /* Places the code in the Execute in Place (XIP) section. See the smif driver
+    *  documentation for details.
+    */
+    .cy_xip :
+    {
+        KEEP(*(.cy_xip))
+    } > xip
+
+
+    /* eFuse */
+    .cy_efuse :
+    {
+        KEEP(*(.cy_efuse))
+    } > efuse
+
+
+    /* These sections are used for additional metadata (silicon revision,
+    *  Silicon/JTAG ID, etc.) storage.
+    */
+    .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE
+}
+
+
+/* The following symbols used by the cymcuelftool. */
+/* Flash */
+__cy_memory_0_start    = 0x10000000;
+__cy_memory_0_length   = 0x00200000;
+__cy_memory_0_row_size = 0x200;
+
+/* Emulated EEPROM Flash area */
+__cy_memory_1_start    = 0x14000000;
+__cy_memory_1_length   = 0x8000;
+__cy_memory_1_row_size = 0x200;
+
+/* Supervisory Flash */
+__cy_memory_2_start    = 0x16000000;
+__cy_memory_2_length   = 0x8000;
+__cy_memory_2_row_size = 0x200;
+
+/* XIP */
+__cy_memory_3_start    = 0x18000000;
+__cy_memory_3_length   = 0x08000000;
+__cy_memory_3_row_size = 0x200;
+
+/* eFuse */
+__cy_memory_4_start    = 0x90700000;
+__cy_memory_4_length   = 0x100000;
+__cy_memory_4_row_size = 1;
+
+/* EOF */
diff --git a/boot/cypress/BlinkyApp/main.c b/boot/cypress/BlinkyApp/main.c
new file mode 100644
index 0000000..936511d
--- /dev/null
+++ b/boot/cypress/BlinkyApp/main.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2020 Cypress Semiconductor Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ /*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+ /*******************************************************************************/
+
+#include "system_psoc6.h"
+#include "cy_pdl.h"
+#include "cyhal.h"
+#include "cy_retarget_io.h"
+
+/* Define pins for UART debug output */
+
+#define CY_DEBUG_UART_TX (P5_1)
+#define CY_DEBUG_UART_RX (P5_0)
+
+#if defined(PSOC_062_2M)
+#warning "Check if User LED is correct for your target board."
+#define LED_PORT GPIO_PRT13
+#define LED_PIN 7U
+#endif
+
+#define LED_NUM 5U
+#define LED_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
+#define LED_INIT_DRIVESTATE 1
+
+const cy_stc_gpio_pin_config_t LED_config =
+{
+    .outVal = 1,
+    .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
+    .hsiom = HSIOM_SEL_GPIO,
+    .intEdge = CY_GPIO_INTR_DISABLE,
+    .intMask = 0UL,
+    .vtrip = CY_GPIO_VTRIP_CMOS,
+    .slewRate = CY_GPIO_SLEW_FAST,
+    .driveSel = CY_GPIO_DRIVE_FULL,
+    .vregEn = 0UL,
+    .ibufMode = 0UL,
+    .vtripSel = 0UL,
+    .vrefSel = 0UL,
+    .vohSel = 0UL,
+};
+
+#ifdef BOOT_IMG
+    #define BLINK_PERIOD          (1000u)
+    #define GREETING_MESSAGE_VER  "[BlinkyApp] BlinkyApp v1.0 [CM4]\r\n"
+    #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 1 sec period\r\n"
+#elif UPGRADE_IMG
+    #define BLINK_PERIOD          (250u)
+    #define GREETING_MESSAGE_VER  "[BlinkyApp] BlinkyApp v2.0 [+]\r\n"
+    #define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 0.25 sec period\r\n"
+#else
+    #error "[BlinkyApp] Please specify type of image: -DBOOT_IMG or -DUPGRADE_IMG\r\n"
+#endif
+
+void check_result(int res)
+{
+    if (res != CY_RSLT_SUCCESS)
+    {
+        CY_ASSERT(0);
+    }
+}
+
+void test_app_init_hardware(void)
+{
+    /* enable interrupts */
+    __enable_irq();
+
+    /* Disabling watchdog so it will not interrupt normal flow later */
+    Cy_GPIO_Pin_Init(LED_PORT, LED_PIN, &LED_config);
+    /* Initialize retarget-io to use the debug UART port */
+    check_result(cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX,
+                                     CY_RETARGET_IO_BAUDRATE));
+
+    printf("\n===========================\r\n");
+    printf(GREETING_MESSAGE_VER);
+    printf("===========================\r\n");
+
+    printf("[BlinkyApp] GPIO initialized \r\n");
+    printf("[BlinkyApp] UART initialized \r\n");
+    printf("[BlinkyApp] Retarget I/O set to 115200 baudrate \r\n");
+
+}
+
+int main(void)
+{
+    uint32_t blinky_period = BLINK_PERIOD;
+
+    test_app_init_hardware();
+
+    printf(GREETING_MESSAGE_INFO);
+
+    for (;;)
+    {
+        /* Toggle the user LED periodically */
+        Cy_SysLib_Delay(blinky_period/2);
+
+        /* Invert the USER LED state */
+        Cy_GPIO_Inv(LED_PORT, LED_PIN);
+    }
+    return 0;
+}
diff --git a/boot/cypress/BlinkyApp/main.h b/boot/cypress/BlinkyApp/main.h
new file mode 100644
index 0000000..4fafb4e
--- /dev/null
+++ b/boot/cypress/BlinkyApp/main.h
@@ -0,0 +1,25 @@
+/*
+\copyright
+* Copyright 2017-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#ifndef USER_APP_START
+#define USER_APP_START 0x10000000
+#endif
+
+#ifndef USER_APP_SIZE
+#define USER_APP_SIZE  0x10000
+#endif
\ No newline at end of file
diff --git a/boot/cypress/BlinkyApp/platforms.mk b/boot/cypress/BlinkyApp/platforms.mk
new file mode 100644
index 0000000..2f4faf9
--- /dev/null
+++ b/boot/cypress/BlinkyApp/platforms.mk
@@ -0,0 +1,109 @@
+################################################################################
+# \file targets.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe supported boards and platforms for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+# Target PLATFORM BlinkyApp is built for. PSOC_064_2M is set as default
+# Supported:
+#	- PSOC_064_2M
+#	- PSOC_064_1M
+#	- PSOC_064_512K
+#	- PSOC_062_2M
+
+# default TARGET
+PLATFORM ?= PSOC_064_2M
+#
+SB_PLATFORMS := PSOC_064_2M PSOC_064_1M PSOC_064_512K
+PLATFORMS := PSOC_062_2M $(SB_PLATFORMS)
+
+# For which core this application is built
+CORE := CM4
+
+# Set paths for related folders
+CUR_LIBS_PATH := $(CURDIR)/libs
+PLATFORMS_PATH := $(CURDIR)/platforms
+PLATFORM_PATH := $(PLATFORMS_PATH)/$(PLATFORM)
+
+# Target dependent definitions
+ifeq ($(PLATFORM), PSOC_064_2M)
+DEVICE ?= CYB0644ABZI-S2D44
+PLATFORM_SUFFIX := 02
+else ifeq ($(PLATFORM), PSOC_064_1M)
+DEVICE ?= CYB06447BZI-BLD53
+PLATFORM_SUFFIX := 01
+else ifeq ($(PLATFORM), PSOC_064_512K)
+DEVICE ?= CYB06445LQI-S3D42
+PLATFORM_SUFFIX := 03
+else ifeq ($(PLATFORM), PSOC_062_2M)
+DEVICE ?= CY8C624ABZI-D44
+PLATFORM_SUFFIX := 02
+endif
+
+# Check if path to cysecuretools is set in case Secure Boot target
+ifneq ($(filter $(PLATFORM), $(SB_PLATFORMS)),)
+ifeq ($(CY_SEC_TOOLS_PATH), )
+$(error Variable CY_SEC_TOOLS_PATH - path to cysecuretools package not set. \
+		Use `python -m pip show cysecuretools` to determine intallation folder.` \
+		Then set it in Makefile to continue work.)
+endif
+endif
+
+# Collect C source files for PLATFORM
+SOURCES_PLATFORM += $(wildcard $(PLATFORMS_PATH)/*.c)
+SOURCES_PLATFORM += $(wildcard $(PLATFORM_PATH)/$(CORE)/*.c)
+# Exclude system file for cm4
+SOURCES_PLATFORM := $(filter-out %/system_psoc6_cm0plus.c, $(SOURCES_PLATFORM))
+
+# Collect dirrectories containing headers for PLATFORM
+INCLUDE_DIRS_PLATFORM := $(PLATFORMS_PATH)
+INCLUDE_DIRS_PLATFORM += $(PLATFORM_PATH)/$(CORE)
+
+# Collect Assembler files for PLATFORM
+STARTUP_FILE := $(PLATFORM_PATH)/$(CORE)/$(COMPILER)/startup_psoc6_$(PLATFORM_SUFFIX)_cm4
+
+ifeq ($(COMPILER), GCC_ARM)
+	ASM_FILES_PLATFORM := $(STARTUP_FILE).S
+else
+$(error Only GCC ARM is supported at this moment)
+endif
+
+# Add device name from PLATFORM makefile to defines
+DEFINES += $(DEVICE)
+
+# Get defines from PLATFORM makefile and convert it to regular -DMY_NAME style
+ifneq ($(DEFINES),)
+	DEFINES_PLATFORM :=$(addprefix -D, $(subst -,_,$(DEFINES)))
+endif
+
+DEFINES_PLATFORM += $(addprefix -D, $(PLATFORM))
+
+ifneq ($(COMPILER), GCC_ARM)
+$(error Only GCC ARM is supported at this moment)
+endif
+ifeq ($(MAKEINFO) , 1)
+$(info ==============================================================================)
+$(info = PLATFORM files =)
+$(info ==============================================================================)
+$(info $(SOURCES_PLATFORM))
+$(info $(ASM_FILES_PLATFORM))
+endif
diff --git a/boot/cypress/BlinkyApp/toolchains.mk b/boot/cypress/BlinkyApp/toolchains.mk
new file mode 100644
index 0000000..3868436
--- /dev/null
+++ b/boot/cypress/BlinkyApp/toolchains.mk
@@ -0,0 +1,128 @@
+################################################################################
+# \file toolchains.mk
+# \version 1.0
+#
+# \brief
+# Makefile to describe supported toolchains for Cypress MCUBoot based applications.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+# Compilers
+GCC_ARM	:= 1
+IAR		:= 2
+ARM		:= 3
+OTHER 	:= 4
+
+ifeq ($(MAKEINFO), 1)
+$(info $(COMPILER))
+endif
+# Detect host OS to make resolving compiler pathes easier
+UNAME_S := $(shell uname -s)
+ifeq ($(UNAME_S), Darwin)
+	HOST_OS = osx
+else
+	ifeq ($(UNAME_S), Linux)
+		HOST_OS = linux
+	else
+		HOST_OS = win
+	endif
+endif
+
+# Path to the compiler installation
+# NOTE: Absolute pathes for now for the sake of development
+ifeq ($(HOST_OS), win)
+	ifeq ($(COMPILER), GCC_ARM)
+		TOOLCHAIN_PATH ?= c:/Users/$(USERNAME)/ModusToolbox_1.0/tools/gcc-7.2.1-1.0
+		MY_TOOLCHAIN_PATH:=$(subst \,/,$(TOOLCHAIN_PATH))
+		TOOLCHAIN_PATH := $(MY_TOOLCHAIN_PATH)
+		GCC_PATH := $(TOOLCHAIN_PATH)
+		# executables
+		CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
+		LD := $(CC)
+
+	else ifeq ($(COMPILER), IAR)
+		IAR_PATH := C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0/arm
+		# executables
+		CC := "$(IAR_PATH)/bin/iccarm.exe"
+		AS := "$(IAR_PATH)/bin/iasmarm.exe"
+		LD := "$(IAR_PATH)/bin/ilinkarm.exe"
+	endif
+
+else ifeq ($(HOST_OS), osx)
+	TOOLCHAIN_PATH ?= /opt/gcc-arm-none-eabi
+	GCC_PATH := $(TOOLCHAIN_PATH)
+
+	CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
+	LD := $(CC)
+
+else ifeq ($(HOST_OS), linux)
+	TOOLCHAIN_PATH ?= /usr/bin/gcc-arm-none-eabi/bin/arm-none-eabi-gcc
+	GCC_PATH := $(TOOLCHAIN_PATH)
+	# executables
+	CC := "$(GCC_PATH)/bin/arm-none-eabi-gcc"
+	LD := $(CC)
+endif
+
+PDL_ELFTOOL := "hal/tools/$(HOST_OS)/elf/cymcuelftool"
+
+OBJDUMP  := "$(GCC_PATH)/bin/arm-none-eabi-objdump"
+OBJCOPY  := "$(GCC_PATH)/bin/arm-none-eabi-objcopy"
+
+# Set flags for toolchain executables
+ifeq ($(COMPILER), GCC_ARM)
+	# set build-in compiler flags
+	CFLAGS_COMMON := -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -fno-stack-protector -ffunction-sections -fdata-sections -ffat-lto-objects -fstrict-aliasing -g -Wall -Wextra
+	ifeq ($(BUILDCFG), Debug)
+		CFLAGS_COMMON += -Og -g3
+	else ifeq ($(BUILDCFG), Release)
+		CFLAGS_COMMON += -Os -g
+	else
+		$(error BUILDCFG : '$(BUILDCFG)' is not supported)
+	endif
+	# add defines and includes
+	CFLAGS := $(CFLAGS_COMMON) $(INCLUDES)
+	CC_DEPEND = -MD -MP -MF
+
+	LDFLAGS_COMMON := -mcpu=cortex-m4 -mthumb -specs=nano.specs -ffunction-sections -fdata-sections  -Wl,--gc-sections -L "$(GCC_PATH)/lib/gcc/arm-none-eabi/7.2.1/thumb/v6-m" -ffat-lto-objects -g --enable-objc-gc
+	ifeq ($(BUILDCFG), Debug)
+		LDFLAGS_COMMON += -Og
+	else ifeq ($(BUILDCFG), Release)
+		LDFLAGS_COMMON += -Os
+	else
+		$(error BUILDCFG : '$(BUILDCFG)' is not supported)
+	endif
+	LDFLAGS_NANO := -L "$(GCC_PATH)/arm-none-eabi/lib/thumb/v6-m"
+	LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_NANO)
+
+else ifeq ($(COMPILER), IAR)
+
+	CFLAGS := --debug --endian=little --cpu=Cortex-M4 -e --fpu=None --dlib_config "$(IAR_PATH)\INC\c\DLib_Config_Normal.h"
+	CFLAGS += -Ohz --silent
+	CFLAGS += $(INCLUDES)
+	CC_DEPEND = --dependencies
+
+	AS_FLAGS := -s+ "-M<>" -w+ -r --cpu Cortex-M4 --fpu None -S
+
+	LINKER_SCRIPT := $(CHIP_SERIES).icf
+
+	#options to extend stack analize: --log call_graph --log_file $(OUT)/stack_usage_$(SUFFIX).txt
+	LDFLAGS_STACK_USAGE := --stack_usage_control $(STACK_CONTROL_FILE) --diag_suppress=Ls015 --diag_suppress=Ls016
+	LDFLAGS_COMMON := --vfe --text_out locale --silent --inline --merge_duplicate_sections
+	LDFLAGS := $(LDFLAGS_COMMON) $(LDFLAGS_STACK_USAGE) --config $(LINKER_SCRIPT) --map $(OUT_TARGET)/$(APP_NAME).map --entry Cy_FB_ResetHandler --no_exceptions
+endif