Infineon: Switch to 1.9.0 code base, add xmc7000 family support, refactor memory layer
diff --git a/boot/cypress/MCUBootApp/ExternalMemory.md b/boot/cypress/MCUBootApp/ExternalMemory.md
index bfc8162..9a339b3 100644
--- a/boot/cypress/MCUBootApp/ExternalMemory.md
+++ b/boot/cypress/MCUBootApp/ExternalMemory.md
@@ -70,23 +70,23 @@
On CYW20829 platform XIP mode is always used due to absence of internal memory.
-This is optional for PSoC™ 6 devices. The JSON flash map should contain `"mode": "XIP"` in the `"external_flash" section`. `USE_XIP` flag is added to auto-generated `flashmap.mk` on pre-build action.
+This is optional for PSoC™ 6 devices. The JSON flash map should contain `"mode": "XIP"` in the `"external_flash" section`. `USE_XIP` flag is added to auto-generated `memorymap.mk` on pre-build action.
When XIP mode is used primary slot of an image can be placed in external memory.
-This repository provides default flash map files with suffix _xip_ to be used for XIP mode in `platforms/cy_flash_pal/flash_%platform_name%/flashmap`.
+This repository provides default flash map files with suffix _xip_ to be used for XIP mode in `platforms/memory/flash_%platform_name%/flashmap`.
#### How to enable external memory support
-External memory is enabled when `make` flag `USE_EXTERNAL_FLASH` is set to `1`. Value of this flag is set in auto-generated `flashmap.mk` files when field `"external_flash"` is present in JSON file.
+External memory is enabled when `make` flag `USE_EXTERNAL_FLASH` is set to `1`. Value of this flag is set in auto-generated `memorymap.mk` files when field `"external_flash"` is present in JSON file.
-Default flash maps with suffix _smif_ are provided in `platforms/cy_flash_pal/flash_psoc6/flashmap` folder for PSoC™ 6 devices, where presense of external memory in system is optional.
+Default flash maps with suffix _smif_ are provided in `platforms/memory/PSOC6/flashmap` folder for PSoC™ 6 devices, where presense of external memory in system is optional.
Build MCUBootApp as described in the [MCUBootApp.md](MCUBootApp.md) file.
**Building an upgrade image for external memory:**
- make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE ERASED_VALUE=0xff FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single_smif.json IMG_ID=1
+ make app APP_NAME=BlinkyApp PLATFORM=PSOC_062_2M IMG_TYPE=UPGRADE ERASED_VALUE=0xff FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single_smif.json IMG_ID=1
`ERASED_VALUE` - Defines the memory cell contents in the erased state. It is `0x00` for PSoC™ 6 internal flash and `0xff` for S25FL512S.
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.md b/boot/cypress/MCUBootApp/MCUBootApp.md
index c07cb9e..3422afb 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.md
+++ b/boot/cypress/MCUBootApp/MCUBootApp.md
@@ -20,6 +20,7 @@
* `CYBLE-416045-EVAL`
* `CY8CPROTO-063-BLE`
* `CY8CKIT-062-BLE`
+* `KIT_XMC72_EVK`
### Platfrom specifics
@@ -31,7 +32,7 @@
The flash map of the bootloader is defined at compile-time and cannot be changed dynamically. Flash map is prepared in the industry-accepted JSON (JavaScript Object Notation) format. It should follow the rules described in section **How to modify the flash map**.
-`MCUBootApp` contains JSON templates for flash maps with commonly used configurations. They can be found in `platforms/cy_flash_pal/flash_%platform_name%/flashmap` The slots' sizes are defined per platform to be compatible with all supported device families.
+`MCUBootApp` contains JSON templates for flash maps with commonly used configurations. They can be found in `platforms/memory/flash_%platform_name%/flashmap` The slots' sizes are defined per platform to be compatible with all supported device families.
The actual addresses are provided in corresponding platform doc files:
@@ -101,12 +102,6 @@
There also should be a mandatory `"bootloader"` section, describing the location and size of `MCUBootApp` in the `"address"` and `"size"` parameters, respectively.
-Under some circumstances (e.g., PSoC™ 62 with application slots in both internal and external flash memories), the slot address must be properly aligned, as the image trailer should start exactly at the erase block boundary. When an improper address is specified, `make` will fail with a message like:
-```
-Misaligned application_1 (secondary slot) - suggested address 0x18030200
-```
-This gives the nearest larger address that satisfies the slot location requirements. Other errors, such as overlapping flash areas, are also checked and reported.
-
###### Scratch area
The scratch area location and size are given in the `"scratch_address"` and `"scratch_size"` parameters of the `"bootloader"` subsection.
For example:
@@ -264,8 +259,6 @@
```
The purpose of such a layout is to allow MCUBoot to understand what image is placed in the shared secondary slot. While secondary images now can (and should) overlap, their trailers must under no circumstances share the same address!
-Normally image trailer occupies the whole erase block (e.g. 512 bytes for PSoC™ 62 internal Flash, or 256 kilobytes for SEMPER™ Secure NOR Flash). There is a specific case when images are placed in both memory types, refer to the [PSOC6.md](../platforms/PSOC6.md) file.
-
One can declare all secondary slots as shared using the following JSON syntax:
```
@@ -395,11 +388,11 @@
```
###### Flash map internals
-When the `FLASH_MAP=` option is supplied to `make`, it involves the Python script `boot/cypress/scripts/flashmap.py`. It takes the JSON file and converts flash map into the C header file `boot/cypress/platforms/cy_flash_pal/cy_flash_map.h`.
+When the `FLASH_MAP=` option is supplied to `make`, it involves the Python script `boot/cypress/scripts/memorymap.py`. It takes the JSON file and converts flash map into the C header file `boot/cypress/platforms/memory/memory.h`.
-At the same time it creates the `boot/cypress/MCUBootApp/flashmap.mk`, which is conditionally included from the `boot/cypress/MCUBootApp/MCUBootApp.mk`. The generated file contains various definitions derived from the flash map, such as `MCUBOOT_IMAGE_NUMBER`, `MAX_IMG_SECTORS`, `USE_EXTERNAL_FLASH`, and `USE_XIP`. So, there is no need to specify these and similar parameters manually.
+At the same time it creates the `boot/cypress/MCUBootApp/memorymap.mk`, which is conditionally included from the `boot/cypress/MCUBootApp/MCUBootApp.mk`. The generated file contains various definitions derived from the flash map, such as `MCUBOOT_IMAGE_NUMBER`, `MAX_IMG_SECTORS`, `USE_EXTERNAL_FLASH`, and `USE_XIP`. So, there is no need to specify these and similar parameters manually.
-Do not edit either `sysflash/cy_flash_map.h` or `flashmap.mk`, as both files are overwritten on every build.
+Do not edit either `sysflash/memory.h` or `memorymap.mk`, as both files are overwritten on every build.
#### External flash
@@ -436,7 +429,7 @@
Multi-image operation considers upgrading and verification of more than one image on a device.
-Single or multi-image mode is dictated by the `MCUBOOT_IMAGE_NUMBER` `make` flag. This flag's value is set in an auto-generated `flashmap.mk` file per flash map used. There is no need to pass it manually.
+Single or multi-image mode is dictated by the `MCUBOOT_IMAGE_NUMBER` `make` flag. This flag's value is set in an auto-generated `memorymap.mk` file per flash map used. There is no need to pass it manually.
In Multi-image operation, up to four images are supported.
@@ -464,7 +457,7 @@
`#define MCUBOOT_OVERWRITE_ONLY 1`
-This flag's value is set in an auto-generated `flashmap.mk` file per flash map used. There is no need to pass it manually.
+This flag's value is set in an auto-generated `memorymap.mk` file per flash map used. There is no need to pass it manually.
In Overwrite-only mode, MCUBootApp first checks if any upgrade image is present in the secondary slot(s), then validates the digital signature of the upgrade image in the secondary slot(s). If validation is successful, MCUBootApp starts copying the secondary slot content to the primary slot. After the copy is done, MCUBootApp starts the upgrade image execution from the primary slot.
@@ -579,6 +572,16 @@
If there is a need to wipe out the product and flash new firmware directly to the primary (BOOT) slot, the device is transferred to the `Empty` or `Ready` state and then walks through all the states again.
+### Software limitation
+For both internal and external flash memories, the slot address must be properly aligned, as the image trailer should occupy a separate sector.
+
+Normally image trailer occupies the whole erase block (e.g. 512 bytes for PSoC™ 62 internal Flash, or 256 kilobytes for SEMPER™ Secure NOR Flash). There is a specific case when images are placed in both memory types, refer to the [PSOC6.md](../platforms/PSOC6.md) file.
+
+When an improper address is specified, `make` will fail with a message like:
+```
+Misaligned application_1 (secondary slot) - suggested address 0x18030200
+```
+This gives the nearest larger address that satisfies the slot location requirements. Other errors, such as overlapping flash areas, are also checked and reported.
### Hardware limitations
This application is created to demonstrate the MCUboot library features and not as a reference example. So, some considerations are taken.
@@ -616,12 +619,12 @@
1. Choose Upgrade mode and number of images.
-`platforms/cy_flash_pal/flash_%platform_name%/flashmap` folder contains a set of predefined flash map JSON files with suffixes _overwrite_ or _swap_ for upgrade methods and _single_ or _multi_ for images number in its names. Depending on the file chosen upgrade method and images number are configured:
+`platforms/memory/flash_%platform_name%/flashmap` folder contains a set of predefined flash map JSON files with suffixes _overwrite_ or _swap_ for upgrade methods and _single_ or _multi_ for images number in its names. Depending on the file chosen upgrade method and images number are configured:
`USE_OVERWRITE` `make` flag is set to 1 or 0 for `overwrite` or `swap` mode;
`MCUBOOT_IMAGE_NUMBER` flag is set to a number of corresponding `application_#` sections in the flash map file.
-These flag values are set in an auto-generated `flashmap.mk` file per flash map used. There is no need to pass them manually.
+These flag values are set in an auto-generated `memorymap.mk` file per flash map used. There is no need to pass them manually.
__NOTE__: Do not use flash map JSON files with suffixes xip or smif for `PSoC™ 063` kits.
@@ -629,9 +632,9 @@
Pass `USE_CRYPTO_HW=1` to the `make` command. This option is temporarily disabled by default - see paragraph **Hardware cryptography acceleration**.
-Additionally, users can configure hardware rollback protection on the supported platforms. To do this flash map file from `platforms/cy_flash_pal/flash_%platform_name%/flashmap/hw_rollback_prot` folder should be used.
+Additionally, users can configure hardware rollback protection on the supported platforms. To do this flash map file from `platforms/memory/flash_%platform_name%/flashmap/hw_rollback_prot` folder should be used.
-`USE_HW_ROLLBACK_PROT` `make` flag is set to 1 in auto-generated `flashmap.mk`.
+`USE_HW_ROLLBACK_PROT` `make` flag is set to 1 in auto-generated `memorymap.mk`.
The rollback protection feature is currently supported on CYW20829 devices in Secure mode only.
@@ -641,49 +644,58 @@
Toolchain is set by default in `toolchains.mk` file, depending on `COMPILER` makefile variable. MCUBoot is currently support only `GCC_ARM` as compiler. Toolchain path can be redefined, by setting `TOOLCHAIN_PATH` build flag to desired toolchain path. Below is an example on how to set toolchain path from **ModusToolbox™ IDE 3.0**:
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single.json TOOLCHAIN_PATH=c:/Users/$(USERNAME)/ModusToolbox/tools_3.0/gcc
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single.json TOOLCHAIN_PATH=c:/Users/${USERNAME}/ModusToolbox/tools_3.0/gcc
* Build MCUBootApp in the `Debug` configuration for Single-image mode with swap upgrade.
`PSoC™ 062`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single.json
`PSoC™ 063`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_063_1M BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_063_1M BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single.json
+
+ `XMC7200`
+
+ make clean app APP_NAME=MCUBootApp PLATFORM=XMC7200 BUILDCFG=Debug FLASH_MAP=platforms/memory/XMC7000/flashmap/xmc7000_swap_single.json PLATFORM_CONFIG=platforms/memory/XMC7000/flashmap/xmc7200_platform.json CORE=CM0P APP_CORE=CM7 APP_CORE_ID=0
+
+ `XMC7100`
+
+ make clean app APP_NAME=MCUBootApp PLATFORM=XMC7100 BUILDCFG=Debug FLASH_MAP=platforms/memory/XMC7000/flashmap/xmc7000_swap_single.json PLATFORM_CONFIG=platforms/memory/XMC7000/flashmap/xmc7100_platform.json CORE=CM0P APP_CORE=CM7 APP_CORE_ID=0
* Build MCUBootApp in `Release` configuration for Multi-image mode with overwriting update.
`PSoC™ 062`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_overwrite_multi.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_overwrite_multi.json
`PSoC™ 063`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_063_1M BUILDCFG=Release FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_overwrite_multi.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_063_1M BUILDCFG=Release FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_overwrite_multi.json
+
* Build MCUBootApp in `Debug` configuration for Single-image mode with swap upgrade and in `smif` mode.
`PSoC™ 062`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single_smif.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single_smif.json
`PSoC™ 063`
Supported only for `PLATFORM=PSOC_063_1M DEVICE=CY8C6347BZI-BLD53`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_1M DEVICE=CY8C6347BZI-BLD53 BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_swap_single_smif.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_1M DEVICE=CY8C6347BZI-BLD53 BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_swap_single_smif.json
`NOTE:` PSOC_062_1M platform is used here since kit, where particular MPN is installed is called CY8CKIT-062-BLE
* Build MCUBootApp in `Debug` configuration for Single-image mode with swap upgrade and in `xip` mode.
`PSoC™ 062`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_xip_swap.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_xip_swap.json
`PSoC™ 063`
- make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_1M DEVICE=CY8C6347BZI-BLD53 BUILDCFG=Debug FLASH_MAP=platforms/cy_flash_pal/flash_psoc6/flashmap/psoc6_xip_swap.json
+ make clean app APP_NAME=MCUBootApp PLATFORM=PSOC_062_1M DEVICE=CY8C6347BZI-BLD53 BUILDCFG=Debug FLASH_MAP=platforms/memory/PSOC6/flashmap/psoc6_xip_swap.json
`NOTE:` PSOC_062_1M platform is used here since kit, where particular MPN is installed is called CY8CKIT-062-BLE
The root directory for the build is `boot/cypress`.
@@ -716,13 +728,13 @@
`DEVICE` - is used to set a particular MPN for a platform since multiple MPNs are associated with one platform, for example:
`PLATFORM=PSOC_062_1M DEVICE=CY8C6347BZI-BLD53`
-The next flags will be set by script in auto-generated makefile 'flashmap.mk':
+The next flags will be set by script in auto-generated makefile 'memorymap.mk':
`MCUBOOT_IMAGE_NUMBER` - The number of images to be supported by the current build of MCUBootApp.
`USE_OVERWRITE` - `0` - Use swap with Scratch upgrade mode, `1` - use Overwrite only upgrade.
`USE_EXTERNAL_FLASH` - When set to `1`, it enables the external memory support on the PSoC™ 6 platform. This value is always set to `1` on CYW20829.
`USE_HW_ROLLBACK_PROT` - When set to `1`, it enables the hardware rollback protection on the CYW20829 platform with Secure mode enabled.
-Adding `clean` to `make` will clean the build folder, and files boot/cypress/MCUBootApp/flashmap.mk and boot/cypress/platforms/cy_flash_pal/cy_flash_map.h will be removed and re-generated.
+Adding `clean` to `make` will clean the build folder, and files boot/cypress/MCUBootApp/memorymap.mk and boot/cypress/platforms/memory/memorymap.h will be removed and re-generated.
### Programming solution
diff --git a/boot/cypress/MCUBootApp/MCUBootApp.mk b/boot/cypress/MCUBootApp/MCUBootApp.mk
index a90e488..dfac125 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp.mk
+++ b/boot/cypress/MCUBootApp/MCUBootApp.mk
@@ -33,29 +33,31 @@
CUR_APP_PATH = $(PRJ_DIR)/$(APP_NAME)
-ifneq ($(FLASH_MAP), )
-#to 'Bit_per_cnt' generation for CYW20829
-ifeq ($(PLATFORM), CYW20829)
-$(CUR_APP_PATH)/flashmap.mk:
- $(PYTHON_PATH) scripts/flashmap.py -p $(PLATFORM) -i $(FLASH_MAP) -o $(PRJ_DIR)/platforms/cy_flash_pal/cy_flash_map.h -c $(PRJ_DIR)/policy/policy_secure.json > $(CUR_APP_PATH)/flashmap.mk
-else
-$(CUR_APP_PATH)/flashmap.mk:
- $(PYTHON_PATH) scripts/flashmap.py -p $(PLATFORM) -m -i $(FLASH_MAP) -o $(PRJ_DIR)/platforms/cy_flash_pal/cy_flash_map.h > $(CUR_APP_PATH)/flashmap.mk
-endif
-include $(CUR_APP_PATH)/flashmap.mk
-DEFINES_APP := -DCY_FLASH_MAP_JSON
-endif
+-include $(CUR_APP_PATH)/memorymap.mk
MCUBOOT_IMAGE_NUMBER ?= 1
ENC_IMG ?= 0
+USE_HW_KEY ?= 0
USE_BOOTSTRAP ?= 1
MCUBOOT_LOG_LEVEL ?= MCUBOOT_LOG_LEVEL_DEBUG
USE_SHARED_SLOT ?= 0
+FIH_PROFILE_LEVEL_LIST := OFF LOW MEDIUM HIGH
+FIH_PROFILE_LEVEL ?= MEDIUM
ifneq ($(COMPILER), GCC_ARM)
$(error Only GCC ARM is supported at this moment)
endif
+# Check FIH profile param
+ifneq ($(filter $(FIH_PROFILE_LEVEL), $(FIH_PROFILE_LEVEL_LIST)),)
+ifneq ($(FIH_PROFILE_LEVEL), OFF)
+DEFINES_APP += -DMCUBOOT_FIH_PROFILE_ON
+DEFINES_APP += -DMCUBOOT_FIH_PROFILE_$(FIH_PROFILE_LEVEL)
+endif
+else
+$(error Wrong FIH_PROFILE_LEVEL param)
+endif
+
# Output folder
OUT := $(APP_NAME)/out
# Output folder to contain build artifacts
@@ -64,6 +66,21 @@
OUT_CFG := $(OUT_TARGET)/$(BUILDCFG)
include $(PRJ_DIR)/platforms.mk
+
+ifneq ($(FLASH_MAP), )
+ifeq ($(FAMILY), CYW20829)
+$(CUR_APP_PATH)/memorymap.mk:
+ $(PYTHON_PATH) scripts/memorymap.py -p $(PLATFORM) -i $(FLASH_MAP) -o $(PRJ_DIR)/platforms/memory/memorymap.c -a $(PRJ_DIR)/platforms/memory/memorymap.h -c $(PRJ_DIR)/policy/policy_secure.json > $(CUR_APP_PATH)/memorymap.mk
+else ifeq ($(FAMILY), XMC7000)
+$(CUR_APP_PATH)/memorymap.mk:
+ $(PYTHON_PATH) scripts/memorymap_rework.py run -p $(PLATFORM_CONFIG) -i $(FLASH_MAP) -o $(PRJ_DIR)/platforms/memory -n memorymap > $(CUR_APP_PATH)/memorymap.mk
+else
+$(CUR_APP_PATH)/memorymap.mk:
+ $(PYTHON_PATH) scripts/memorymap.py -p $(PLATFORM) -m -i $(FLASH_MAP) -o $(PRJ_DIR)/platforms/memory/memorymap.c -a $(PRJ_DIR)/platforms/memory/memorymap.h > $(CUR_APP_PATH)/memorymap.mk
+endif
+DEFINES_APP += -DCY_FLASH_MAP_JSON
+endif
+
include $(PRJ_DIR)/common_libs.mk
include $(PRJ_DIR)/toolchains.mk
@@ -74,10 +91,14 @@
# Application-specific DEFINES
DEFINES_APP += -DMBEDTLS_CONFIG_FILE="\"mcuboot_crypto_config.h\""
DEFINES_APP += -DECC256_KEY_FILE="\"keys/$(SIGN_KEY_FILE).pub\""
-DEFINES_APP += -D$(CORE)
+DEFINES_APP += -DBOOT_$(CORE)
DEFINES_APP += -DAPP_$(APP_CORE)
+DEFINES_APP += -DAPP_CORE_ID=$(APP_CORE_ID)
DEFINES_APP += -DMCUBOOT_IMAGE_NUMBER=$(MCUBOOT_IMAGE_NUMBER)
DEFINES_APP += -DUSE_SHARED_SLOT=$(USE_SHARED_SLOT)
+DEFINES_APP += -DMCUBOOT_PLATFORM_CHUNK_SIZE=$(PLATFORM_CHUNK_SIZE)
+DEFINES_APP += -DMEMORY_ALIGN=$(PLATFORM_MEMORY_ALIGN)
+DEFINES_APP += -DPLATFORM_MAX_TRAILER_PAGE_SIZE=$(PLATFORM_MAX_TRAILER_PAGE_SIZE)
# Define MCUboot size and pass it to linker script
LDFLAGS_DEFSYM += -Wl,--defsym,BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
@@ -137,6 +158,12 @@
SOURCES_LIBS += $(SOURCES_MBEDTLS_MXCRYPTO)
endif
+# Use key provisioned in device to verify images
+ifeq ($(USE_HW_KEY), 1)
+DEFINES_APP=-DMCUBOOT_HW_KEY
+
+endif
+
# Compile with user redefined values for UART HW, port, pins
ifeq ($(USE_CUSTOM_DEBUG_UART), 1)
DEFINES_APP += -DUSE_CUSTOM_DEBUG_UART=1
@@ -186,6 +213,7 @@
# Collect MCUBoot sourses
SOURCES_MCUBOOT := $(wildcard $(PRJ_DIR)/../bootutil/src/*.c)
+
# Collect MCUBoot Application sources
SOURCES_APP_SRC := main.c keys.c
ifeq ($(USE_EXEC_TIME_CHECK), 1)
@@ -193,18 +221,16 @@
SOURCES_APP_SRC += misc/timebase_us.c
endif
-# Collect Flash Layer sources and header files dirs
-INCLUDE_DIRS_FLASH := $(PLATFORM_INCLUDE_DIRS_FLASH)
INCLUDE_DIRS_UTILS := $(PLATFORM_INCLUDE_DIRS_UTILS)
-SOURCES_FLASH := $(PLATFORM_SOURCES_FLASH)
# Collect all the sources
SOURCES_APP := $(SOURCES_MCUBOOT)
-SOURCES_APP += $(SOURCES_FLASH)
SOURCES_APP += $(addprefix $(CUR_APP_PATH)/, $(SOURCES_APP_SRC))
SOURCES_APP += $(PLATFORM_APP_SOURCES)
INCLUDE_DIRS_MCUBOOT := $(addprefix -I, $(PRJ_DIR)/../bootutil/include)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/../bootutil/include/bootutil)
+INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/../bootutil/include/bootutil/crypto)
INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/../bootutil/src)
INCLUDE_DIRS_MCUBOOT += $(addprefix -I, $(PRJ_DIR)/..)
@@ -222,6 +248,9 @@
ifeq ($(COMPILER), GCC_ARM)
LDFLAGS += $(LDFLAGS_DEFSYM)
LINKER_SCRIPT := $(CUR_APP_PATH)/$(APP_NAME)_$(CORE).ld
+ifeq ($(FAMILY), XMC7000)
+LINKER_SCRIPT := $(PRJ_DIR)/platforms/BSP/$(FAMILY)/system/COMPONENT_$(CORE)/TOOLCHAIN_$(COMPILER)/linker.ld
+endif
else
$(error Only GCC ARM is supported at this moment)
endif
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
index d721274..c6e3361 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM0P.ld
@@ -64,8 +64,8 @@
* where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'.
*/
ram (rwx) : ORIGIN = 0x08000A00, LENGTH = 0x1F600
- flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x17E90
- smif_struct (rx) : ORIGIN = 0x10017E90, LENGTH = 0x170
+ flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x27E90
+ smif_struct (rx) : ORIGIN = 0x10027E90, LENGTH = 0x170
/* This is an unprotected public RAM region, with the placed .cy_sharedmem.
* This region is used to place objects that require full access from both cores.
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch b/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch
new file mode 100644
index 0000000..cde42b8
--- /dev/null
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM0P_Debug.launch
@@ -0,0 +1,62 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off set remotetimeout 15"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${cy_tools_path:openocd}/bin/openocd"/>
+ <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s "${openocd_path}/../scripts" -c "set QSPI_FLASHLOADER bsps/TARGET_APP_KIT_XMC72_EVK/config/GeneratedSource/CAT1C_SMIF.FLM" -c "source [find interface/kitprog3.cfg]" -c "transport select swd" -c "puts stderr {Started by GNU MCU Eclipse}" -c "source [find target/cat1c.cfg]" -c "gdb_port 3333" -c "cat1c sflash_restrictions 1" -c "init; reset init""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+ <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value="mon reset run mon cat1c reset_halt sysresetreq flushregs mon gdb_sync stepi"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="init"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+ <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="./out/PSOC_062_2M/Debug/MCUBootApp.elf"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:CY_TOOL_arm-none-eabi-gdb_EXE}"/>
+ <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+ <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+ <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+ <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="/Users/rnok/repos/xmc7200/cy_mcuboot/boot/cypress/MCUBootApp/out/XMC7200/Debug/MCUBootApp.elf"/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="cy_mcuboot"/>
+ <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+ <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+ <listEntry value="/cy_mcuboot"/>
+ </listAttribute>
+ <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+ <listEntry value="4"/>
+ </listAttribute>
+ <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"> <memoryBlockExpression address="268828484" label="0x1005ff44"/> <memoryBlockExpression address="268697600" label="0x10040000"/> </memoryBlockExpressionList> "/>
+ <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld
index db3671f..83be8e4 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM33.ld
@@ -186,6 +186,7 @@
*cy_smif_sfdp.o(.text*)
*cy_gpio.o(.text*)
*cy_smif_hybrid_sect.o(.text*)
+ *fault_injection_hardening.o(.text*)
. = ALIGN(4);
__app_text_ram_end__ = .;
@@ -319,6 +320,7 @@
*cy_smif_sfdp.o(.text*)
*cy_gpio.o(.text*)
*cyhal_system.o(.text*)
+ *fault_injection_hardening.o(.text*)
*lib_a-memset.o(.text*)
*lib_a-memcpy-stub.o(.text*)
@@ -368,6 +370,7 @@
*cy_gpio.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
*cycfg_qspi_memslot.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
*cyhal_system.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+ *fault_injection_hardening.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
*lib_a-memset.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
*lib_a-memcpy-stub.o(.data* .rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
@@ -402,6 +405,7 @@
*cy_smif_memslot.o(.bss* COMMON)
*cy_smif_sfdp.o(.bss* COMMON)
*cy_gpio.o(.bss* COMMON)
+ *fault_injection_hardening.o(.bss* COMMON)
*lib_a-memset.o(.bss* COMMON)
*lib_a-memcpy-stub.o(.bss* COMMON)
KEEP(*(.cy_l1bss*))
@@ -423,7 +427,7 @@
. = ALIGN(4);
__text_begin = .;
- *(EXCLUDE_FILE(*cy_smif.o *cy_smif_memslot.o *cy_smif_sfdp.o *cy_gpio.o *cy_smif_hybrid_sect.o) .text*)
+ *(EXCLUDE_FILE(*cy_smif.o *cy_smif_memslot.o *cy_smif_sfdp.o *cy_gpio.o *cy_smif_hybrid_sect.o *fault_injection_hardening.o) .text*)
KEEP(*(.init))
KEEP(*(.fini))
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM4.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM4.ld
index 95b4b19..06a074b 100644
--- a/boot/cypress/MCUBootApp/MCUBootApp_CM4.ld
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM4.ld
@@ -317,14 +317,6 @@
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
- /* Used for the digital signature of the secure application and the Bootloader SDK application.
- * The size of the section depends on the required data size. */
- .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
- {
- KEEP(*(.cy_app_signature))
- } > flash
-
-
/* Emulated EEPROM Flash area */
.cy_em_eeprom :
{
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CM7.ld b/boot/cypress/MCUBootApp/MCUBootApp_CM7.ld
new file mode 100644
index 0000000..6b6de37
--- /dev/null
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CM7.ld
@@ -0,0 +1,432 @@
+/***************************************************************************//**
+* \file xmc7200d_x8384_cm7.ld
+* \version 1.0.0
+*
+* Linker file for the GNU C compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point location is fixed and starts at 0x10000000. The valid
+* application image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2021 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lgcc -lc -lnosys )
+SEARCH_DIR(.)
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+ENTRY(Reset_Handler)
+
+/* The size of the stack section at the end of CM7 SRAM */
+STACK_SIZE = 0x1000;
+RAMVECTORS_ALIGNMENT = 128;
+
+sram_start_reserve = 0;
+
+sram_total_size = 0x00100000; /* SRAM0 + SRAM1 */
+sram_private_for_srom = 0x00000800; /* Private SRAM for SROM (e.g. API processing) */
+sram_used_by_boot = 0x0; /* Used during boot by Cypress firmware (content will be overwritten on reset, so it should not be used for loadable sections in case of RAM build configurations) */
+
+cm0plus_sram_reserve = 0x00020000; /* cm0 sram size */
+cm7_0_sram_reserve = 0x00030000; /* cm7_0 sram size */
+
+code_flash_total_size = 0x00830000;
+cm0plus_code_flash_reserve = 0x00080000;
+cm7_0_code_flash_reserve = 0x00200000;
+
+code_flash_base_address = 0x10000000;
+sram_base_address = 0x28000000;
+
+/* SRAM reservations */
+_base_SRAM_CM7_0 = sram_base_address + cm0plus_sram_reserve;
+_size_SRAM_CM7_0 = cm7_0_sram_reserve;
+/* In case of single CM7 device CM7_1 values should not be used */
+_base_SRAM_CM7_1 = sram_base_address + cm0plus_sram_reserve + cm7_0_sram_reserve;
+_size_SRAM_CM7_1 = sram_total_size - cm0plus_sram_reserve - cm7_0_sram_reserve;
+
+/* Code flash reservations */
+_base_CODE_FLASH_CM0P = code_flash_base_address;
+_size_CODE_FLASH_CM0P = cm0plus_code_flash_reserve;
+_base_CODE_FLASH_CM7_0 = code_flash_base_address + cm0plus_code_flash_reserve;
+_size_CODE_FLASH_CM7_0 = cm7_0_code_flash_reserve;
+_base_CODE_FLASH_CM7_1 = code_flash_base_address + cm0plus_code_flash_reserve + cm7_0_code_flash_reserve;
+_size_CODE_FLASH_CM7_1 = code_flash_total_size - cm0plus_code_flash_reserve - cm7_0_code_flash_reserve;
+
+/* Fixed Addresses */
+_base_WORK_FLASH = 0x14000000;
+_size_WORK_FLASH = 0x00040000; /* 256K Work flash */
+_base_CM7_0_ITCM = 0xA0000000;
+_size_CM7_0_ITCM = 0x00004000;
+_base_CM7_0_DTCM = 0xA0010000;
+_size_CM7_0_DTCM = 0x00004000;
+_base_CM7_1_ITCM = 0xA0100000;
+_size_CM7_1_ITCM = 0x00004000;
+_base_CM7_1_DTCM = 0xA0110000;
+_size_CM7_1_DTCM = 0x00004000;
+
+/* For the non-dual cm7 device, _CORE_CM7_0_ should be defined and _CORE_CM7_1_ should not be defined */
+_base_SRAM = DEFINED(_CORE_CM7_1_) ? _base_SRAM_CM7_1 : DEFINED(_CORE_CM7_0_) ? _base_SRAM_CM7_0 : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_size_SRAM = DEFINED(_CORE_CM7_1_) ? _size_SRAM_CM7_1 : DEFINED(_CORE_CM7_0_) ? _size_SRAM_CM7_0 : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_base_CODE_FLASH = DEFINED(_CORE_CM7_1_) ? _base_CODE_FLASH_CM7_1 : DEFINED(_CORE_CM7_0_) ? _base_CODE_FLASH_CM7_0 : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_size_CODE_FLASH = DEFINED(_CORE_CM7_1_) ? _size_CODE_FLASH_CM7_1 : DEFINED(_CORE_CM7_0_) ? _size_CODE_FLASH_CM7_0 : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_base_SFLASH_USER_DATA = 0x17000800;
+_size_SFLASH_USER_DATA = 0x00000800;
+_base_SFLASH_NAR = 0x17001A00;
+_size_SFLASH_NAR = 0x00000200;
+_base_SFLASH_PUB_KEY = 0x17006400;
+_size_SFLASH_PUB_KEY = 0x00000C00;
+_base_SFLASH_APP_PROT = 0x17007600;
+_size_SFLASH_APP_PROT = 0x00000200;
+_base_SFLASH_TOC2 = 0x17007C00;
+_size_SFLASH_TOC2 = 0x00000200;
+_base_XIP = 0x60000000;
+_size_XIP = 0x08000000;
+_base_EFUSE = 0x90700000;
+_size_EFUSE = 0x00100000;
+_base_ITCM = DEFINED(_CORE_CM7_1_) ? _base_CM7_1_ITCM : DEFINED(_CORE_CM7_0_) ? _base_CM7_0_ITCM : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_size_ITCM = DEFINED(_CORE_CM7_1_) ? _size_CM7_1_ITCM : DEFINED(_CORE_CM7_0_) ? _size_CM7_0_ITCM : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_base_DTCM = DEFINED(_CORE_CM7_1_) ? _base_CM7_1_DTCM : DEFINED(_CORE_CM7_0_) ? _base_CM7_0_DTCM : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+_size_DTCM = DEFINED(_CORE_CM7_1_) ? _size_CM7_1_DTCM : DEFINED(_CORE_CM7_0_) ? _size_CM7_0_DTCM : ASSERT(1<1, "Error: Either_CORE_CM7_0_ or _CORE_CM7_1_ not defined");
+
+
+/* Force symbol to be entered in the output file as an undefined symbol. Doing
+* this may, for example, trigger linking of additional modules from standard
+* libraries. You may list several symbols for each EXTERN, and you may use
+* EXTERN multiple times. This command has the same effect as the -u command-line
+* option.
+*/
+EXTERN(Reset_Handler)
+
+/* The MEMORY section below describes the location and size of blocks of memory in the target.
+* Use this section to specify the memory regions available for allocation.
+*/
+MEMORY
+{
+ /* The ram and flash regions control RAM and flash memory allocation for the CM7_0/CM7_1 core. */
+ ram (rxw) : ORIGIN = _base_SRAM_CM7_0, LENGTH = _size_SRAM_CM7_0 - 0x10000 /* SRAM */
+ flash_cm0p (rx) : ORIGIN = _base_CODE_FLASH_CM0P, LENGTH = _size_CODE_FLASH_CM0P /* CODE flash CM0+ */
+ flash (rx) : ORIGIN = _base_CODE_FLASH_CM7_0, LENGTH = 0x20000 /* CODE flash CM7_0/1 */
+
+ /* This is a 256K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
+ * You can assign sections to this memory region for only one of the cores.
+ */
+ em_eeprom (rw) : ORIGIN = _base_WORK_FLASH, LENGTH = _size_WORK_FLASH /* WORK flash */
+
+ /* The following regions define device specific memory regions and must not be changed. */
+ sflash_user_data (rx) : ORIGIN = _base_SFLASH_USER_DATA, LENGTH = _size_SFLASH_USER_DATA /* Supervisory flash: User data */
+ sflash_nar (rx) : ORIGIN = _base_SFLASH_NAR, LENGTH = _size_SFLASH_NAR /* Supervisory flash: Normal Access Restrictions (NAR) */
+ sflash_public_key (rx) : ORIGIN = _base_SFLASH_PUB_KEY, LENGTH = _size_SFLASH_PUB_KEY /* Supervisory flash: Public Key */
+ sflash_app_prot (rx) : ORIGIN = _base_SFLASH_APP_PROT, LENGTH = _size_SFLASH_APP_PROT
+ sflash_toc_2 (rx) : ORIGIN = _base_SFLASH_TOC2, LENGTH = _size_SFLASH_TOC2 /* Supervisory flash: Table of Content # 2 */
+ xip (rx) : ORIGIN = _base_XIP, LENGTH = _size_XIP /* XIP: 128 MB */
+ efuse (rx) : ORIGIN = _base_EFUSE, LENGTH = _size_EFUSE /* 1MB */
+ itcm (rx) : ORIGIN = _base_ITCM, LENGTH = _size_ITCM /* ITCM */
+ dtcm (rx) : ORIGIN = _base_DTCM, LENGTH = _base_DTCM /* DTCM */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+SECTIONS
+{
+ /* Cortex-M0+ application flash image area. Comment this section if you don't want to include CM0+ image */
+ .cy_cm0p_image ORIGIN(flash_cm0p):
+ {
+ . = ALIGN(4);
+ __cy_m0p_code_start = . ;
+ KEEP(*(.cy_m0p_image))
+ __cy_m0p_code_end = . ;
+ } > flash_cm0p
+
+ /* Check if .cy_m0p_image size exceeds cm0plus_code_flash_reserve */
+ ASSERT(__cy_m0p_code_end < ORIGIN(flash), "CM0+ flash image overflows with CM7, increase CM7 base address ")
+
+ /* Cortex-M7 application flash area */
+ .text ORIGIN(flash) :
+ {
+ /* Cortex-M7 flash vector table */
+ . = ALIGN(4);
+ __Vectors = . ;
+ KEEP(*(.vectors))
+ . = ALIGN(4);
+ __Vectors_End = .;
+ __Vectors_Size = __Vectors_End - __Vectors;
+ __end__ = .;
+
+ . = ALIGN(4);
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ /* Read-only code (constants). */
+ *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+ KEEP(*(.eh_frame*))
+ } > flash
+
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > flash
+
+ __exidx_start = .;
+
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > flash
+ __exidx_end = .;
+
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+
+ /* Copy data section to RAM */
+ LONG (__etext) /* From */
+ LONG (__data_start__) /* To */
+ LONG ((__data_end__ - __data_start__)/4) /* Size */
+
+ __copy_table_end__ = .;
+ } > flash
+
+
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG ((__bss_end__ - __bss_start__)/4)
+ __zero_table_end__ = .;
+ } > flash
+
+ __etext = . ;
+
+
+ .ramVectors (NOLOAD) :
+ {
+ . = ALIGN(RAMVECTORS_ALIGNMENT);
+ __ram_vectors_start__ = .;
+ KEEP(*(.ram_vectors))
+ __ram_vectors_end__ = .;
+ } > ram
+
+
+ .data __ram_vectors_end__ :
+ {
+ . = ALIGN(4);
+ __data_start__ = .;
+
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+
+ KEEP(*(.cy_ramfunc*))
+ . = ALIGN(32);
+
+ KEEP(*(cy_sharedmem*))
+ . = ALIGN(4);
+
+ __data_end__ = .;
+
+ } > ram AT>flash
+
+
+ /* Place variables in the section that should not be initialized during the
+ * device startup.
+ */
+ .noinit (NOLOAD) : ALIGN(8)
+ {
+ KEEP(*(.noinit))
+ } > ram
+
+
+ /* The uninitialized global or static variables are placed in this section.
+ *
+ * The NOLOAD attribute tells linker that .bss section does not consume
+ * any space in the image. The NOLOAD attribute changes the .bss type to
+ * NOBITS, and that makes linker to A) not allocate section in memory, and
+ * A) put information to clear the section with all zeros during application
+ * loading.
+ *
+ * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
+ * This makes linker to A) allocate zeroed section in memory, and B) copy
+ * this section to RAM during application loading.
+ */
+ .bss (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > ram
+
+
+ .heap (NOLOAD):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ end = __end__;
+ KEEP(*(.heap*))
+ . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
+ __HeapLimit = .;
+ } > ram
+
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (NOLOAD):
+ {
+ KEEP(*(.stack*))
+ } > ram
+
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(ram) + LENGTH(ram);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+
+
+ /* Emulated EEPROM Flash area */
+ .cy_em_eeprom :
+ {
+ KEEP(*(.cy_em_eeprom))
+ } > em_eeprom
+
+
+ /* Supervisory Flash: User data */
+ .cy_sflash_user_data :
+ {
+ KEEP(*(.cy_sflash_user_data))
+ } > sflash_user_data
+
+
+ /* Supervisory Flash: Normal Access Restrictions (NAR) */
+ .cy_sflash_nar :
+ {
+ KEEP(*(.cy_sflash_nar))
+ } > sflash_nar
+
+
+ /* Supervisory Flash: Public Key */
+ .cy_sflash_public_key :
+ {
+ KEEP(*(.cy_sflash_public_key))
+ } > sflash_public_key
+
+
+ /* Supervisory Flash: Table of Content # 2 */
+ .cy_toc_part2 :
+ {
+ KEEP(*(.cy_toc_part2))
+ } > sflash_toc_2
+
+ /* Places the code in the Execute in Place (XIP) section. See the smif driver
+ * documentation for details.
+ */
+ cy_xip :
+ {
+ __cy_xip_start = .;
+ KEEP(*(.cy_xip))
+ __cy_xip_end = .;
+ } > xip
+
+
+ /* eFuse */
+ .cy_efuse :
+ {
+ KEEP(*(.cy_efuse))
+ } > efuse
+
+ /* itcm */
+ .cy_itcm :
+ {
+ KEEP(*(.cy_itcm))
+ } > itcm
+
+ /* dtcm */
+ .cy_dtcm :
+ {
+ KEEP(*(.cy_dtcm))
+ } > dtcm
+}
+
+
+/*============================================================
+ * Symbols for use by application
+ *============================================================
+ */
+
+__ecc_init_sram_start_address = ORIGIN(ram);
+__ecc_init_sram_end_address = ORIGIN(ram) + LENGTH(ram);
+
+/* EOF */
diff --git a/boot/cypress/MCUBootApp/MCUBootApp_CYW20829_Debug.launch b/boot/cypress/MCUBootApp/MCUBootApp_CYW20829_Debug.launch
new file mode 100644
index 0000000..3b3300a
--- /dev/null
+++ b/boot/cypress/MCUBootApp/MCUBootApp_CYW20829_Debug.launch
@@ -0,0 +1,59 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+ <stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+ <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="/Users/rnok/Downloads/ASSETS/cyopenocd/openocd_4.3_1445/bin/openocd"/>
+ <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s "/Users/rnok/Downloads/ASSETS/cyopenocd/openocd_4.3_1445/scripts" -s "./libs/TARGET_PSVP-CYW20829/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource" -c "set SMIF_LOADER /Users/rnok/repos/cyw20829/AnyCloud_CYW20829_Blinky_App/./libs/TARGET_PSVP-CYW20829/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/CYW208xx_SMIF.FLM" -c "source [find interface/kitprog3.cfg]" -c "puts stderr {Started by GNU MCU Eclipse}" -c "source [find target/cyw208xx.cfg]" -c "cyw208xx.cm33 configure -rtos auto -rtos-wipe-on-reset-halt 1" -c "gdb_breakpoint_override hard" -c "init; reset init""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+ <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value="flushregs"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="init"/>
+ <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="${cy_prj_path}/build/PSVP-CYW20829/Debug/mtb-example-anycloud-blinky.bin"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+ <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="/Users/rnok/repos/cyw20829/cy_mcuboot/boot/cypress/MCUBootApp/out/CYW20829/Debug/MCUBootApp.elf"/>
+ <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="true"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+ <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:CY_TOOL_arm-none-eabi-gdb_EXE}"/>
+ <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+ <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+ <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="/Users/rnok/repos/cyw20829/cy_mcuboot/boot/cypress/MCUBootApp/out/CYW20829/Debug/MCUBootApp.elf"/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="MCUBootApp_CYW20829_Debug"/>
+ <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+ <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+ <listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+ <listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+ </listAttribute>
+ <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"/> "/>
+ <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/boot/cypress/MCUBootApp/README.md b/boot/cypress/MCUBootApp/README.md
new file mode 100644
index 0000000..bb53301
--- /dev/null
+++ b/boot/cypress/MCUBootApp/README.md
@@ -0,0 +1,221 @@
+### Port of MCUboot library to be used with Cypress targets
+
+**Solution Description**
+
+Given solution demonstrates operation of MCUboot on Cypress' PSoC6 device.
+
+There are two applications implemented:
+* MCUBootApp - PSoC6 MCUboot-based bootloading application;
+* BlinkyApp - simple PSoC6 blinking LED application which is a target of BOOT/UPGRADE;
+
+Cypress boards, that can be used with this evaluation example:
+- CY8CPROTO-062-4343W - PSoC 6 2M on board
+- CY8CKIT-062-WIFI-BT - PSoC 6 1M on board
+- CY8CPROTO-062S3-4343W - PSoC 6 512K on board
+The default flash map implemented is the following:
+
+Single-image mode.
+
+`[0x10000000, 0x10018000]` - MCUBootApp (bootloader) area;
+
+`[0x10018000, 0x10028000]` - primary slot for BlinkyApp;
+
+`[0x10028000, 0x10038000]` - secondary slot for BlinkyApp;
+
+`[0x10038000, 0x10039000]` - scratch area (not used);
+
+Size of slots `0x10000` - 64kb
+
+MCUBootApp checks image integrity with SHA256, image authenticity with EC256 digital signature verification and uses completely SW implementation of cryptographic functions based on Mbed TLS Library.
+
+**Important**: make sure primary, secondary slot and bootloader app sizes are appropriate and correspond to flash area size defined in Applications' linker files.
+
+**Important**: make sure RAM areas of CM0p-based MCUBootApp bootloader and CM4-based BlinkyApp do not overlap.
+Memory (stack) corruption of CM0p application can cause failure if SystemCall-served operations invoked from CM4.
+
+### Hardware cryptography acceleration
+
+Cypress PSOC6 MCU family supports hardware acceleration of cryptography based on Mbed TLS Library via shim layer. Implementation of this layer is supplied as separate submodule `cy-mbedtls-acceleration`. HW acceleration of cryptography shortens boot time more then 4 times, comparing to software implementation (observation results).
+
+To enable hardware acceleration in `MCUBootApp` pass flag `USE_CRYPTO_HW=1` to `make` while build.
+
+Hardware acceleration of cryptography is enabled for PSOC6 devices by default.
+
+### How to modify memory map
+
+__Option 1.__
+
+Navigate to `sysflash.h` and modify the flash area(s) / slots sizes to meet your needs.
+
+__Option 2.__
+
+Navigate to `sysflash.h`, uncomment `memory_EXT_DESC` definition.
+Now define and initialize `struct flash_area *boot_area_descs[]` with flash memory addresses and sizes you need at the beginning of application, so flash APIs from `memory.c` will use it.
+
+__Note:__ for both options make sure you have updated `MCUBOOT_MAX_IMG_SECTORS` appropriatery with sector size assumed to be 512.
+
+**How to override the flash map values during build process:**
+
+Navigate to MCUBootApp.mk, find section `DEFINES_APP +=`
+Update this line and or add similar for flash map parameters to override.
+
+The possible list could be:
+
+* MCUBOOT_MAX_IMG_SECTORS
+* memory_EXT_DESC
+* CY_BOOT_SCRATCH_SIZE
+* CY_BOOT_BOOTLOADER_SIZE
+* CY_BOOT_PRIMARY_1_SIZE
+* CY_BOOT_SECONDARY_1_SIZE
+* CY_BOOT_PRIMARY_2_SIZE
+* CY_BOOT_SECONDARY_2_SIZE
+
+As an example in a makefile it should look like following:
+
+`DEFINES_APP +=-Dmemory_EXT_DESC`
+
+`DEFINES_APP +=-DMCUBOOT_MAX_IMG_SECTORS=512`
+
+`DEFINES_APP +=-DCY_BOOT_PRIMARY_1_SIZE=0x15000`
+
+**Multi-Image Operation**
+
+Multi-image operation considers upgrading and verification of more then one image on the device.
+
+To enable multi-image operation define `MCUBOOT_IMAGE_NUMBER` in `MCUBootApp/config/mcuboot_config.h` file should be set to 2 (only dual-image is supported at the moment). This could also be done on build time by passing `MCUBOOT_IMAGE_NUMBER=2` as parameter to `make`.
+
+Default value of `MCUBOOT_IMAGE_NUMBER` is 1, which corresponds to single image configuratios.
+
+In multi-image operation (two images are considered for simplicity) MCUboot Bootloader application operates as following:
+
+* Verifies Primary_1 and Primary_2 images;
+* Verifies Secondary_1 and Secondary_2 images;
+* Upgrades Secondary to Primary if valid images found;
+* Boots image from Primary_1 slot only;
+* Boots Primary_1 only if both - Primary_1 and Primary_2 are present and valid;
+
+This ensures two dependent applications can be accepted by device only in case both images are valid.
+
+**Default Flash map for Multi-Image operation:**
+
+`0x10000000 - 0x10018000` - MCUboot Bootloader
+
+`0x10018000 - 0x10028000` - Primary_1 (BOOT) slot of Bootloader
+
+`0x10028000 - 0x10038000` - Secondary_1 (UPGRADE) slot of Bootloader
+
+`0x10038000 - 0x10048000` - Primary_2 (BOOT) slot of Bootloader
+
+`0x10048000 - 0x10058000` - Secondary_2 (UPGRADE) slot of Bootloader
+
+`0x10058000 - 0x10059000` - Scratch of Bootloader
+
+Size of slots `0x10000` - 64kb
+
+__Note:__ It is also possible to place secondary (upgrade) slots in external memory module so resulting image size can be doubled.
+For more details about External Memory usage, please refer to separate guiding document `ExternalMemory.md`.
+
+### Hardware limitations
+
+Since this application is created to demonstrate MCUboot library features and not as reference examples some considerations are taken.
+
+1. `SCB5` used to configure serial port for debug prints. This is the most commonly used Serial Communication Block number among available Cypress PSoC 6 kits. If you try to use custom hardware with this application - change definition of `CYBSP_UART_HW` in `main.c` of MCUBootApp to SCB* that correspond to your design.
+
+2. `CY_SMIF_SLAVE_SELECT_0` is used as definition SMIF driver API. This configuration is used on evaluation kit for this example CY8CPROTO-062-4343W, CY8PROTO-062S3-4343W, CY8CKIT-062-4343W. If you try to use custom hardware with this application - change value of `smif_id` in `main.c` of MCUBootApp to value that corresponds to your design.
+
+
+### Downloading solution's assets
+
+There is a set assets required:
+
+* MCUBooot Library (root repository)
+* PSoC6 HAL Library
+* PSoC6 Peripheral Drivers Library (PDL)
+* Mbed TLS Cryptographic Library
+
+To get submodules - run the following command:
+
+ git submodule update --init --recursive
+
+### Building solution
+
+This folder contains make files infrastructure for building MCUBoot Bootloader. Same approach used in sample BlinkyLedApp application. Example command are provided below for couple different build configurations.
+
+* Build MCUBootApp in `Debug` for signle image use case.
+
+ make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1
+
+* Build MCUBootApp in `Release` for multi image use case.
+
+ make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Release MCUBOOT_IMAGE_NUMBER=2
+
+* To Build MCUBootApp with external memory support - pass `USE_EXTERNAL_FLASH=1` flag to `make` command in examples above. In this case UPGRADE image will be located in external memory. Refer to ExternalMemory.md for additional details.
+
+Root directory for build is **boot/cypress.**
+
+**Encrypted Image Support**
+
+To protect user image from unwanted read - Upgrade Image Encryption can be applied. The ECDH/HKDF with EC256 scheme is used in a given solution as well as Mbed TLS as a crypto provider.
+
+To enable image encryption support use `ENC_IMG=1` build flag (BlinkyApp should also be built with this flash set 1).
+
+User is also responsible for providing corresponding binary key data in `enc_priv_key[]` (file `\MCUBootApp\keys.c`). The public part will be used by imgtool when signing and encrypting upgrade image. Signing image with encryption is described in `\BlinkyApp\Readme.md`.
+
+After MCUBootApp is built with these settings unencrypted and encrypted images will be accepted in secondary (upgrade) slot.
+
+Example command:
+
+ make app APP_NAME=MCUBootApp PLATFORM=PSOC_062_2M BUILDCFG=Debug MCUBOOT_IMAGE_NUMBER=1 ENC_IMG=1
+
+**Programming solution**
+
+There are couple ways of programming hex of MCUBootApp and BlinkyApp. Following instructions assume one of Cypress development kits, for example `CY8CPROTO_062_4343W`.
+
+1. Direct usage of OpenOCD.
+OpenOCD package is supplied with ModuToolbox IDE and can be found in installation folder under `./tools_2.1/openocd`.
+Open terminal application - and execute following command after substitution `PATH_TO_APPLICATION.hex` and `OPENOCD` paths.
+
+Connect a board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines.
+
+ export OPENOCD=/Applications/ModusToolbox/tools_2.1/openocd
+
+ ${OPENOCD}/bin/openocd -s ${OPENOCD}/scripts \
+ -f ${OPENOCD}/scripts/interface/kitprog3.cfg \
+ -f ${OPENOCD}/scripts/target/psoc6_2m.cfg \
+ -c "init; reset init; program PATH_TO_APPLICATION.hex" \
+ -c "resume; reset; exit"
+
+2. Using GUI tool `Cypress Programmer` - follow [link](https://www.cypress.com/products/psoc-programming-solutions) to download.
+ Connect board to your computer. Switch Kitprog3 to DAP-BULK mode by pressing `SW3 MODE` button until `LED2 STATUS` constantly shines. Open `Cypress Programmer` and click `Connect`, then choose hex file: `MCUBootApp.hex` or `BlinkyApp.hex` and click `Program`. Check log to ensure programming success. Reset board.
+
+3. Using `DAPLINK`.
+ Connect board to your computer. Switch embeded Kitprog3 to `DAPLINK` mode by pressing `SW3 MODE` button until `LED2 STATUS` blinks fast and mass storage device appeared in OS. Drag and drop `hex` files you wish to program to `DAPLINK` drive in your OS.
+
+
+
+**Currently supported platforms:**
+
+* PSOC_062_2M
+* PSOC_062_1M
+* PSOC_062_512K
+
+**Build environment troubleshooting:**
+
+Regular shell/terminal combination on Linux and MacOS.
+
+On Windows:
+
+* Cygwin
+* Msys2
+
+Also IDE may be used:
+* Eclipse / ModusToolbox ("makefile project from existing source")
+
+*Make* - make sure it is added to system's `PATH` variable and correct path is first in the list;
+
+*Python/Python3* - make sure you have correct path referenced in `PATH`;
+
+*Msys2* - to use systems PATH navigate to msys2 folder, open `msys2_shell.cmd`, uncomment set `MSYS2_PATH_TYPE=inherit`, restart MSYS2 shell.
+
+This will iherit system's PATH so should find `python3.7` installed in regular way as well as imgtool and its dependencies.
+
diff --git a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
index c2b2348..a1e36ba 100644
--- a/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
+++ b/boot/cypress/MCUBootApp/config/mcuboot_config/mcuboot_config.h
@@ -65,7 +65,7 @@
* to erase size of target hardware.
*/
#ifndef MCUBOOT_PLATFORM_CHUNK_SIZE
-#define MCUBOOT_PLATFORM_CHUNK_SIZE 4096U
+#define MCUBOOT_PLATFORM_CHUNK_SIZE 0x200U
#endif
/*
diff --git a/boot/cypress/MCUBootApp/cy_serial_flash_prog.c b/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
index 8bf7d8e..84197e1 100644
--- a/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
+++ b/boot/cypress/MCUBootApp/cy_serial_flash_prog.c
@@ -1,4 +1,4 @@
-/***************************************************************************//**
+/*******************************************************************************
* \file cy_serial_flash_prog.c
*
* \brief
diff --git a/boot/cypress/MCUBootApp/libs.mk b/boot/cypress/MCUBootApp/libs.mk
index 24bd642..c21c9cd 100644
--- a/boot/cypress/MCUBootApp/libs.mk
+++ b/boot/cypress/MCUBootApp/libs.mk
@@ -32,14 +32,12 @@
THIS_APP_PATH = $(PRJ_DIR)/libs
MBEDTLS_PATH = $(PRJ_DIR)/../../ext
+ifneq ($(FAMILY), XMC7000)
# Add watchdog folder to build
SOURCES_WATCHDOG := $(wildcard $(THIS_APP_PATH)/watchdog/*.c)
-
-# Add retartget IO implementation using pdl
-SOURCES_RETARGET_IO_PDL := $(PLATFORM_SOURCES_RETARGET_IO_PDL)
-
-# Collect dirrectories containing headers for PLATFORM
-INCLUDE_RETARGET_IO_PDL := $(PLATFORM_INCLUDE_RETARGET_IO_PDL)
+# Watchdog related includes
+INCLUDE_DIRS_WATCHDOG := $(THIS_APP_PATH)/watchdog
+endif
# PSOC6HAL source files
SOURCES_HAL_MCUB := $(PLATFORM_SOURCES_HAL_MCUB)
@@ -53,13 +51,10 @@
# Collected source files for libraries
SOURCES_LIBS += $(SOURCES_MBEDTLS)
SOURCES_LIBS += $(SOURCES_WATCHDOG)
+SOURCES_LIBS += $(SOURCES_FIH)
# Collect source files for platform dependent libraries
SOURCES_LIBS += $(SOURCES_HAL_MCUB)
-SOURCES_LIBS += $(SOURCES_RETARGET_IO_PDL)
-
-# Watchdog related includes
-INCLUDE_DIRS_WATCHDOG := $(THIS_APP_PATH)/watchdog
# MbedTLS related include directories
ifeq ($(USE_CRYPTO_HW), 1)
@@ -76,31 +71,29 @@
# Collected include directories for libraries
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_WATCHDOG))
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_MBEDTLS))
+INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_FIH))
# Collect platform dependent include dirs
INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_DIRS_HAL_MCUB))
-INCLUDE_DIRS_LIBS += $(addprefix -I,$(INCLUDE_RETARGET_IO_PDL))
###############################################################################
# Print debug information about all settings used and/or set in this file
ifeq ($(VERBOSE), 1)
$(info #### libs.mk ####)
+$(info INCLUDE_DIRS_FIH <-> $(INCLUDE_DIRS_FIH))
$(info INCLUDE_DIRS_HAL_MCUB <-> $(INCLUDE_DIRS_HAL_MCUB))
-$(info INCLUDE_DIRS_LIBS --> $(INCLUDE_DIRS_LIBS))
+$(info INCLUDE_DIRS_LIBS <-> $(INCLUDE_DIRS_LIBS))
$(info INCLUDE_DIRS_MBEDTLS <-> $(INCLUDE_DIRS_MBEDTLS))
$(info INCLUDE_DIRS_WATCHDOG <-> $(INCLUDE_DIRS_WATCHDOG))
-$(info INCLUDE_RETARGET_IO_PDL <-> $(INCLUDE_RETARGET_IO_PDL))
$(info MBEDTLS_PATH <-- $(MBEDTLS_PATH))
$(info PLATFORM <-- $(PLATFORM))
$(info PLATFORM_INCLUDE_DIRS_HAL_MCUB <-- $(PLATFORM_INCLUDE_DIRS_HAL_MCUB))
-$(info PLATFORM_INCLUDE_RETARGET_IO_PDL <-- $(PLATFORM_INCLUDE_RETARGET_IO_PDL))
$(info PLATFORM_SOURCES_HAL_MCUB <-- $(PLATFORM_SOURCES_HAL_MCUB))
-$(info PLATFORM_SOURCES_RETARGET_IO_PDL <-- $(PLATFORM_SOURCES_RETARGET_IO_PDL))
$(info PRJ_DIR <-- $(PRJ_DIR))
+$(info SOURCES_FIH <-> $(SOURCES_FIH))
$(info SOURCES_HAL_MCUB <-> $(SOURCES_HAL_MCUB))
-$(info SOURCES_LIBS --> $(SOURCES_LIBS))
+$(info SOURCES_LIBS <-> $(SOURCES_LIBS))
$(info SOURCES_MBEDTLS <-> $(SOURCES_MBEDTLS))
-$(info SOURCES_RETARGET_IO_PDL <-> $(SOURCES_RETARGET_IO_PDL))
$(info SOURCES_WATCHDOG <-> $(SOURCES_WATCHDOG))
$(info THIS_APP_PATH <-- $(THIS_APP_PATH))
$(info USE_CRYPTO_HW <-- $(USE_CRYPTO_HW))
diff --git a/boot/cypress/MCUBootApp/main.c b/boot/cypress/MCUBootApp/main.c
index 8a78193..926e36d 100644
--- a/boot/cypress/MCUBootApp/main.c
+++ b/boot/cypress/MCUBootApp/main.c
@@ -22,21 +22,16 @@
/* Cypress pdl headers */
#include "cy_pdl.h"
-
-#ifdef CYW20829
-#include "cy_retarget_io.h"
-#include "cybsp.h"
+#include "cyhal.h"
#include "cyhal_wdt.h"
-#include "cyw_platform_utils.h"
+
+#if defined CYW20829
#include "cy_service_app.h"
-#else
-#include "cy_retarget_io_pdl.h"
-#include "cycfg_clocks.h"
-#include "cycfg_peripherals.h"
-#if defined APP_CM0P || defined CM4
+#endif
+
+#include "cybsp.h"
+#include "cy_retarget_io.h"
#include "cyw_platform_utils.h"
-#endif /* defined APP_CM0P || defined CM4 */
-#endif /* defined CYW20829 */
#if defined(CY_BOOT_USE_EXTERNAL_FLASH) || defined(CYW20829)
#include "flash_qspi.h"
@@ -55,8 +50,6 @@
#include "bootutil/fault_injection_hardening.h"
-#include "watchdog.h"
-
#ifdef USE_EXEC_TIME_CHECK
#include "misc/timebase_us.h"
#include "misc/exec_time_check.h"
@@ -85,7 +78,7 @@
#define SMIF_ID (1U) /* Assume SlaveSelect_0 is used for External Memory */
#endif /* CY_BOOT_USE_EXTERNAL_FLASH */
-#define BOOT_MSG_FINISH "MCUBoot Bootloader finished.\n" \
+#define BOOT_MSG_FINISH "MCUBoot Bootloader finished.\r\n" \
"Deinitializing hardware..."
static void hw_deinit(void);
@@ -98,7 +91,7 @@
rsp->br_hdr->ih_hdr_size);
}
-#ifdef CYW20829
+#if defined CYW20829
#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP)
CY_RAMFUNC_BEGIN /* SMIF will be deinitialized in this case! */
@@ -117,18 +110,18 @@
CY_RAMFUNC_END /* SMIF will be deinitialized in this case! */
#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
-#endif /* CYW20829 */
+#endif /* defined CYW20829 */
static bool do_boot(struct boot_rsp *rsp)
{
uintptr_t flash_base = 0;
-#ifdef CYW20829
+#if defined CYW20829
uint32_t *key = NULL;
uint32_t *iv = NULL;
-#endif /* CYW20829 */
+#endif /* defined CYW20829 */
- if (rsp != NULL) {
+ if ((rsp != NULL) && (rsp->br_hdr != NULL)) {
int rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
if (0 == rc) {
@@ -141,11 +134,12 @@
BOOT_LOG_INF("Start slot Address: 0x%08" PRIx32, (uint32_t)fih_uint_decode(app_addr));
rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
- if ((rc != 0) || fih_uint_not_eq(calc_app_addr(flash_base, rsp), app_addr)) {
+ if (rc != 0 || fih_uint_eq(calc_app_addr(flash_base, rsp), app_addr) != FIH_TRUE) {
return false;
}
-#ifdef CYW20829
+#if defined CYW20829
+
#ifdef MCUBOOT_ENC_IMAGES_XIP
if (IS_ENCRYPTED(rsp->br_hdr)) {
key = rsp->xip_key;
@@ -179,15 +173,15 @@
BOOT_LOG_INF("Launching app on CM4 core");
BOOT_LOG_INF(BOOT_MSG_FINISH);
hw_deinit();
-#ifdef CM0P
+#ifdef BOOT_CM0P
Cy_SysEnableCM4(fih_uint_decode(app_addr));
return true;
#else
psoc6_launch_cm4_app(app_addr);
-#endif /* CM0P */
+#endif /* BOOT_CM0P */
#elif defined APP_CM0P
-#ifdef CM0P
+#ifdef BOOT_CM0P
/* This function does not return */
BOOT_LOG_INF("Launching app on CM0P core");
BOOT_LOG_INF(BOOT_MSG_FINISH);
@@ -195,8 +189,15 @@
psoc6_launch_cm0p_app(app_addr);
#else
#error "Application should run on Cortex-M4"
-#endif /* CM0P */
+#endif /* BOOT_CM0P */
+#elif defined APP_CM7
+ /* This function does not return */
+ BOOT_LOG_INF("Launching app on CM7 core");
+ BOOT_LOG_INF(BOOT_MSG_FINISH);
+ hw_deinit();
+ xmc7000_launch_cm7_app(app_addr);
+ return true;
#else
#error "Application should run on either Cortex-M0+ or Cortex-M4"
#endif /* APP_CM4 */
@@ -213,13 +214,12 @@
int main(void)
{
- struct boot_rsp rsp;
- cy_rslt_t rc = MCUBOOTAPP_RSLT_ERR;
+ struct boot_rsp rsp = {};
bool boot_succeeded = false;
fih_int fih_rc = FIH_FAILURE;
+ cy_rslt_t rc = cybsp_init();
-#ifdef CYW20829
- rc = cybsp_init();
+
if (rc != CY_RSLT_SUCCESS) {
CY_ASSERT((bool)0);
/* Loop forever... */
@@ -227,11 +227,6 @@
__WFI();
}
}
-#else
- SystemInit();
- init_cycfg_peripherals();
- init_cycfg_pins();
-#endif /* CYW20829 */
#ifdef USE_EXEC_TIME_CHECK
timebase_us_init();
@@ -251,20 +246,16 @@
* to keep CM4 disabled. Note that debugging of CM4 is not supported when it
* is disabled.
*/
-#if !defined CYW20829
-#if defined(CY_DEVICE_PSOC6ABLE2) && !defined(CM4)
+#if defined(CY_DEVICE_PSOC6ABLE2) && !defined(BOOT_CM4)
if (CY_SYS_CM4_STATUS_ENABLED == Cy_SysGetCM4Status()) {
Cy_SysDisableCM4();
}
-#endif /* defined(CY_DEVICE_PSOC6ABLE2) && !defined(CM4) */
- /* Initialize retarget-io to use the debug UART port (CYBSP_UART_HW) */
- rc = cy_retarget_io_pdl_init(CY_RETARGET_IO_BAUDRATE);
-#else
+#endif /* defined(CY_DEVICE_PSOC6ABLE2) && !defined(BOOT_CM4) */
/* Initialize retarget-io to use the debug UART port */
rc = cy_retarget_io_init(CYBSP_DEBUG_UART_TX,
CYBSP_DEBUG_UART_RX,
CY_RETARGET_IO_BAUDRATE);
-#endif /* CYW20829 */
+
if (rc != CY_RSLT_SUCCESS) {
CY_ASSERT((bool)0);
/* Loop forever... */
@@ -303,7 +294,6 @@
}
#endif /* CYW20829 && MCUBOOT_HW_ROLLBACK_PROT */
- (void)memset(&rsp, 0, sizeof(rsp));
#ifdef USE_EXEC_TIME_CHECK
{
uint32_t exec_time;
@@ -315,20 +305,17 @@
BOOT_LOG_INF("Exec time: %" PRIu32 " [ms]", exec_time / 1000U);
}
#endif /* USE_EXEC_TIME_CHECK */
- if (true == fih_eq(fih_rc, FIH_SUCCESS)) {
+ if (FIH_TRUE == fih_eq(fih_rc, FIH_SUCCESS)) {
BOOT_LOG_INF("User Application validated successfully");
/* initialize watchdog timer. it should be updated from user app
* to mark successful start up of this app. if the watchdog is not updated,
* reset will be initiated by watchdog timer and swap revert operation started
* to roll back to operable image.
*/
-#ifdef CYW20829
- cyhal_wdt_t *cyw20829_wdt = NULL;
+ cyhal_wdt_t *wdt = NULL;
- rc = cyhal_wdt_init(cyw20829_wdt, WDT_TIME_OUT_MS);
-#else
- rc = cy_wdg_init(WDT_TIME_OUT_MS);
-#endif /* CYW20829 */
+ rc = cyhal_wdt_init(wdt, WDT_TIME_OUT_MS);
+
if (CY_RSLT_SUCCESS == rc) {
boot_succeeded = do_boot(&rsp);
@@ -355,23 +342,13 @@
static void hw_deinit(void)
{
-#ifdef CYW20829
- /* Flush the TX buffer, need to be fixed in retarget_io */
- Cy_SysLib_Delay(50);
-
- cy_retarget_io_deinit();
- cy_wdg_stop();
- cy_wdg_free();
- /* Note: qspi_deinit() is called (if needed) in cyw20829_launch_app() above */
-#else
- cy_retarget_io_wait_tx_complete(CYBSP_UART_HW, 10);
- cy_retarget_io_pdl_deinit();
- Cy_GPIO_Port_Deinit(CYBSP_UART_RX_PORT);
- Cy_GPIO_Port_Deinit(CYBSP_UART_TX_PORT);
#if defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) && !defined(USE_XIP)
qspi_deinit(SMIF_ID);
#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) && !defined(MCUBOOT_ENC_IMAGES_XIP) */
-#endif /* CYW20829 */
+
+ /* Flush the TX buffer, need to be fixed in retarget_io */
+ while(cy_retarget_io_is_tx_active()){}
+ cy_retarget_io_deinit();
#ifdef USE_EXEC_TIME_CHECK
timebase_us_deinit();