Infineon: Switch to 1.9.0 code base, add xmc7000 family support, refactor memory layer
diff --git a/sim/mcuboot-sys/Cargo.toml b/sim/mcuboot-sys/Cargo.toml
index e3a00cb..7f2ee83 100644
--- a/sim/mcuboot-sys/Cargo.toml
+++ b/sim/mcuboot-sys/Cargo.toml
@@ -82,9 +82,8 @@
# Check (in software) against version downgrades.
downgrade-prevention = []
-# Large write. Not meaningful, but present here so that the
-# full-suite tests will work for this configuration.
-large-write = []
+# Support images with 32-byte maximum write alignment value.
+max-align-32 = []
[build-dependencies]
cc = "1.0.25"
@@ -93,8 +92,3 @@
libc = "0.2"
log = "0.4"
simflash = { path = "../simflash" }
-
-# Optimize some, even when building for debugging, otherwise the tests
-# are too slow.
-[profile.test]
-opt-level = 1
diff --git a/sim/mcuboot-sys/build.rs b/sim/mcuboot-sys/build.rs
index 1a08741..294aea6 100644
--- a/sim/mcuboot-sys/build.rs
+++ b/sim/mcuboot-sys/build.rs
@@ -34,6 +34,7 @@
let downgrade_prevention = env::var("CARGO_FEATURE_DOWNGRADE_PREVENTION").is_ok();
let ram_load = env::var("CARGO_FEATURE_RAM_LOAD").is_ok();
let direct_xip = env::var("CARGO_FEATURE_DIRECT_XIP").is_ok();
+ let max_align_32 = env::var("CARGO_FEATURE_MAX_ALIGN_32").is_ok();
let mut conf = CachedBuild::new();
conf.conf.define("__BOOTSIM__", None);
@@ -41,6 +42,13 @@
conf.conf.define("MCUBOOT_USE_FLASH_AREA_GET_SECTORS", None);
conf.conf.define("MCUBOOT_HAVE_ASSERT_H", None);
conf.conf.define("MCUBOOT_MAX_IMG_SECTORS", Some("128"));
+
+ if max_align_32 {
+ conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("32"));
+ } else {
+ conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("8"));
+ }
+
conf.conf.define("MCUBOOT_IMAGE_NUMBER", Some(if multiimage { "2" } else { "1" }));
if downgrade_prevention && !overwrite_only {
@@ -163,9 +171,12 @@
conf.conf.define("CONFIG_BOOT_SWAP_USING_SCRATCH", None);
conf.conf.define("MCUBOOT_SWAP_USING_SCRATCH", None);
}
+
if swap_status {
conf.conf.define("MCUBOOT_SWAP_USING_STATUS", None);
- conf.conf.define("CY_FLASH_ALIGN", "512");
+ conf.conf.define("MEMORY_ALIGN", "512");
+ conf.conf.define("PLATFORM_MAX_TRAILER_PAGE_SIZE", "512");
+ conf.conf.define("SLOTS_FOR_IMAGE", "2");
conf.conf.file("../../boot/bootutil/src/swap_status.c");
conf.conf.file("../../boot/bootutil/src/swap_status_part.c");
conf.conf.file("../../boot/bootutil/src/swap_status_misc.c");
@@ -375,6 +386,7 @@
conf.file("../../boot/bootutil/src/fault_injection_hardening.c");
conf.file("csupport/run.c");
conf.conf.include("../../boot/bootutil/include");
+ conf.conf.include("../../boot/boot/bootutil/include/bootutil/fault_injection_hardening.h");
conf.conf.include("csupport");
conf.conf.include("../../boot/zephyr/include");
conf.conf.debug(true);
diff --git a/sim/mcuboot-sys/csupport/devicetree.h b/sim/mcuboot-sys/csupport/devicetree.h
index 22a7fe6..3c96493 100644
--- a/sim/mcuboot-sys/csupport/devicetree.h
+++ b/sim/mcuboot-sys/csupport/devicetree.h
@@ -20,7 +20,8 @@
#define FLASH_AREA_ID_image_3 5
/*
- * PSoC6 area defines based on file:
+ * Flash area defines are calculated inside of FLASH_AREA_IMAGE_PRIMARY()
+ * and FLASH_AREA_IMAGE_SECONDARY(), file
* boot/cypress/MCUBootApp/sysflash/sysflash.h
*/
#define FLASH_AREA_IMAGE_0 1
diff --git a/sim/mcuboot-sys/csupport/run.c b/sim/mcuboot-sys/csupport/run.c
index fd6c3ca..07b09ad 100644
--- a/sim/mcuboot-sys/csupport/run.c
+++ b/sim/mcuboot-sys/csupport/run.c
@@ -43,7 +43,7 @@
uint32_t size);
extern int sim_flash_write(uint8_t flash_id, uint32_t offset, const uint8_t *src,
uint32_t size);
-extern uint16_t sim_flash_align(uint8_t flash_id);
+extern uint32_t sim_flash_align(uint8_t flash_id);
extern uint8_t sim_flash_erased_val(uint8_t flash_id);
struct sim_context {
@@ -222,7 +222,7 @@
#endif
}
-size_t flash_area_align(const struct flash_area *area)
+uint32_t flash_area_align(const struct flash_area *area)
{
return (size_t)sim_flash_align(area->fa_device_id);
}
@@ -245,7 +245,7 @@
};
int invoke_boot_go(struct sim_context *ctx, struct area_desc *adesc,
- struct boot_rsp *rsp)
+ struct boot_rsp *rsp, int image_id)
{
int res;
struct boot_loader_state *state;
@@ -257,14 +257,28 @@
mbedtls_platform_set_calloc_free(calloc, free);
#endif
- // NOTE: cleared internally by context_boot_go
state = malloc(sizeof(struct boot_loader_state));
sim_set_flash_areas(adesc);
sim_set_context(ctx);
if (setjmp(ctx->boot_jmpbuf) == 0) {
- res = context_boot_go(state, rsp);
+ boot_state_clear(state);
+
+#if BOOT_IMAGE_NUMBER > 1
+ if (image_id >= 0) {
+ memset(state->img_mask, 1, sizeof(state->img_mask));
+ state->img_mask[image_id] = 0;
+ }
+#else
+ (void) image_id;
+#endif /* BOOT_IMAGE_NUMBER > 1 */
+
+#if defined(MCUBOOT_RAM_LOAD)
+ res = context_boot_go_ram(state, rsp);
+#else
+ res = context_boot_go_flash(state, rsp);
+#endif
sim_reset_flash_areas();
sim_reset_context();
free(state);
@@ -357,8 +371,8 @@
// Align offset and length to sector size
#ifdef MCUBOOT_SWAP_USING_STATUS
- uint32_t sect_off = off / CY_FLASH_ALIGN * CY_FLASH_ALIGN;
- len = ((off + len - 1) / CY_FLASH_ALIGN + 1) * CY_FLASH_ALIGN - sect_off;
+ uint32_t sect_off = off / MEMORY_ALIGN * MEMORY_ALIGN;
+ len = ((off + len - 1) / MEMORY_ALIGN + 1) * MEMORY_ALIGN - sect_off;
off = sect_off;
BOOT_LOG_SIM("%s: erase with aligment at area=%d, off=%x, len=%x", __func__, area->fa_id, off, len);
#endif
@@ -476,5 +490,5 @@
uint32_t boot_magic_sz(void)
{
- return BOOT_MAGIC_SZ;
+ return BOOT_MAGIC_ALIGN_SIZE;
}
diff --git a/sim/mcuboot-sys/csupport/storage/flash_map.h b/sim/mcuboot-sys/csupport/storage/flash_map.h
index 7b20453..2438f70 100644
--- a/sim/mcuboot-sys/csupport/storage/flash_map.h
+++ b/sim/mcuboot-sys/csupport/storage/flash_map.h
@@ -124,7 +124,7 @@
/*
* Alignment restriction for flash writes.
*/
-size_t flash_area_align(const struct flash_area *);
+uint32_t flash_area_align(const struct flash_area *);
/*
* What is value is read from erased flash bytes.
diff --git a/sim/mcuboot-sys/src/api.rs b/sim/mcuboot-sys/src/api.rs
index 8d1140d..624b3e9 100644
--- a/sim/mcuboot-sys/src/api.rs
+++ b/sim/mcuboot-sys/src/api.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2017-2019 Linaro LTD
+// Copyright (c) 2017-2021 Linaro LTD
// Copyright (c) 2018-2019 JUUL Labs
//
// SPDX-License-Identifier: Apache-2.0
@@ -20,7 +20,7 @@
pub type FlashMap = HashMap<u8, FlashPtr>;
pub struct FlashParamsStruct {
- align: u16,
+ align: u32,
erased_val: u8,
}
@@ -146,7 +146,7 @@
pub fn set_flash(dev_id: u8, dev: &mut dyn Flash) {
THREAD_CTX.with(|ctx| {
ctx.borrow_mut().flash_params.insert(dev_id, FlashParamsStruct {
- align: dev.align() as u16,
+ align: dev.align() as u32,
erased_val: dev.erased_val(),
});
unsafe {
@@ -272,7 +272,7 @@
}
#[no_mangle]
-pub extern fn sim_flash_align(id: u8) -> u16 {
+pub extern fn sim_flash_align(id: u8) -> u32 {
THREAD_CTX.with(|ctx| {
ctx.borrow().flash_params.get(&id).unwrap().align
})
diff --git a/sim/mcuboot-sys/src/area.rs b/sim/mcuboot-sys/src/area.rs
index cfbebda..882152f 100644
--- a/sim/mcuboot-sys/src/area.rs
+++ b/sim/mcuboot-sys/src/area.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2017-2019 Linaro LTD
+// Copyright (c) 2017-2021 Linaro LTD
// Copyright (c) 2018-2019 JUUL Labs
// Copyright (c) 2019 Arm Limited
//
diff --git a/sim/mcuboot-sys/src/c.rs b/sim/mcuboot-sys/src/c.rs
index 5c791b8..e9bac0a 100644
--- a/sim/mcuboot-sys/src/c.rs
+++ b/sim/mcuboot-sys/src/c.rs
@@ -1,4 +1,4 @@
-// Copyright (c) 2017-2019 Linaro LTD
+// Copyright (c) 2017-2021 Linaro LTD
// Copyright (c) 2017-2019 JUUL Labs
// Copyright (c) 2019-2021 Arm Limited
//
@@ -64,7 +64,8 @@
/// Invoke the bootloader on this flash device.
pub fn boot_go(multiflash: &mut SimMultiFlash, areadesc: &AreaDesc,
- counter: Option<&mut i32>, catch_asserts: bool) -> BootGoResult {
+ counter: Option<&mut i32>, image_index: Option<i32>,
+ catch_asserts: bool) -> BootGoResult {
for (&dev_id, flash) in multiflash.iter_mut() {
api::set_flash(dev_id, flash);
}
@@ -83,9 +84,16 @@
flash_dev_id: 0,
image_off: 0,
};
- let result = unsafe {
- raw::invoke_boot_go(&mut sim_ctx as *mut _, &areadesc.get_c() as *const _,
- &mut rsp as *mut _) as i32
+ let result: i32 = unsafe {
+ match image_index {
+ None => raw::invoke_boot_go(&mut sim_ctx as *mut _,
+ &areadesc.get_c() as *const _,
+ &mut rsp as *mut _, -1) as i32,
+ Some(i) => raw::invoke_boot_go(&mut sim_ctx as *mut _,
+ &areadesc.get_c() as *const _,
+ &mut rsp as *mut _,
+ i as i32) as i32
+ }
};
let asserts = sim_ctx.c_asserts;
if let Some(c) = counter {
@@ -151,7 +159,7 @@
// be any way to get rid of this warning. See https://github.com/rust-lang/rust/issues/34798
// for information and tracking.
pub fn invoke_boot_go(sim_ctx: *mut CSimContext, areadesc: *const CAreaDesc,
- rsp: *mut BootRsp) -> libc::c_int;
+ rsp: *mut BootRsp, image_index: libc::c_int) -> libc::c_int;
pub fn boot_trailer_sz(min_write_sz: u32) -> u32;
pub fn boot_status_sz(min_write_sz: u32) -> u32;