Updated the framework with additional test suites
Signed-off-by: Gowtham Siddarth <gowtham.siddarth@arm.com>
diff --git a/api-tests/val/common/val.h b/api-tests/val/common/val.h
index de9cd8c..3e9a9d7 100644
--- a/api-tests/val/common/val.h
+++ b/api-tests/val/common/val.h
@@ -1,5 +1,5 @@
/** @file
- * Copyright (c) 2018, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
* SPDX-License-Identifier : Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,18 +18,7 @@
#ifndef _VAL_COMMON_H_
#define _VAL_COMMON_H_
-#include <string.h>
-#include <stdint.h>
-#include <stdlib.h>
-
-/* typedef's */
-typedef uint8_t bool_t;
-typedef uint32_t addr_t;
-typedef uint32_t test_id_t;
-typedef uint32_t block_id_t;
-typedef char char8_t;
-typedef uint32_t cfg_id_t;
-
+#include "pal_common.h"
#ifndef VAL_NSPE_BUILD
#define STATIC_DECLARE static
@@ -84,17 +73,22 @@
#define IS_TEST_PENDING(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_PENDING)
#define IS_TEST_START(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_START)
#define IS_TEST_END(status) (((status >> TEST_STATE_BIT) & TEST_STATE_MASK) == TEST_END)
-#define VAL_ERROR(status) (status?1:0)
+#define VAL_ERROR(status) ((status & TEST_STATUS_MASK) ? 1 : 0)
/* Test Defines */
#define TEST_PUBLISH(test_id, entry) \
- const val_test_info_t __attribute__((section(".acs_test_info"))) CONCAT(acs_test_info, entry) = {test_id, entry}
+ const val_test_info_t __attribute__((section(".acs_test_info"))) \
+ CONCAT(acs_test_info, entry) = {test_id, entry}
-#define VAL_MAX_TEST_PER_COMP 200
-#define VAL_FF_BASE 0
-#define VAL_CRYPTO_BASE 1
+#define VAL_MAX_TEST_PER_COMP 200
+#define VAL_FF_BASE 0
+#define VAL_CRYPTO_BASE 1
+#define VAL_PROTECTED_STORAGE_BASE 2
+#define VAL_INTERNAL_TRUSTED_STORAGE_BASE 3
+#define VAL_INITIAL_ATTESTATION_BASE 4
+
#define VAL_GET_COMP_NUM(test_id) \
((test_id - (test_id % VAL_MAX_TEST_PER_COMP)) / VAL_MAX_TEST_PER_COMP)
#define VAL_GET_TEST_NUM(test_id) (test_id % VAL_MAX_TEST_PER_COMP)
@@ -102,7 +96,7 @@
#define TEST_FIELD(num1,num2) (num2 << 8 | num1)
#define GET_TEST_ISOLATION_LEVEL(num) (num & 0x3)
-#define GET_WD_TIMOUT_TYPE(num) ((num >> 8) & 0x3)
+#define GET_WD_TIMOUT_TYPE(num) ((num >> 8) & 0x7)
#define TEST_CHECKPOINT_NUM(n) n
#define TEST(n) n
@@ -121,9 +115,56 @@
#define VAL_NVMEM_BLOCK_SIZE 4
#define VAL_NVMEM_OFFSET(nvmem_idx) (nvmem_idx * VAL_NVMEM_BLOCK_SIZE)
-#define UART_INIT_SIGN 0xff
+#define UART_INIT_SIGN 0xff
#define UART_PRINT_SIGN 0xfe
+#define TEST_PANIC() \
+ do { \
+ } while(1)
+
+#define TEST_ASSERT_EQUAL(arg1, arg2, checkpoint) \
+ do { \
+ if ((arg1) != arg2) \
+ { \
+ val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
+ val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
+ val->print(PRINT_ERROR, "\tExpected: %d\n", arg2); \
+ return 1; \
+ } \
+ } while (0)
+
+#define TEST_ASSERT_DUAL(arg1, status1, status2, checkpoint) \
+ do { \
+ if ((arg1) != status1 && (arg1) != status2) \
+ { \
+ val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
+ val->print(PRINT_ERROR, "\tActual: %d\n", arg1); \
+ val->print(PRINT_ERROR, "\tExpected: %d", status1); \
+ val->print(PRINT_ERROR, "or %d\n", status2); \
+ return 1; \
+ } \
+ } while (0)
+
+#define TEST_ASSERT_NOT_EQUAL(arg1, arg2, checkpoint) \
+ do { \
+ if ((arg1) == arg2) \
+ { \
+ val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d\n", checkpoint); \
+ val->print(PRINT_ERROR, "\tValue: %d\n", arg1); \
+ return 1; \
+ } \
+ } while (0)
+
+#define TEST_ASSERT_MEMCMP(buf1, buf2, size, checkpoint) \
+ do { \
+ if (memcmp(buf1, buf2, size)) \
+ { \
+ val->print(PRINT_ERROR, "\tFailed at Checkpoint: %d : ", checkpoint); \
+ val->print(PRINT_ERROR, "Unequal data in compared buffers\n", 0); \
+ return 1; \
+ } \
+ } while (0)
+
/* enums */
typedef enum {
NONSECURE = 0x0,
@@ -152,29 +193,6 @@
NV_TEST_CNT = 0x3,
} nvmem_index_t;
-typedef enum {
- WD_INIT_SEQ = 0x1,
- WD_ENABLE_SEQ = 0x2,
- WD_DISABLE_SEQ = 0x3,
- WD_STATUS_SEQ = 0x4,
-} wd_fn_type_t;
-
-typedef enum {
- WD_LOW_TIMEOUT = 0x1,
- WD_MEDIUM_TIMEOUT = 0x2,
- WD_HIGH_TIMEOUT = 0x3,
-} wd_timeout_type_t;
-
-typedef enum {
- NVMEM_READ = 0x1,
- NVMEM_WRITE = 0x2,
-} nvmem_fn_type_t;
-
-typedef enum {
- UART_INIT = 0x1,
- UART_PRINT = 0x2,
-} uart_fn_type_t;
-
/* enums to report test sub-state */
typedef enum {
VAL_STATUS_SUCCESS = 0x0,
@@ -203,6 +221,9 @@
VAL_STATUS_INVALID_SIZE = 0x26,
VAL_STATUS_DATA_MISMATCH = 0x27,
VAL_STATUS_BOOT_EXPECTED_BUT_FAILED = 0x28,
+ VAL_STATUS_INIT_ALREADY_DONE = 0x29,
+ VAL_STATUS_HEAP_NOT_AVAILABLE = 0x2A,
+ VAL_STATUS_ERROR_MAX = INT_MAX,
} val_status_t;
/* verbosity enums */
@@ -215,6 +236,14 @@
PRINT_ALWAYS = 9
} print_verbosity_t;
+/* Interrupt test function id enums */
+typedef enum {
+ TEST_PSA_EOI_WITH_NON_INTR_SIGNAL = 1,
+ TEST_PSA_EOI_WITH_MULTIPLE_SIGNALS = 2,
+ TEST_PSA_EOI_WITH_UNASSERTED_SIGNAL = 3,
+ TEST_INTR_SERVICE = 4,
+} test_intr_fn_id_t;
+
/* typedef's */
typedef struct {
boot_state_t state;
@@ -228,20 +257,6 @@
} test_count_t;
typedef struct {
- wd_fn_type_t wd_fn_type;
- addr_t wd_base_addr;
- uint32_t wd_time_us;
- uint32_t wd_timer_tick_us;
-} wd_param_t;
-
-typedef struct {
- nvmem_fn_type_t nvmem_fn_type;
- addr_t base;
- uint32_t offset;
- int size;
-} nvmem_param_t;
-
-typedef struct {
uint16_t test_num;
uint8_t block_num;
} test_info_t;
diff --git a/api-tests/val/common/val_client_defs.h b/api-tests/val/common/val_client_defs.h
index 714b7a6..db7825c 100644
--- a/api-tests/val/common/val_client_defs.h
+++ b/api-tests/val/common/val_client_defs.h
@@ -1,5 +1,5 @@
/** @file
- * Copyright (c) 2018, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
* SPDX-License-Identifier : Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,51 +18,15 @@
#ifndef _VAL_CLIENT_H_
#define _VAL_CLIENT_H_
-/****************** PSA Client API *****************/
-
-/* Note - This header file containts the declaration of PSA defined client API elements.
- * Ideally, These elements must be defined in a header file <psa_client.h> by SPM implemented
- * library and provided to clients operation in NSPE and SPE as per the specification.
- * If this is available in the platform, the elements declared as part of this
- * file can be overwritten by passing --include <path_to_psa_client_h> to setup.sh script.
- */
-
-#if PSA_IPC_IMPLEMENTED
-/* psa/client.h: Contains the Client API elements. Accessible to all applications */
-#include "psa/client.h"
-
-/* psa_manifest/sid.h: Macro definitions derived from manifest files that map from RoT Service
- * names to Service IDs (SIDs).
- * Partition manifest parse build tool must provide the implementation of this file.
-*/
-#include "psa_manifest/sid.h"
-
-#else
-
-#include "pal_sid.h"
#include "val.h"
-#define PSA_FRAMEWORK_VERSION (0x0100)
-#define PSA_VERSION_NONE (0)
-#define PSA_SUCCESS (0)
-#define PSA_CONNECTION_REFUSED (INT32_MIN + 1)
-#define PSA_CONNECTION_BUSY (INT32_MIN + 2)
-#define PSA_DROP_CONNECTION (INT32_MIN)
-#define PSA_NULL_HANDLE ((psa_handle_t)0)
-
-typedef int32_t psa_status_t;
-typedef int32_t psa_handle_t;
-
-typedef struct psa_invec {
- const void *base;
- size_t len;
-} psa_invec;
-
-typedef struct psa_outvec {
- void *base;
- size_t len;
-} psa_outvec;
-
-#endif /* #if PSA_IPC_IMPLEMENTED */
#define INVALID_SID 0x0000FA20
+
+#ifndef CLIENT_TEST_DISPATCHER_SID
+#define CLIENT_TEST_DISPATCHER_SID 0x0
+#endif
+
+#ifndef SERVER_TEST_DISPATCHER_SID
+#define SERVER_TEST_DISPATCHER_SID 0x0
+#endif
#endif /* _VAL_CLIENT_H_ */
diff --git a/api-tests/val/common/val_target.c b/api-tests/val/common/val_target.c
index bd40eb2..e3b2980 100644
--- a/api-tests/val/common/val_target.c
+++ b/api-tests/val/common/val_target.c
@@ -1,5 +1,5 @@
/** @file
- * Copyright (c) 2018, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
* SPDX-License-Identifier : Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,8 +18,17 @@
#include "val_target.h"
#include "target_database.h"
+#ifdef USE_RAW_PRINT_FOR_DRIVER_PARTITION
+#define val_print(x, y, z) \
+ do { \
+ if (x >= VERBOSE) \
+ val_print_sf(y,z); \
+ } while(0)
+#else
__UNUSED STATIC_DECLARE val_status_t val_print
(print_verbosity_t verbosity, char *string, uint32_t data);
+#endif
+
/**
@brief - Returns the base address of target configuration block database.
@param - blob : Populates the base address
diff --git a/api-tests/val/common/val_target.h b/api-tests/val/common/val_target.h
index 55d4556..c32f0a5 100644
--- a/api-tests/val/common/val_target.h
+++ b/api-tests/val/common/val_target.h
@@ -1,5 +1,5 @@
/** @file
- * Copyright (c) 2018, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited or its affiliates. All rights reserved.
* SPDX-License-Identifier : Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -62,7 +62,10 @@
} soc_peripheral_cfg_id_t;
typedef enum _MEMORY_CONFIG_ID_ {
- MEMORY_NVMEM = 0x2
+ MEMORY_NVMEM = 0x2,
+ MEMORY_NSPE_MMIO = 0x3,
+ MEMORY_CLIENT_PARTITION_MMIO = 0x4,
+ MEMORY_DRIVER_PARTITION_MMIO = 0x5,
} memory_cfg_id_t;
typedef enum _MISCELLANEOUS_CONFIG_ID_ {
@@ -74,12 +77,15 @@
Assign group type to each system component
**/
typedef enum _COMPONENT_GROUPING_{
- UART = GROUP_SOC_PERIPHERAL,
- TIMER = GROUP_SOC_PERIPHERAL,
- WATCHDOG = GROUP_SOC_PERIPHERAL,
- NVMEM = GROUP_MEMORY,
- BOOT = GROUP_MISCELLANEOUS,
- DUT = GROUP_MISCELLANEOUS,
+ UART = GROUP_SOC_PERIPHERAL,
+ TIMER = GROUP_SOC_PERIPHERAL,
+ WATCHDOG = GROUP_SOC_PERIPHERAL,
+ NVMEM = GROUP_MEMORY,
+ NSPE_MMIO = GROUP_MEMORY,
+ CLIENT_PARTITION_MMIO = GROUP_MEMORY,
+ DRIVER_PARTITION_MMIO = GROUP_MEMORY,
+ BOOT = GROUP_MISCELLANEOUS,
+ DUT = GROUP_MISCELLANEOUS,
} comp_group_assign_t;
/**
@@ -169,6 +175,7 @@
uint32_t timeout_in_micro_sec_low;
uint32_t timeout_in_micro_sec_medium;
uint32_t timeout_in_micro_sec_high;
+ uint32_t timeout_in_micro_sec_crypto;
uint32_t num_of_tick_per_micro_sec;
dev_attr_t attribute;
} soc_peripheral_desc_t;