The Architecture test suite contains a platform abstraction layer (PAL) which abstracts platform specific information from the tests.
This document provides details on the porting steps and the PAL APIs.
You must populate your system configuration and provide it as an input to test suite. This is captured in a single static input configuration file that is named as target.cfg. This file is available at api-tests/platform/targets/<platform_name>/.
An example of the input configuration file is as shown.
// UART device info uart.num=1; uart.0.base = 0x40004000; uart.0.size = 0xFFF; uart.0.intr_id = 0xFF; uart.0.permission = TYPE_READ_WRITE; // Watchdog device info watchdog.num = 1; watchdog.0.base = 0x40008000; watchdog.0.size = 0xFFF; watchdog.0.intr_id = 0xFF; watchdog.0.permission = TYPE_READ_WRITE;
More details on the structure of the input can be obtained from val/common/val_target.h.
Note: Test suite needs access to the following peripherals. When PSA_IPC_IMPLEMENTED is set to 1, driver functionalities are implemented as RoT-services in driver partition. Other Secure partitions and non-secure code calls to these RoT-services to get appropriate driver services.
Since Test suite is agnostic to various system targets, before building the tests, you must port below PAL APIs. These functions will require implementation for your target platform.
No | Prototype | Description | Parameters |
---|---|---|---|
01 | int pal_spi_read(addr_t addr, uint8_t *data, uint32_t len); | This function will read peripherals using SPI commands | addr : address of the peripheral data : read buffer len : length of the read buffer in bytes |
No | Prototype | Description | Parameters |
---|---|---|---|
01 | void pal_uart_init(addr_t uart_base_addr); | This function initializes the uart | uart_base_addr : Base address of the UART |
02 | void pal_print(char *str, uint32_t data); | This function parses the input string and writes byte by byte to print | str : Input String data : Value for Format specifier |
03 | int pal_wd_timer_init(addr_t base_addr, uint32_t time_us, uint32_t timer_tick_us); | Initializes an hardware watchdog timer | base_addr : Base address of the watchdog module time_us : Time in micro seconds timer_tick_us : Number of ticks per micro second |
04 | int pal_wd_timer_enable(addr_t base_addr); | Enables a hardware watchdog timer | base_addr : Base address of the watchdog module |
05 | int pal_wd_timer_disable(addr_t base_addr); | Disables a hardware watchdog timer | base_addr : Base address of the watchdog module |
06 | int pal_wd_timer_is_enabled(addr_t base_addr); | Checks whether hardware watchdog timer is enabled | base_addr : Base address of the watchdog module |
07 | int pal_nvmem_write(addr_t base, uint32_t offset, void *buffer, int size); | Writes 'size' bytes from buffer into non-volatile memory at a given 'base + offset' | base : Base address of NV MEM offset : Offset buffer : Pointer to source address size : Number of bytes |
08 | int pal_nvmem_read(addr_t base, uint32_t offset, void *buffer, int size); | Reads 'size' bytes from non-volatile memory at a given | base : Base address of NV MEM offset : Offset buffer : Pointer to source address size : Number of bytes |
Arm PSA test suite is distributed under Apache v2.0 License.
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