feat(rme): add SVE Realm tests
Verifies Realm with SVE support. Below tests are added
- Check whether RMI features reports proper SVE VL
- Create SVE Realm and check rdvl result
- Create SVE Realm with invalid VL and check if it fails
- Create SVE Realm and test ID registers
- Create non SVE Realm and test ID registers
- Create SVE Realm and probe all supported VLs
- Check RMM preserves NS ZCR_EL2 register
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I98a20f34ce72c7c1a353ed13678870168fa27c48
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index f3ff0ca..f3c98d8 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -140,6 +140,7 @@
#define ID_AA64PFR0_AMU_V1P1 U(0x2)
#define ID_AA64PFR0_ELX_MASK ULL(0xf)
#define ID_AA64PFR0_SVE_SHIFT U(32)
+#define ID_AA64PFR0_SVE_WIDTH U(4)
#define ID_AA64PFR0_SVE_MASK ULL(0xf)
#define ID_AA64PFR0_SVE_LENGTH U(4)
#define ID_AA64PFR0_MPAM_SHIFT U(40)
@@ -389,6 +390,11 @@
#define CPACR_EL1_FP_TRAP_ALL U(0x2)
#define CPACR_EL1_FP_TRAP_NONE U(0x3)
+#define CPACR_EL1_ZEN(x) ((x) << 16)
+#define CPACR_EL1_ZEN_TRAP_EL0 U(0x1)
+#define CPACR_EL1_ZEN_TRAP_ALL U(0x2)
+#define CPACR_EL1_ZEN_TRAP_NONE U(0x3)
+
/* SCR definitions */
#define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5))
#define SCR_AMVOFFEN_BIT (UL(1) << 35)
@@ -852,14 +858,17 @@
/*******************************************************************************
* Definitions for system register interface to SVE
******************************************************************************/
-#define ZCR_EL3 S3_6_C1_C2_0
-#define ZCR_EL2 S3_4_C1_C2_0
-
-/* ZCR_EL3 definitions */
-#define ZCR_EL3_LEN_MASK U(0xf)
+#define ID_AA64ZFR0_EL1 S3_0_C0_C4_4
/* ZCR_EL2 definitions */
-#define ZCR_EL2_LEN_MASK U(0xf)
+#define ZCR_EL2 S3_4_C1_C2_0
+#define ZCR_EL2_SVE_VL_SHIFT UL(0)
+#define ZCR_EL2_SVE_VL_WIDTH UL(4)
+
+/* ZCR_EL1 definitions */
+#define ZCR_EL1 S3_0_C1_C2_0
+#define ZCR_EL1_SVE_VL_SHIFT UL(0)
+#define ZCR_EL1_SVE_VL_WIDTH UL(4)
/*******************************************************************************
* Definitions for system register interface to SME
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index b7c0418..77dc881 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -509,8 +509,10 @@
DEFINE_RENAME_SYSREG_RW_FUNCS(pmbsr_el1, PMBSR_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(pmscr_el2, PMSCR_EL2)
-DEFINE_RENAME_SYSREG_WRITE_FUNC(zcr_el3, ZCR_EL3)
-DEFINE_RENAME_SYSREG_WRITE_FUNC(zcr_el2, ZCR_EL2)
+/* Definitions for system register interface to SVE */
+DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64zfr0_el1, ID_AA64ZFR0_EL1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el2, ZCR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(zcr_el1, ZCR_EL1)
DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64smfr0_el1, ID_AA64SMFR0_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(svcr, SVCR)
diff --git a/include/lib/extensions/sve.h b/include/lib/extensions/sve.h
index 07bd663..994fbfe 100644
--- a/include/lib/extensions/sve.h
+++ b/include/lib/extensions/sve.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,6 +7,8 @@
#ifndef SVE_H
#define SVE_H
+#include <arch.h>
+
#define fill_sve_helper(num) "ldr z"#num", [%0, #"#num", MUL VL];"
#define read_sve_helper(num) "str z"#num", [%0, #"#num", MUL VL];"
@@ -17,10 +19,21 @@
#define SVE_VECTOR_LEN_BYTES 256
#define SVE_NUM_VECTORS 32
+#define SVE_VQ_ARCH_MAX ((1 << ZCR_EL2_SVE_VL_WIDTH) - 1)
+
+/* convert SVE VL in bytes to VQ */
+#define SVE_VL_TO_VQ(vl_bytes) (((vl_bytes) >> 4U) - 1)
+
+/* convert SVE VQ to bits */
+#define SVE_VQ_TO_BITS(vq) (((vq) + 1U) << 7U)
+
#ifndef __ASSEMBLY__
typedef uint8_t sve_vector_t[SVE_VECTOR_LEN_BYTES];
+void sve_config_vq(uint8_t sve_vq);
+uint32_t sve_probe_vl(uint8_t sve_max_vq);
+
#ifdef __aarch64__
/* Returns the SVE implemented VL in bytes (constrained by ZCR_EL3.LEN) */
diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
index 9dcf58d..8a54e60 100644
--- a/include/lib/utils_def.h
+++ b/include/lib/utils_def.h
@@ -162,7 +162,10 @@
#define COMPILER_BARRIER() __asm__ volatile ("" ::: "memory")
-#define MASK(regfield) \
+#define INPLACE(regfield, val) \
+ (((val) + UL(0)) << (regfield##_SHIFT))
+
+#define MASK(regfield) \
((~0ULL >> (64ULL - (regfield##_WIDTH))) << (regfield##_SHIFT))
#define EXTRACT(regfield, reg) \
diff --git a/include/runtime_services/host_realm_managment/host_realm_rmi.h b/include/runtime_services/host_realm_managment/host_realm_rmi.h
index 923c003..a208833 100644
--- a/include/runtime_services/host_realm_managment/host_realm_rmi.h
+++ b/include/runtime_services/host_realm_managment/host_realm_rmi.h
@@ -243,8 +243,10 @@
#define RMI_FEATURE_REGISTER_0_S2SZ GENMASK(7, 0)
#define RMI_FEATURE_REGISTER_0_LPA2 BIT(8)
-#define RMI_FEATURE_REGISTER_0_SVE_EN BIT(9)
-#define RMI_FEATURE_REGISTER_0_SVE_VL GENMASK(13, 10)
+#define RMI_FEATURE_REGISTER_0_SVE_EN_SHIFT UL(9)
+#define RMI_FEATURE_REGISTER_0_SVE_EN_WIDTH UL(1)
+#define RMI_FEATURE_REGISTER_0_SVE_VL_SHIFT UL(10)
+#define RMI_FEATURE_REGISTER_0_SVE_VL_WIDTH UL(4)
#define RMI_FEATURE_REGISTER_0_NUM_BPS GENMASK(17, 14)
#define RMI_FEATURE_REGISTER_0_NUM_WPS GENMASK(21, 18)
#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(22)
diff --git a/include/runtime_services/host_realm_managment/host_realm_sve.h b/include/runtime_services/host_realm_managment/host_realm_sve.h
new file mode 100644
index 0000000..8ec4cd7
--- /dev/null
+++ b/include/runtime_services/host_realm_managment/host_realm_sve.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2023, Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef HOST_REALM_SVE_H
+#define HOST_REALM_SVE_H
+
+#include <stdint.h>
+
+struct sve_cmd_rdvl {
+ uint64_t rdvl;
+};
+
+struct sve_cmd_id_regs {
+ uint64_t id_aa64pfr0_el1;
+ uint64_t id_aa64zfr0_el1;
+};
+
+struct sve_cmd_probe_vl {
+ uint32_t vl_bitmap;
+};
+
+#endif /* HOST_REALM_SVE_H */
diff --git a/include/runtime_services/host_realm_managment/host_shared_data.h b/include/runtime_services/host_realm_managment/host_shared_data.h
index 7720334..cd19640 100644
--- a/include/runtime_services/host_realm_managment/host_shared_data.h
+++ b/include/runtime_services/host_realm_managment/host_shared_data.h
@@ -13,6 +13,8 @@
#define MAX_BUF_SIZE 10240U
#define MAX_DATA_SIZE 5U
+#define REALM_CMD_BUFFER_SIZE 1024U
+
/*
* This structure maps the shared memory to be used between the Host and Realm
* payload
@@ -30,6 +32,9 @@
/* array of output results passed from Realm to Host */
u_register_t realm_out_val[MAX_DATA_SIZE];
+ /* Buffer to save Realm command results */
+ uint8_t realm_cmd_output_buffer[REALM_CMD_BUFFER_SIZE];
+
/* Lock to avoid concurrent accesses to log_buffer */
spinlock_t printf_lock;
} host_shared_data_t;
@@ -45,7 +50,10 @@
REALM_PMU_PRESERVE,
REALM_PMU_INTERRUPT,
REALM_REQ_FPU_FILL_CMD,
- REALM_REQ_FPU_CMP_CMD
+ REALM_REQ_FPU_CMP_CMD,
+ REALM_SVE_RDVL,
+ REALM_SVE_ID_REGISTERS,
+ REALM_SVE_PROBE_VL
};
/*