feat(fpmr): test FPMR register access

Change-Id: I326690564d01596fb4f4b449f4f314699ccfe3c4
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 6b41e51..8de7a86 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -319,6 +319,14 @@
 		}								\
 	} while (false)
 
+#define SKIP_TEST_IF_FPMR_NOT_SUPPORTED()					\
+	do {									\
+		if(!is_feat_fpmr_present()) {					\
+			tftf_testcase_printf("FEAT_FPMR not supported\n");	\
+			return TEST_RESULT_SKIPPED;				\
+		}								\
+	} while (false)
+
 #define SKIP_TEST_IF_RME_NOT_SUPPORTED_OR_RMM_IS_TRP()				\
 	do {									\
 		u_register_t retrmm = 0U;					\
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index dd2d967..0580f8a 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -515,6 +515,13 @@
 #define ID_AA64PFR1_DF2_SHIFT			U(56)
 #define ID_AA64PFR1_DF2_WIDTH			ULL(0x4)
 
+/* ID_AA64PFR2_EL1 definitions */
+#define ID_AA64PFR2_EL1				S3_0_C0_C4_2
+#define ID_AA64PFR2_EL1_FPMR_SHIFT		U(32)
+#define ID_AA64PFR2_EL1_FPMR_MASK		ULL(0xf)
+#define ID_AA64PFR2_EL1_FPMR_WIDTH		U(4)
+#define ID_AA64PFR2_EL1_FPMR_SUPPORTED		ULL(0x1)
+
 /* ID_PFR1_EL1 definitions */
 #define ID_PFR1_VIRTEXT_SHIFT	U(12)
 #define ID_PFR1_VIRTEXT_MASK	U(0xf)
@@ -1563,4 +1570,9 @@
 #define SCXTNUM_EL1		S3_0_C13_C0_7
 #define SCXTNUM_EL0		S3_3_C13_C0_7
 
+/*******************************************************************************
+ * Floating Point Mode Register definitions
+ ******************************************************************************/
+#define FPMR			S3_3_C4_C4_2
+
 #endif /* ARCH_H */
diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h
index 96d899a..2c9ae80 100644
--- a/include/lib/aarch64/arch_features.h
+++ b/include/lib/aarch64/arch_features.h
@@ -532,4 +532,9 @@
 		read_id_aa64pfr1_el1()) == 1UL);
 }
 
+static inline bool is_feat_fpmr_present(void)
+{
+	return EXTRACT(ID_AA64PFR2_EL1_FPMR, read_id_aa64pfr2_el1())
+		== ID_AA64PFR2_EL1_FPMR_SUPPORTED;
+}
 #endif /* ARCH_FEATURES_H */
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index a765548..0774e7b 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -190,6 +190,7 @@
 DEFINE_SYSREG_READ_FUNC(id_aa64isar1_el1)
 DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
 DEFINE_SYSREG_READ_FUNC(id_aa64pfr1_el1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(id_aa64pfr2_el1, ID_AA64PFR2_EL1)
 DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1)
 DEFINE_SYSREG_READ_FUNC(id_afr0_el1)
 DEFINE_SYSREG_READ_FUNC(id_pfr0_el1)
@@ -677,6 +678,9 @@
 DEFINE_RENAME_SYSREG_RW_FUNCS(fpcr, FPCR)
 DEFINE_RENAME_SYSREG_RW_FUNCS(fpsr, FPSR)
 
+/* Floating point Mode Register */
+DEFINE_RENAME_SYSREG_RW_FUNCS(fpmr, FPMR)
+
 /* ID_AA64ISAR2_EL1 */
 DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64isar2_el1, ID_AA64ISAR2_EL1)