diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 8cddc72..ced1745 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -115,6 +115,16 @@
 		}								\
 	} while (0)
 
+#define SKIP_TEST_IF_DEBUGV8P9_NOT_SUPPORTED()					\
+	do {									\
+		if (arch_get_debug_version() != 				\
+				ID_AA64DFR0_V8_9_DEBUG_ARCH_SUPPORTED) {	\
+			tftf_testcase_printf(					\
+				"Debugv8p9 not supported\n");			\
+			return TEST_RESULT_SKIPPED;				\
+		}								\
+	} while (0)
+
 #define SKIP_TEST_IF_SVE_NOT_SUPPORTED()					\
 	do {									\
 		if (!is_armv8_2_sve_present()) {				\
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index 6a0d286..a57b8de 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -194,6 +194,7 @@
 #define ID_AA64DFR0_V8_DEBUG_ARCH_VHE_SUPPORTED	U(7)
 #define ID_AA64DFR0_V8_2_DEBUG_ARCH_SUPPORTED	U(8)
 #define ID_AA64DFR0_V8_4_DEBUG_ARCH_SUPPORTED	U(9)
+#define ID_AA64DFR0_V8_9_DEBUG_ARCH_SUPPORTED   U(0xb)
 
 /* ID_AA64DFR0_EL1.HPMN0 definitions */
 #define ID_AA64DFR0_HPMN0_SHIFT			U(60)
@@ -1289,6 +1290,11 @@
  ******************************************************************************/
 #define CNTPOFF_EL2  S3_4_C14_C0_6
 
+/******************************************************************************
+ * Armv8.9 - Breakpoint and Watchpoint Selection Register
+ ******************************************************************************/
+#define MDSELR_EL1		S2_0_C0_C4_2
+
 /*******************************************************************************
  * Armv9.0 - Trace Buffer Extension System Registers
  ******************************************************************************/
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 4b9c33e..a91625c 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -611,6 +611,8 @@
 DEFINE_RENAME_SYSREG_RW_FUNCS(trcclaimclr, TRCCLAIMCLR)
 DEFINE_RENAME_SYSREG_READ_FUNC(trcdevarch, TRCDEVARCH)
 
+DEFINE_RENAME_SYSREG_READ_FUNC(mdselr_el1, MDSELR_EL1)
+
 /* FEAT_HCX HCRX_EL2 */
 DEFINE_RENAME_SYSREG_RW_FUNCS(hcrx_el2, HCRX_EL2)