feat(rme): add PMU Realm tests
This patch adds Realm PMU payload tests with
PMU interrupt handling.
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I86ef96252e04c57db385e129227cc0d7dcd1fec2
diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index aa13a3f..66a5f27 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -443,4 +443,8 @@
* OFF.
*/
void wait_for_core_to_turn_off(unsigned int mpidr);
+
+/* Generate 64-bit random number */
+unsigned long long rand64(void);
+
#endif /* __TEST_HELPERS_H__ */
diff --git a/include/drivers/arm/gic_v3.h b/include/drivers/arm/gic_v3.h
index 0346a23..e164103 100644
--- a/include/drivers/arm/gic_v3.h
+++ b/include/drivers/arm/gic_v3.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -83,6 +83,25 @@
#define IGRPEN1_EL1_ENABLE_SHIFT 0
#define IGRPEN1_EL1_ENABLE_BIT (1 << IGRPEN1_EL1_ENABLE_SHIFT)
+/* ICH_ICH_LR<n>_EL2 definitions */
+#define ICH_LRn_EL2_STATE_Invalid (0UL << 62)
+#define ICH_LRn_EL2_STATE_Pending (1UL << 62)
+#define ICH_LRn_EL2_STATE_Active (2UL << 62)
+#define ICH_LRn_EL2_STATE_Pending_Active (3UL << 62)
+#define ICH_LRn_EL2_Group_0 (0UL << 60)
+#define ICH_LRn_EL2_Group_1 (1UL << 60)
+#define ICH_LRn_EL2_Priority_SHIFT 48
+#define ICH_LRn_EL2_Priority_MASK 0xFF
+#define ICH_LRn_EL2_vINTID_SHIFT 0
+#define ICH_LRn_EL2_vINTID_MASK 0xFFFF
+
+/* ICV_CTLR_EL1 definitions */
+#define ICV_CTLR_EL1_PRIbits_SHIFT 8
+#define ICV_CTLR_EL1_PRIbits_MASK 7
+
+/* ICV_IGRPEN1_EL1 definition */
+#define ICV_IGRPEN1_EL1_Enable 1UL
+
/* The highest affinity 0 that can be a SGI target*/
#define SGI_TARGET_MAX_AFF0 16
diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h
index 230d69a..53ef4ba 100644
--- a/include/lib/aarch32/arch.h
+++ b/include/lib/aarch32/arch.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -440,10 +440,11 @@
/* PMCCFILTR definitions */
#define PMCCFILTR_EL0_P_BIT (U(1) << 31)
+#define PMCCFILTR_EL0_U_BIT (U(1) << 30)
#define PMCCFILTR_EL0_NSK_BIT (U(1) << 29)
+#define PMCCFILTR_EL0_NSU_BIT (U(1) << 28)
#define PMCCFILTR_EL0_NSH_BIT (U(1) << 27)
#define PMCCFILTR_EL0_M_BIT (U(1) << 26)
-#define PMCCFILTR_EL0_MT_BIT (U(1) << 25)
#define PMCCFILTR_EL0_SH_BIT (U(1) << 24)
/* PMU event counter ID definitions */
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index e48e51c..f43bc8a 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -85,15 +85,21 @@
#define ICC_CTLR_EL3 S3_6_C12_C12_4
#define ICC_PMR_EL1 S3_0_C4_C6_0
#define ICC_RPR_EL1 S3_0_C12_C11_3
-#define ICC_IGRPEN1_EL3 S3_6_c12_c12_7
-#define ICC_IGRPEN0_EL1 S3_0_c12_c12_6
-#define ICC_HPPIR0_EL1 S3_0_c12_c8_2
-#define ICC_HPPIR1_EL1 S3_0_c12_c12_2
-#define ICC_IAR0_EL1 S3_0_c12_c8_0
-#define ICC_IAR1_EL1 S3_0_c12_c12_0
-#define ICC_EOIR0_EL1 S3_0_c12_c8_1
-#define ICC_EOIR1_EL1 S3_0_c12_c12_1
-#define ICC_SGI0R_EL1 S3_0_c12_c11_7
+#define ICC_IGRPEN1_EL3 S3_6_C12_C12_7
+#define ICC_IGRPEN0_EL1 S3_0_C12_C12_6
+#define ICC_HPPIR0_EL1 S3_0_C12_C8_2
+#define ICC_HPPIR1_EL1 S3_0_C12_C12_2
+#define ICC_IAR0_EL1 S3_0_C12_C8_0
+#define ICC_IAR1_EL1 S3_0_C12_C12_0
+#define ICC_EOIR0_EL1 S3_0_C12_C8_1
+#define ICC_EOIR1_EL1 S3_0_C12_C12_1
+#define ICC_SGI0R_EL1 S3_0_C12_C11_7
+
+#define ICV_CTRL_EL1 S3_0_C12_C12_4
+#define ICV_IAR1_EL1 S3_0_C12_C12_0
+#define ICV_IGRPEN1_EL1 S3_0_C12_C12_7
+#define ICV_EOIR1_EL1 S3_0_C12_C12_1
+#define ICV_PMR_EL1 S3_0_C4_C6_0
/*******************************************************************************
* Generic timer memory mapped registers & offsets
@@ -808,20 +814,30 @@
/* PMEVTYPER<n>_EL0 definitions */
#define PMEVTYPER_EL0_P_BIT (U(1) << 31)
+#define PMEVTYPER_EL0_U_BIT (U(1) << 30)
#define PMEVTYPER_EL0_NSK_BIT (U(1) << 29)
+#define PMEVTYPER_EL0_NSU_BIT (U(1) << 28)
#define PMEVTYPER_EL0_NSH_BIT (U(1) << 27)
#define PMEVTYPER_EL0_M_BIT (U(1) << 26)
#define PMEVTYPER_EL0_MT_BIT (U(1) << 25)
#define PMEVTYPER_EL0_SH_BIT (U(1) << 24)
+#define PMEVTYPER_EL0_T_BIT (U(1) << 23)
+#define PMEVTYPER_EL0_RLK_BIT (U(1) << 22)
+#define PMEVTYPER_EL0_RLU_BIT (U(1) << 21)
+#define PMEVTYPER_EL0_RLH_BIT (U(1) << 20)
#define PMEVTYPER_EL0_EVTCOUNT_BITS U(0x0000FFFF)
/* PMCCFILTR_EL0 definitions */
#define PMCCFILTR_EL0_P_BIT (U(1) << 31)
+#define PMCCFILTR_EL0_U_BIT (U(1) << 30)
#define PMCCFILTR_EL0_NSK_BIT (U(1) << 29)
#define PMCCFILTR_EL0_NSH_BIT (U(1) << 27)
#define PMCCFILTR_EL0_M_BIT (U(1) << 26)
-#define PMCCFILTR_EL0_MT_BIT (U(1) << 25)
#define PMCCFILTR_EL0_SH_BIT (U(1) << 24)
+#define PMCCFILTR_EL0_T_BIT (U(1) << 23)
+#define PMCCFILTR_EL0_RLK_BIT (U(1) << 22)
+#define PMCCFILTR_EL0_RLU_BIT (U(1) << 21)
+#define PMCCFILTR_EL0_RLH_BIT (U(1) << 20)
/* PMSELR_EL0 definitions */
#define PMSELR_EL0_SEL_SHIFT U(0)
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index f79174e..7c3ffc5 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -409,16 +409,22 @@
DEFINE_SYSREG_RW_FUNCS(mdcr_el2)
DEFINE_SYSREG_RW_FUNCS(mdcr_el3)
DEFINE_SYSREG_RW_FUNCS(hstr_el2)
-DEFINE_SYSREG_RW_FUNCS(pmcr_el0)
-DEFINE_SYSREG_RW_FUNCS(pmcntenset_el0)
-DEFINE_SYSREG_READ_FUNC(pmccntr_el0)
-DEFINE_SYSREG_RW_FUNCS(pmccfiltr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmcr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmcntenclr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmcntenset_el0)
+DEFINE_SYSREG_RW_FUNCS(pmccntr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmccfiltr_el0)
DEFINE_SYSREG_RW_FUNCS(pmevtyper0_el0)
-DEFINE_SYSREG_READ_FUNC(pmevcntr0_el0)
+DEFINE_SYSREG_RW_FUNCS(pmevcntr0_el0)
+DEFINE_SYSREG_RW_FUNCS(pmovsclr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmovsset_el0)
DEFINE_SYSREG_RW_FUNCS(pmselr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmuserenr_el0);
DEFINE_SYSREG_RW_FUNCS(pmxevtyper_el0)
DEFINE_SYSREG_RW_FUNCS(pmxevcntr_el0)
+DEFINE_SYSREG_RW_FUNCS(pmintenclr_el1)
+DEFINE_SYSREG_RW_FUNCS(pmintenset_el1)
/* parameterised event counter accessors */
static inline u_register_t read_pmevcntrn_el0(int ctr_num)
@@ -450,7 +456,6 @@
DEFINE_SYSREG_READ_FUNC(rndrrs)
/* GICv3 System Registers */
-
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3)
@@ -468,6 +473,12 @@
DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_sgi0r_el1, ICC_SGI0R_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sgi1r, ICC_SGI1R)
+DEFINE_RENAME_SYSREG_RW_FUNCS(icv_ctrl_el1, ICV_CTRL_EL1)
+DEFINE_RENAME_SYSREG_READ_FUNC(icv_iar1_el1, ICV_IAR1_EL1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(icv_igrpen1_el1, ICV_IGRPEN1_EL1)
+DEFINE_RENAME_SYSREG_WRITE_FUNC(icv_eoir1_el1, ICV_EOIR1_EL1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(icv_pmr_el1, ICV_PMR_EL1)
+
DEFINE_RENAME_SYSREG_RW_FUNCS(amcr_el0, AMCR_EL0)
DEFINE_RENAME_SYSREG_RW_FUNCS(amcgcr_el0, AMCGCR_EL0)
DEFINE_RENAME_SYSREG_READ_FUNC(amcfgr_el0, AMCFGR_EL0)
diff --git a/include/runtime_services/host_realm_managment/host_realm_helper.h b/include/runtime_services/host_realm_managment/host_realm_helper.h
index 255f257..6269efd 100644
--- a/include/runtime_services/host_realm_managment/host_realm_helper.h
+++ b/include/runtime_services/host_realm_managment/host_realm_helper.h
@@ -1,24 +1,25 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef HOST_REALM_HELPER_H
#define HOST_REALM_HELPER_H
+#include <stdlib.h>
#include <host_realm_rmi.h>
+#include <tftf_lib.h>
bool host_create_realm_payload(u_register_t realm_payload_adr,
u_register_t plat_mem_pool_adr,
u_register_t plat_mem_pool_size,
- u_register_t realm_pages_size);
+ u_register_t realm_pages_size,
+ u_register_t feature_flag);
bool host_create_shared_mem(
u_register_t ns_shared_mem_adr,
u_register_t ns_shared_mem_size);
bool host_destroy_realm(void);
-bool host_enter_realm_execute(uint8_t cmd);
-
+bool host_enter_realm_execute(uint8_t cmd, struct realm **realm_ptr);
test_result_t host_cmp_result(void);
#endif /* HOST_REALM_HELPER_H */
-
diff --git a/include/runtime_services/host_realm_managment/host_realm_mem_layout.h b/include/runtime_services/host_realm_managment/host_realm_mem_layout.h
index 2c5a605..6e94b30 100644
--- a/include/runtime_services/host_realm_managment/host_realm_mem_layout.h
+++ b/include/runtime_services/host_realm_managment/host_realm_mem_layout.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -35,13 +35,13 @@
/*
* Default values defined in platform.mk, and can be provided as build arguments
- * TFTF_MAX_IMAGE_SIZE: 1mb
+ * TFTF_MAX_IMAGE_SIZE: 1MB
*/
#ifdef TFTF_MAX_IMAGE_SIZE
-/* 1MB for shared buffer between Realm and Host*/
+/* 1MB for shared buffer between Realm and Host */
#define NS_REALM_SHARED_MEM_SIZE U(0x100000)
-/* 3MB of memory used as a pool for realm's objects creation*/
+/* 3MB of memory used as a pool for realm's objects creation */
#define PAGE_POOL_MAX_SIZE U(0x300000)
/* Base address of each section */
#define REALM_IMAGE_BASE (TFTF_BASE + TFTF_MAX_IMAGE_SIZE)
diff --git a/include/runtime_services/host_realm_managment/host_realm_pmu.h b/include/runtime_services/host_realm_managment/host_realm_pmu.h
new file mode 100644
index 0000000..48089f3
--- /dev/null
+++ b/include/runtime_services/host_realm_managment/host_realm_pmu.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2023, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef HOST_REALM_PMU_H
+#define HOST_REALM_PMU_H
+
+#include <arch_helpers.h>
+
+/* PMU physical interrupt */
+#define PMU_PPI 23UL
+
+/* PMU virtual interrupt */
+#define PMU_VIRQ PMU_PPI
+
+/* Clear bits P0-P30, C and F0 */
+#define PMU_CLEAR_ALL 0x1FFFFFFFF
+
+/* Number of event counters implemented */
+#define GET_CNT_NUM \
+ ((read_pmcr_el0() >> PMCR_EL0_N_SHIFT) & PMCR_EL0_N_MASK)
+
+void host_set_pmu_state(void);
+bool host_check_pmu_state(void);
+
+#endif /* HOST_REALM_PMU_H */
diff --git a/include/runtime_services/host_realm_managment/host_realm_rmi.h b/include/runtime_services/host_realm_managment/host_realm_rmi.h
index dcf0982..923c003 100644
--- a/include/runtime_services/host_realm_managment/host_realm_rmi.h
+++ b/include/runtime_services/host_realm_managment/host_realm_rmi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -9,8 +9,8 @@
#define HOST_REALM_RMI_H
#include <stdint.h>
+#include <stdbool.h>
-#include <realm_rsi.h>
#include <smccc.h>
#include <utils_def.h>
@@ -426,7 +426,13 @@
unsigned char ripas_value; /* 0x510 */
}, 0x500, 0x600);
/* Host call immediate value */
- SET_MEMBER(unsigned int imm, 0x600, 0x800); /* 0x600 */
+ SET_MEMBER(unsigned int imm, 0x600, 0x700); /* 0x600 */
+ /* PMU overflow */
+ SET_MEMBER(unsigned long pmu_ovf, 0x700, 0x708); /* 0x700 */
+ /* PMU interrupt enable */
+ SET_MEMBER(unsigned long pmu_intr_en, 0x708, 0x710); /* 0x708 */
+ /* PMU counter enable */
+ SET_MEMBER(unsigned long pmu_cntr_en, 0x710, 0x800); /* 0x710 */
};
/*
@@ -469,34 +475,28 @@
};
/* RMI/SMC */
-u_register_t rmi_version(void);
-u_register_t rmi_granule_delegate(u_register_t addr);
-u_register_t rmi_granule_undelegate(u_register_t addr);
-u_register_t rmi_realm_create(u_register_t rd, u_register_t params_ptr);
-u_register_t rmi_realm_destroy(u_register_t rd);
-u_register_t rmi_features(u_register_t index, u_register_t *features);
+u_register_t host_rmi_version(void);
+u_register_t host_rmi_granule_delegate(u_register_t addr);
+u_register_t host_rmi_granule_undelegate(u_register_t addr);
+u_register_t host_rmi_realm_create(u_register_t rd, u_register_t params_ptr);
+u_register_t host_rmi_realm_destroy(u_register_t rd);
+u_register_t host_rmi_features(u_register_t index, u_register_t *features);
/* Realm management */
-u_register_t realm_map_protected_data_unknown(struct realm *realm,
- u_register_t target_pa,
- u_register_t map_size);
-u_register_t realm_create(struct realm *realm);
-u_register_t realm_map_payload_image(struct realm *realm,
- u_register_t realm_payload_adr);
-u_register_t realm_map_ns_shared(struct realm *realm,
- u_register_t ns_shared_mem_adr,
- u_register_t ns_shared_mem_size);
-u_register_t realm_rec_create(struct realm *realm);
-u_register_t realm_activate(struct realm *realm);
-u_register_t realm_destroy(struct realm *realm);
-u_register_t realm_rec_enter(struct realm *realm, u_register_t *exit_reason,
- unsigned int *test_result);
-u_register_t realm_init_ipa_state(struct realm *realm,
- u_register_t level,
- u_register_t start,
- uint64_t end);
-test_result_t realm_cmp_result(void);
-void rmi_init_cmp_result(void);
-bool rmi_get_cmp_result(void);
+u_register_t host_realm_create(struct realm *realm);
+u_register_t host_realm_map_payload_image(struct realm *realm,
+ u_register_t realm_payload_adr);
+u_register_t host_realm_map_ns_shared(struct realm *realm,
+ u_register_t ns_shared_mem_adr,
+ u_register_t ns_shared_mem_size);
+u_register_t host_realm_rec_create(struct realm *realm);
+u_register_t host_realm_activate(struct realm *realm);
+u_register_t host_realm_destroy(struct realm *realm);
+u_register_t host_realm_rec_enter(struct realm *realm, u_register_t *exit_reason,
+ unsigned int *host_call_result);
+u_register_t host_realm_init_ipa_state(struct realm *realm, u_register_t level,
+ u_register_t start, uint64_t end);
+void host_rmi_init_cmp_result(void);
+bool host_rmi_get_cmp_result(void);
#endif /* HOST_REALM_RMI_H */
diff --git a/include/runtime_services/host_realm_managment/host_shared_data.h b/include/runtime_services/host_realm_managment/host_shared_data.h
index 9c9cc8c..ca379e2 100644
--- a/include/runtime_services/host_realm_managment/host_shared_data.h
+++ b/include/runtime_services/host_realm_managment/host_shared_data.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -18,16 +18,16 @@
* payload
*/
typedef struct host_shared_data {
- /* Buffer used from Realm for logging*/
+ /* Buffer used from Realm for logging */
uint8_t log_buffer[MAX_BUF_SIZE];
- /* Command set from Host and used by Realm*/
+ /* Command set from Host and used by Realm */
uint8_t realm_cmd;
- /* array of params passed from Host to Realm*/
+ /* array of params passed from Host to Realm */
u_register_t host_param_val[MAX_DATA_SIZE];
- /* array of output results passed from Realm to Host*/
+ /* array of output results passed from Realm to Host */
u_register_t realm_out_val[MAX_DATA_SIZE];
/* Lock to avoid concurrent accesses to log_buffer */
@@ -39,7 +39,11 @@
*/
enum realm_cmd {
REALM_SLEEP_CMD = 1U,
- REALM_GET_RSI_VERSION
+ REALM_GET_RSI_VERSION,
+ REALM_PMU_CYCLE,
+ REALM_PMU_EVENT,
+ REALM_PMU_PRESERVE,
+ REALM_PMU_INTERRUPT
};
/*
@@ -49,10 +53,18 @@
HOST_CMD_INDEX = 0U,
HOST_SLEEP_INDEX
};
+
+enum host_call_cmd {
+ HOST_CALL_GET_SHARED_BUFF_CMD = 1U,
+ HOST_CALL_EXIT_SUCCESS_CMD,
+ HOST_CALL_EXIT_FAILED_CMD
+};
+
/*
* Return shared buffer pointer mapped as host_shared_data_t structure
*/
host_shared_data_t *host_get_shared_structure(void);
+
/*
* Set data to be shared from Host to realm
*/
diff --git a/include/runtime_services/host_realm_managment/realm_def.h b/include/runtime_services/host_realm_managment/realm_def.h
index 22cd380..618007e 100644
--- a/include/runtime_services/host_realm_managment/realm_def.h
+++ b/include/runtime_services/host_realm_managment/realm_def.h
@@ -10,7 +10,7 @@
#include <xlat_tables_defs.h>
-/* 1mb for Realm payload as a default value*/
+/* 1MB for Realm payload as a default value */
#define REALM_MAX_LOAD_IMG_SIZE U(0x100000)
#define REALM_STACK_SIZE 0x1000U
#define DATA_PATTERN_1 0x12345678U