tree 951e6f25058090c88c1de8854a23dbf3e9266bec
parent 47415f560939c3ddc5272816fdbe4b9a7f61d1ce
author Madhukar Pappireddy <madhukar.pappireddy@arm.com> 1720214314 -0500
committer Madhukar Pappireddy <madhukar.pappireddy@arm.com> 1724084751 -0500

fix(cactus): skip computing linear core id

On a S-EL2 based SPMC, computing of linear core id is trivial as it
can be simply extracted from a read of MPIDR, which is virtualized
through VMPIDR_EL2 register to return vcpu index, followed by a mask operation.

However, on a non-SEL2 based SPMC, read of MPIDR by S-EL1 SP returns
physical MPIDR. Computing linear core id at this stage in early boot
is complicated given the operations needed to interpret the various
levels of affinity which is platform dependent. Hence, rather than
trying to compute linear id from MPIDR, reuse the physical core id
populated by SPMC in x4 register.

Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I21f2fbbd71e8a67c851cb28f92ab5b8d39e0f644