feat(fpu): add helper routines to read, write, compare FPU registers
Add helper routines to read, write, write_rand and compare FPU state
and FPU control/status registers.
These helper routines can be called by testcases running in NS-EL2,
R-EL1, S-EL1 payload. The caller has to pass memory to read/write FPU
registers.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I10ae5487c9f58e46434c1bd5b42fd458ec755045
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 39461d5..4b9c33e 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -614,8 +614,9 @@
/* FEAT_HCX HCRX_EL2 */
DEFINE_RENAME_SYSREG_RW_FUNCS(hcrx_el2, HCRX_EL2)
-/* Control floating point behaviour */
+/* Floating point control and status register */
DEFINE_RENAME_SYSREG_RW_FUNCS(fpcr, FPCR)
+DEFINE_RENAME_SYSREG_RW_FUNCS(fpsr, FPSR)
/* ID_AA64ISAR2_EL1 */
DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64isar2_el1, ID_AA64ISAR2_EL1)
diff --git a/include/lib/extensions/fpu.h b/include/lib/extensions/fpu.h
index d7b4f99..1a82818 100644
--- a/include/lib/extensions/fpu.h
+++ b/include/lib/extensions/fpu.h
@@ -11,44 +11,35 @@
#define FPU_Q_SIZE 16U
#define FPU_Q_COUNT 32U
-/* These defines are needed by assembly code to access FPU registers. */
-#define FPU_OFFSET_Q 0U
-#define FPU_OFFSET_FPSR (FPU_Q_SIZE * FPU_Q_COUNT)
-#define FPU_OFFSET_FPCR (FPU_OFFSET_FPSR + 8)
-
#ifndef __ASSEMBLER__
#include <stdbool.h>
#include <stdint.h>
-typedef struct fpu_reg_state {
- uint8_t q[FPU_Q_COUNT][FPU_Q_SIZE];
- unsigned long fpsr;
+typedef uint8_t fpu_q_reg_t[FPU_Q_SIZE] __aligned(16);
+typedef struct fpu_cs_regs {
unsigned long fpcr;
-} fpu_reg_state_t __aligned(16);
+ unsigned long fpsr;
+} fpu_cs_regs_t __aligned(16);
-/*
- * Read and compare FPU state registers with provided template values in parameters.
- */
-bool fpu_state_compare_template(fpu_reg_state_t *fpu);
+typedef struct fpu_state {
+ fpu_q_reg_t q_regs[FPU_Q_COUNT];
+ fpu_cs_regs_t cs_regs;
+} fpu_state_t __aligned(16);
-/*
- * Fill the template with random values and copy it to
- * FPU state registers(SIMD vectors, FPCR, FPSR).
- */
-void fpu_state_fill_regs_and_template(fpu_reg_state_t *fpu);
+void fpu_cs_regs_write(const fpu_cs_regs_t *cs_regs);
+void fpu_cs_regs_write_rand(fpu_cs_regs_t *cs_regs);
+void fpu_cs_regs_read(fpu_cs_regs_t *cs_regs);
+int fpu_cs_regs_compare(const fpu_cs_regs_t *s1, const fpu_cs_regs_t *s2);
-/*
- * This function populates the provided FPU structure with the provided template
- * regs_val for all the 32 FPU/SMID registers, and the status registers FPCR/FPSR
- */
-void fpu_state_set(fpu_reg_state_t *vec,
- uint8_t regs_val);
+void fpu_q_regs_write_rand(fpu_q_reg_t q_regs[FPU_Q_COUNT]);
+void fpu_q_regs_read(fpu_q_reg_t q_regs[FPU_Q_COUNT]);
+int fpu_q_regs_compare(const fpu_q_reg_t s1[FPU_Q_COUNT],
+ const fpu_q_reg_t s2[FPU_Q_COUNT]);
-/*
- * This function prints the content of the provided FPU structure
- */
-void fpu_state_print(fpu_reg_state_t *vec);
+void fpu_state_write_rand(fpu_state_t *fpu_state);
+void fpu_state_read(fpu_state_t *fpu_state);
+int fpu_state_compare(const fpu_state_t *s1, const fpu_state_t *s2);
#endif /* __ASSEMBLER__ */
#endif /* FPU_H */