feat(trbe): add trace buffer control registers access test
Added a test to read trace buffer control registers to ensure that
EL3 is giving permission to non-secure EL2 to access these registers.
Change-Id: I70faa5bb7e0bc648fbc3d14cb9c1b8da3470a201
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 8e17140..8d24a05 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -247,6 +247,14 @@
} \
} while (false);
+#define SKIP_TEST_IF_TRBE_NOT_SUPPORTED() \
+ do { \
+ if (!get_armv9_0_trbe_support()) { \
+ tftf_testcase_printf("ARMv9-TRBE not supported\n"); \
+ return TEST_RESULT_SKIPPED; \
+ } \
+ } while (false)
+
/* Helper macro to verify if system suspend API is supported */
#define is_psci_sys_susp_supported() \
(tftf_get_psci_feature_info(SMC_PSCI_SYSTEM_SUSPEND) \