feat(trbe): add trace buffer control registers access test
Added a test to read trace buffer control registers to ensure that
EL3 is giving permission to non-secure EL2 to access these registers.
Change-Id: I70faa5bb7e0bc648fbc3d14cb9c1b8da3470a201
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
diff --git a/tftf/tests/tests-cpu-extensions.mk b/tftf/tests/tests-cpu-extensions.mk
index fedf783..a4e5d11 100644
--- a/tftf/tests/tests-cpu-extensions.mk
+++ b/tftf/tests/tests-cpu-extensions.mk
@@ -1,18 +1,19 @@
#
-# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
+# Copyright (c) 2018-2021, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
TESTS_SOURCES += $(addprefix tftf/tests/, \
extensions/amu/test_amu.c \
+ extensions/ecv/test_ecv.c \
+ extensions/fgt/test_fgt.c \
extensions/mte/test_mte.c \
+ extensions/pauth/test_pauth.c \
extensions/sve/sve_operations.S \
extensions/sve/test_sve.c \
- extensions/fgt/test_fgt.c \
- extensions/ecv/test_ecv.c \
+ extensions/trbe/test_trbe.c \
+ runtime_services/arm_arch_svc/smccc_arch_soc_id.c \
runtime_services/arm_arch_svc/smccc_arch_workaround_1.c \
runtime_services/arm_arch_svc/smccc_arch_workaround_2.c \
- runtime_services/arm_arch_svc/smccc_arch_soc_id.c \
- extensions/pauth/test_pauth.c \
)