diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 278c01e..33fce53 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -106,6 +106,15 @@
 		}								\
 	} while (0)
 
+#define SKIP_TEST_IF_ECV_NOT_SELF_SYNC()					\
+	do {									\
+		if (get_armv8_6_ecv_support() !=				\
+			ID_AA64MMFR0_EL1_ECV_SELF_SYNCH) {			\
+			tftf_testcase_printf("ARMv8.6-ECV not supported\n");	\
+			return TEST_RESULT_SKIPPED;				\
+		}								\
+	} while (0)
+
 #define SKIP_TEST_IF_MM_NOT_PRESENT()						\
 	do {									\
 		smc_args version_smc = { MM_VERSION_AARCH32 };			\
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index 7dc971f..718964e 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -194,6 +194,12 @@
 #define PARANGE_0101	U(48)
 #define PARANGE_0110	U(52)
 
+#define ID_AA64MMFR0_EL1_ECV_SHIFT         U(60)
+#define ID_AA64MMFR0_EL1_ECV_MASK          ULL(0xf)
+#define ID_AA64MMFR0_EL1_ECV_NOT_SUPPORTED ULL(0x0)
+#define ID_AA64MMFR0_EL1_ECV_SUPPORTED     ULL(0x1)
+#define ID_AA64MMFR0_EL1_ECV_SELF_SYNCH    ULL(0x2)
+
 #define ID_AA64MMFR0_EL1_FGT_SHIFT		U(56)
 #define ID_AA64MMFR0_EL1_FGT_MASK		ULL(0xf)
 #define ID_AA64MMFR0_EL1_FGT_NOT_SUPPORTED	ULL(0x0)
@@ -935,5 +941,10 @@
 #define HDFGRTR_EL2		S3_4_C3_C1_4
 #define HDFGWTR_EL2		S3_4_C3_C1_5
 
+/*******************************************************************************
+ * Armv8.6 - Enhanced Counter Virtualization Registers
+ ******************************************************************************/
+#define CNTPOFF_EL2  S3_4_C14_C0_6
+
 
 #endif /* ARCH_H */
diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h
index 3ee3824..fc9e8d4 100644
--- a/include/lib/aarch64/arch_features.h
+++ b/include/lib/aarch64/arch_features.h
@@ -74,6 +74,12 @@
 		ID_AA64MMFR0_EL1_FGT_MASK) == ID_AA64MMFR0_EL1_FGT_SUPPORTED;
 }
 
+static inline unsigned long int get_armv8_6_ecv_support(void)
+{
+	return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
+		ID_AA64MMFR0_EL1_ECV_MASK);
+}
+
 static inline uint32_t arch_get_debug_version(void)
 {
 	return ((read_id_aa64dfr0_el1() & ID_AA64DFR0_DEBUG_BITS) >>
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index a6a1de3..9bcd0bb 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -482,6 +482,9 @@
 DEFINE_RENAME_SYSREG_RW_FUNCS(hdfgrtr_el2, HDFGRTR_EL2)
 DEFINE_RENAME_SYSREG_RW_FUNCS(hdfgwtr_el2, HDFGWTR_EL2)
 
+/* Armv8.6 Enhanced Counter Virtualization Register */
+DEFINE_RENAME_SYSREG_RW_FUNCS(cntpoff_el2,  CNTPOFF_EL2)
+
 #define IS_IN_EL(x) \
 	(GET_EL(read_CurrentEl()) == MODE_EL##x)