feat(sve): enable SVE tests in tftf
Adding two tests to check that floating point context is preserved.
1. Use SIMD instructions on SVE-enabled system.
2. Use SVE instruction on a full-length vectors.
Both tests check that floating point context is preserved after
returning from the secure world.
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Change-Id: Idccff7c3f1658cc66b64e144cc00cda6e0aeea50
diff --git a/include/common/test_helpers.h b/include/common/test_helpers.h
index 3ee2b53..9c5f6e4 100644
--- a/include/common/test_helpers.h
+++ b/include/common/test_helpers.h
@@ -107,6 +107,14 @@
} \
} while (0)
+#define SKIP_TEST_IF_SVE_NOT_SUPPORTED() \
+ do { \
+ if (!is_armv8_2_sve_present()) { \
+ tftf_testcase_printf("SVE not supported\n"); \
+ return TEST_RESULT_SKIPPED; \
+ } \
+ } while (0)
+
#define SKIP_TEST_IF_ECV_NOT_SELF_SYNC() \
do { \
if (get_armv8_6_ecv_support() != \
@@ -228,6 +236,7 @@
#define CHECK_SPMC_TESTING_SETUP(ffa_major, ffa_minor, expected_uuids) \
do { \
+ SKIP_TEST_IF_AARCH32(); \
const size_t expected_uuids_size = \
sizeof(expected_uuids) / sizeof(struct ffa_uuid); \
test_result_t ret = check_spmc_testing_set_up( \
diff --git a/include/lib/extensions/sve.h b/include/lib/extensions/sve.h
new file mode 100644
index 0000000..278dcf3
--- /dev/null
+++ b/include/lib/extensions/sve.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SVE_H
+#define SVE_H
+
+#define fill_sve_helper(num) "ldr z"#num", [%0, #"#num", MUL VL];"
+#define read_sve_helper(num) "str z"#num", [%0, #"#num", MUL VL];"
+
+#endif /* SVE_H */
\ No newline at end of file
diff --git a/include/runtime_services/spm_common.h b/include/runtime_services/spm_common.h
index 685e732..5ccf395 100644
--- a/include/runtime_services/spm_common.h
+++ b/include/runtime_services/spm_common.h
@@ -83,22 +83,29 @@
/*
* Vector length:
* SIMD: 128 bits = 16 bytes
+ * SVE: 512 bits = 64 bytes
*/
#define SIMD_VECTOR_LEN_BYTES 16
+#define SVE_VECTOR_LEN_BYTES 64
+
#define SIMD_NUM_VECTORS 32
+#define SVE_NUM_VECTORS 32
typedef uint8_t simd_vector_t[SIMD_VECTOR_LEN_BYTES];
+typedef uint8_t sve_vector_t[SVE_VECTOR_LEN_BYTES];
/*
- * Fills SIMD registers with the content of the container v.
- * Number of vectors is assumed to be SIMD_NUM_VECTORS.
+ * Fills SIMD/SVE registers with the content of the container v.
+ * Number of vectors is assumed to be SIMD/SVE_NUM_VECTORS.
*/
void fill_simd_vector_regs(const simd_vector_t v[SIMD_NUM_VECTORS]);
+void fill_sve_vector_regs(const sve_vector_t v[SVE_NUM_VECTORS]);
/*
- * Reads contents of SIMD registers into the provided container v.
- * Number of vectors is assumed to be SIMD_NUM_VECTORS.
+ * Reads contents of SIMD/SVE registers into the provided container v.
+ * Number of vectors is assumed to be SIMD/SVE_NUM_VECTORS.
*/
void read_simd_vector_regs(simd_vector_t v[SIMD_NUM_VECTORS]);
+void read_sve_vector_regs(sve_vector_t v[SVE_NUM_VECTORS]);
bool check_spmc_execution_level(void);