commit b7d752a1006a6f7965023cb22b271ab161ca7e83
author johpow01 <john.powell@arm.com> Thu Oct 08 17:29:11 2020 -0500
committer John <john.powell@arm.com> Tue Mar 02 21:14:59 2021 +0100
tree 166fdc121f32f595bf247c6e3659f789634b8719
parent c078faa139387484a5edaa67b40e61114aac8cf1

TFTF tests for v8.6 AMU enhancements (FEAT_AMUv1p1)

Not much can be done with the new AMU offsets running at EL2 (virtual
offsets apply at EL0 and EL1) but we can make sure they are being saved
and restored properly, so that's what this patch does.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I5aef85021e875be2109bb9bd7cdbdbe31580394e

include/lib/aarch64/arch_helpers.h

diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 6a96ea2..39f1e3b 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -422,7 +422,10 @@
 DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_sgi0r_el1, ICC_SGI0R_EL1)
 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sgi1r, ICC_SGI1R)
 
+DEFINE_RENAME_SYSREG_RW_FUNCS(amcr_el0, AMCR_EL0)
 DEFINE_RENAME_SYSREG_RW_FUNCS(amcgcr_el0, AMCGCR_EL0)
+DEFINE_RENAME_SYSREG_READ_FUNC(amcfgr_el0, AMCFGR_EL0)
+DEFINE_RENAME_SYSREG_READ_FUNC(amcg1idr_el0, AMCG1IDR_EL0)
 DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenclr0_el0, AMCNTENCLR0_EL0)
 DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenset0_el0, AMCNTENSET0_EL0)
 DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenclr1_el0, AMCNTENCLR1_EL0)