commit d1a7f4d2bd6b4867a71366b58b00759724ef99d1
author Igor Podgainõi <igor.podgainoi@arm.com> Tue Nov 26 12:50:47 2024 +0100
committer Manish Pandey <manish.pandey2@arm.com> Thu Dec 19 14:51:47 2024 +0000
tree 7439900358c0026fe7c781e725e6ba0b1c3fd37b
parent 5d10ae70d57bc836d417b7a7592ecc96a528bc38

feat: add tests to check SCTLR2, THE and D128 sysregs

This patch adds test cases for verifying that the system registers of
FEAT_SCTLR2, FEAT_THE and FEAT_D128 (FEAT_SYSREG128) are working
correctly by performing a series of reads and writes to the registers.

Change-Id: I5c102daa358a7ec5d1801395bc875e9850e83939
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>

include/lib/aarch64/arch_helpers.h

diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 0774e7b..35d2454 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -324,6 +324,7 @@
 DEFINE_SYSREG_RW_FUNCS(sctlr_el3)
 
 DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el1, SCTLR2_EL1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(sctlr2_el2, SCTLR2_EL2)
 
 DEFINE_SYSREG_RW_FUNCS(actlr_el1)
 DEFINE_SYSREG_RW_FUNCS(actlr_el2)
@@ -648,6 +649,10 @@
 DEFINE_RENAME_SYSREG_RW_FUNCS(pir_el2, PIR_EL2)
 DEFINE_RENAME_SYSREG_RW_FUNCS(s2pir_el2, S2PIR_EL2)
 
+/* Armv8.9 Translation Hardening Extension */
+DEFINE_RENAME_SYSREG_RW_FUNCS(rcwmask_el1, RCWMASK_EL1)
+DEFINE_RENAME_SYSREG_RW_FUNCS(rcwsmask_el1, RCWSMASK_EL1)
+
 /* Armv9.4 Guarded Control Stack Extension */
 DEFINE_RENAME_SYSREG_RW_FUNCS(gcscr_el2, GCSCR_EL2)
 DEFINE_RENAME_SYSREG_RW_FUNCS(gcspr_el2, GCSPR_EL2)