feat(include/runtime_services): update RMI and RSI definitions
This patch:
- updates fields definitions of RmiFeatureRegister0 type,
- adds 'RSI_IO' definition to 'rsi_ripas_type' enumeration,
- adds 'algorithm' and 'rpv' members to 'rsi_realm_config'
structure
according to the RMM Specification 1.0-rel0-rc1.
Change-Id: Ic1f25b0e3ddbc93a4fceb88f9db4d808b54cc628
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
diff --git a/include/runtime_services/host_realm_managment/host_realm_rmi.h b/include/runtime_services/host_realm_managment/host_realm_rmi.h
index 5cb0292..dc2a7cd 100644
--- a/include/runtime_services/host_realm_managment/host_realm_rmi.h
+++ b/include/runtime_services/host_realm_managment/host_realm_rmi.h
@@ -293,14 +293,18 @@
#define RMI_FEATURE_REGISTER_0_SVE_VL_SHIFT 10UL
#define RMI_FEATURE_REGISTER_0_SVE_VL_WIDTH 4UL
#define RMI_FEATURE_REGISTER_0_NUM_BPS_SHIFT 14UL
-#define RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH 4UL
-#define RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT 18UL
-#define RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH 4UL
-#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(22)
-#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_SHIFT 23UL
+#define RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH 6UL
+#define RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT 20UL
+#define RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH 6UL
+#define RMI_FEATURE_REGISTER_0_PMU_EN BIT(26)
+#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_SHIFT 27UL
#define RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_WIDTH 5UL
-#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(28)
-#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(29)
+#define RMI_FEATURE_REGISTER_0_HASH_SHA_256 BIT(32)
+#define RMI_FEATURE_REGISTER_0_HASH_SHA_512 BIT(33)
+#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS_SHIFT 34UL
+#define RMI_FEATURE_REGISTER_0_GICV3_NUM_LRS_WIDTH 4UL
+#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER_SHIFT 38UL
+#define RMI_FEATURE_REGISTER_0_MAX_RECS_ORDER_WIDTH 4UL
/*
* Format of feature_flag[63:32].
diff --git a/realm/include/realm_rsi.h b/realm/include/realm_rsi.h
index 8436db9..6a4de5e 100644
--- a/realm/include/realm_rsi.h
+++ b/realm/include/realm_rsi.h
@@ -64,9 +64,16 @@
RSI_ERROR_COUNT
} rsi_status_t;
+/* Size of Realm Personalization Value */
+#define RSI_RPV_SIZE 64U
+
struct rsi_realm_config {
/* IPA width in bits */
- SET_MEMBER(unsigned long ipa_width, 0, 0x1000); /* Offset 0 */
+ SET_MEMBER(unsigned long ipa_width, 0, 8); /* Offset 0 */
+ /* Hash algorithm */
+ SET_MEMBER(unsigned long algorithm, 8, 0x200); /* Offset 8 */
+ /* Realm Personalization Value */
+ SET_MEMBER(unsigned char rpv[RSI_RPV_SIZE], 0x200, 0x1000); /* Offset 0x200 */
};
/*
@@ -106,7 +113,8 @@
typedef enum {
RSI_EMPTY = 0U,
RSI_RAM,
- RSI_DESTROYED
+ RSI_DESTROYED,
+ RSI_DEV
} rsi_ripas_type;
typedef enum {