fix: update definitions for sysregs on older toolchains
The patch 0db4a3cd added new sysreg access which older toolchains
do not support. This fix opts to use the renaming variant of the
necessary preprocessor macros for the registers used as part of
that patch, so that TFTF can compile with older toolchains.
Change-Id: I1d4cdfc3f67a085af35a3b51477eda79e9e93db7
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index cfc573c..50cb5f9 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -114,24 +114,31 @@
* Definitions for EL2 system registers.
******************************************************************************/
#define CNTPOFF_EL2 S3_4_C14_C0_6
-#define HDFGRTR2_EL2 S3_4_C3_C1_0
-#define HDFGWTR2_EL2 S3_4_C3_C1_1
-#define HFGRTR2_EL2 S3_4_C3_C1_2
-#define HFGWTR2_EL2 S3_4_C3_C1_3
-#define HDFGRTR_EL2 S3_4_C3_C1_4
-#define HDFGWTR_EL2 S3_4_C3_C1_5
+#define CONTEXTIDR_EL2 S3_4_C13_C0_1
+#define DBGVCR32_EL2 S2_4_C0_C7_0
+#define HACR_EL2 S3_4_C1_C1_7
#define HAFGRTR_EL2 S3_4_C3_C1_6
-#define HFGITR2_EL2 S3_4_C3_C1_7
+#define HDFGRTR_EL2 S3_4_C3_C1_4
+#define HDFGRTR2_EL2 S3_4_C3_C1_0
+#define HDFGWTR_EL2 S3_4_C3_C1_5
+#define HDFGWTR2_EL2 S3_4_C3_C1_1
#define HFGITR_EL2 S3_4_C1_C1_6
+#define HFGITR2_EL2 S3_4_C3_C1_7
#define HFGRTR_EL2 S3_4_C1_C1_4
+#define HFGRTR2_EL2 S3_4_C3_C1_2
#define HFGWTR_EL2 S3_4_C1_C1_5
+#define HFGWTR2_EL2 S3_4_C3_C1_3
+#define HPFAR_EL2 S3_4_C6_C0_4
#define ICH_HCR_EL2 S3_4_C12_C11_0
#define ICH_VMCR_EL2 S3_4_C12_C11_7
-#define VNCR_EL2 S3_4_C2_C2_0
#define PMSCR_EL2 S3_4_C9_C9_0
#define TFSR_EL2 S3_4_C5_C6_0
-#define CONTEXTIDR_EL2 S3_4_C13_C0_1
+#define TPIDR_EL2 S3_4_C13_C0_2
#define TTBR1_EL2 S3_4_C2_C0_1
+#define VDISR_EL2 S3_4_C12_C1_1
+#define VNCR_EL2 S3_4_C2_C2_0
+#define VSESR_EL2 S3_4_C5_C2_3
+#define VTCR_EL2 S3_4_C2_C1_2
/*******************************************************************************
* Generic timer memory mapped registers & offsets
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 5cb28cb..c906181 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -702,16 +702,16 @@
DEFINE_RENAME_SYSREG_RW_FUNCS(contextidr_el2, CONTEXTIDR_EL2)
/* Reliability, Availability, Serviceability (RAS) */
-DEFINE_SYSREG_RW_FUNCS(vdisr_el2)
-DEFINE_SYSREG_RW_FUNCS(vsesr_el2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(vdisr_el2, VDISR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(vsesr_el2, VSESR_EL2)
-DEFINE_SYSREG_RW_FUNCS(dbgvcr32_el2)
-DEFINE_SYSREG_RW_FUNCS(hacr_el2)
-DEFINE_SYSREG_RW_FUNCS(hpfar_el2)
-DEFINE_SYSREG_RW_FUNCS(ich_hcr_el2)
-DEFINE_SYSREG_RW_FUNCS(ich_vmcr_el2)
-DEFINE_SYSREG_RW_FUNCS(tpidr_el2)
-DEFINE_SYSREG_RW_FUNCS(vtcr_el2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(dbgvcr32_el2, DBGVCR32_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(hacr_el2, HACR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(hpfar_el2, HPFAR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(ich_hcr_el2, ICH_HCR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(ich_vmcr_el2, ICH_VMCR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(tpidr_el2, TPIDR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(vtcr_el2, VTCR_EL2)
static inline u_register_t read_sp(void)
{